panfrost: Clamp shader->uniform_count

[mesa.git] / src / gallium / drivers / panfrost / pan_resource.h

diff --git a/src/gallium/drivers/panfrost/pan_resource.h b/src/gallium/drivers/panfrost/pan_resource.h
index 633f185ab5b918ef3b9f47ccbcb594dc9e56d570..009f13c0f86afe2e76962fe15ef6c934bf1fbae0 100644 (file)
--- a/src/gallium/drivers/panfrost/pan_resource.h
+++ b/src/gallium/drivers/panfrost/pan_resource.h
@@ -26,70 +26,127 @@
 #ifndef PAN_RESOURCE_H
 #define PAN_RESOURCE_H
 
-#include <panfrost-job.h>
+#include <midgard_pack.h>
 #include "pan_screen.h"
-#include "pan_allocate.h"
+#include "pan_pool.h"
+#include "pan_minmax_cache.h"
+#include "pan_texture.h"
+#include "pan_partial_update.h"
 #include "drm-uapi/drm.h"
+#include "util/u_range.h"
 
-struct panfrost_bo {
-        /* Address to the BO in question */
+#define LAYOUT_CONVERT_THRESHOLD 8
 
-        uint8_t *cpu[MAX_MIP_LEVELS];
+struct panfrost_resource {
+        struct pipe_resource base;
+        struct {
+                struct pipe_scissor_state extent;
+                struct pan_rect *inverted_rects;
+                unsigned inverted_len;
+        } damage;
 
-        /* Not necessarily a GPU mapping of cpu! In case of texture tiling, gpu
-         * points to the GPU-side, tiled texture, while cpu points to the
-         * CPU-side, untiled texture from mesa */
+        struct panfrost_bo *bo;
+        struct renderonly_scanout *scanout;
 
-        mali_ptr gpu[MAX_MIP_LEVELS];
+        struct panfrost_resource *separate_stencil;
 
-        /* Memory entry corresponding to gpu above */
-        struct panfrost_memory_entry *entry[MAX_MIP_LEVELS];
+        struct util_range valid_buffer_range;
 
-        /* Set if this bo was imported rather than allocated */
-        bool imported;
+        /* Description of the mip levels */
+        struct panfrost_slice slices[MAX_MIP_LEVELS];
 
-        /* Number of bytes of the imported allocation */
-        size_t imported_size;
+        /* Distance from tree to tree */
+        unsigned cubemap_stride;
 
-        /* Set for tiled, clear for linear. */
-        bool tiled;
+        /* DRM fourcc code: linear, 16x16 u-interleaved, AFBC */
+        uint64_t modifier;
 
-        /* Is something other than level 0 ever written? */
-        bool is_mipmap;
+        /* Whether the modifier can be changed */
+        bool modifier_constant;
 
-        /* If AFBC is enabled for this resource, we lug around an AFBC
-         * metadata buffer as well. The actual AFBC resource is also in
-         * afbc_slab (only defined for AFBC) at position afbc_main_offset */
+        /* Is transaciton elimination enabled? */
+        bool checksummed;
 
-        bool has_afbc;
-        struct panfrost_memory afbc_slab;
-        int afbc_metadata_size;
+        /* Used to decide when to convert to another modifier */
+        uint16_t modifier_updates;
 
-        /* Similarly for TE */
-        bool has_checksum;
-        struct panfrost_memory checksum_slab;
-        int checksum_stride;
+        enum pipe_format internal_format;
 
-        int gem_handle;
+        /* Cached min/max values for index buffers */
+        struct panfrost_minmax_cache *index_cache;
 };
 
-struct panfrost_resource {
-        struct pipe_resource base;
-
-        struct panfrost_bo *bo;
-        struct renderonly_scanout *scanout;
+static inline struct panfrost_resource *
+pan_resource(struct pipe_resource *p)
+{
+        return (struct panfrost_resource *)p;
+}
 
-        struct panfrost_resource *separate_stencil;
+struct panfrost_gtransfer {
+        struct pipe_transfer base;
+        void *map;
+        struct {
+                struct pipe_resource *rsrc;
+                struct pipe_box box;
+        } staging;
 };
 
-static inline struct panfrost_resource *
-pan_resource(struct pipe_resource *p)
+static inline struct panfrost_gtransfer *
+pan_transfer(struct pipe_transfer *p)
 {
-   return (struct panfrost_resource *)p;
+        return (struct panfrost_gtransfer *)p;
 }
 
-void panfrost_resource_screen_init(struct panfrost_screen *screen);
+mali_ptr
+panfrost_get_texture_address(
+        struct panfrost_resource *rsrc,
+        unsigned level, unsigned face, unsigned sample);
+
+void panfrost_resource_screen_init(struct pipe_screen *screen);
 
 void panfrost_resource_context_init(struct pipe_context *pctx);
 
+/* Blitting */
+
+void
+panfrost_blit(struct pipe_context *pipe,
+              const struct pipe_blit_info *info);
+
+void
+panfrost_blit_wallpaper(struct panfrost_context *ctx,
+                        struct pipe_box *box);
+
+void
+panfrost_resource_set_damage_region(struct pipe_screen *screen,
+                                    struct pipe_resource *res,
+                                    unsigned int nrects,
+                                    const struct pipe_box *rects);
+
+static inline enum mali_texture_dimension
+panfrost_translate_texture_dimension(enum pipe_texture_target t) {
+        switch (t)
+        {
+        case PIPE_BUFFER:
+        case PIPE_TEXTURE_1D:
+        case PIPE_TEXTURE_1D_ARRAY:
+                return MALI_TEXTURE_DIMENSION_1D;
+
+        case PIPE_TEXTURE_2D:
+        case PIPE_TEXTURE_2D_ARRAY:
+        case PIPE_TEXTURE_RECT:
+                return MALI_TEXTURE_DIMENSION_2D;
+
+        case PIPE_TEXTURE_3D:
+                return MALI_TEXTURE_DIMENSION_3D;
+
+        case PIPE_TEXTURE_CUBE:
+        case PIPE_TEXTURE_CUBE_ARRAY:
+                return MALI_TEXTURE_DIMENSION_CUBE;
+
+        default:
+                unreachable("Unknown target");
+        }
+}
+
+
 #endif /* PAN_RESOURCE_H */