{"gles3", PAN_DBG_GLES3, "Enable experimental GLES3 implementation"},
{"fp16", PAN_DBG_FP16, "Enable buggy experimental (don't use!) fp16"},
{"bifrost", PAN_DBG_BIFROST, "Enable experimental Mali G31 and G52 support"},
+ {"gl3", PAN_DBG_GL3, "Enable experimental GL 3.x implementation, up to 3.3"},
DEBUG_NAMED_VALUE_END
};
-DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
-
-int pan_debug = 0;
-
static const char *
panfrost_get_name(struct pipe_screen *screen)
{
panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
{
/* We expose in-dev stuff for dEQP that we don't want apps to use yet */
- bool is_deqp = pan_debug & PAN_DBG_DEQP;
struct panfrost_device *dev = pan_device(screen);
+ bool is_deqp = dev->debug & PAN_DBG_DEQP;
+
+ /* Our GL 3.x implementation is WIP */
+ bool is_gl3 = dev->debug & PAN_DBG_GL3;
+ is_gl3 |= is_deqp;
- /* Our GLES3 implementation is WIP */
- bool is_gles3 = pan_debug & PAN_DBG_GLES3;
- is_gles3 |= is_deqp;
+ /* Same with GLES 3 */
+ bool is_gles3 = dev->debug & PAN_DBG_GLES3;
+ is_gles3 |= is_gl3;
switch (param) {
case PIPE_CAP_NPOT_TEXTURES:
return 1;
case PIPE_CAP_MAX_RENDER_TARGETS:
+ case PIPE_CAP_FBFETCH:
+ case PIPE_CAP_FBFETCH_COHERENT:
return is_gles3 ? 4 : 1;
+ case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
+ return 1;
+
+ case PIPE_CAP_SAMPLE_SHADING:
+ /* WIP */
+ return is_gl3 ? 1 : 0;
+
/* Throttling frames breaks pipelining */
case PIPE_CAP_THROTTLE:
return 0;
return 1;
case PIPE_CAP_QUERY_TIME_ELAPSED:
case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
- case PIPE_CAP_QUERY_TIMESTAMP:
case PIPE_CAP_QUERY_SO_OVERFLOW:
return 0;
case PIPE_CAP_TGSI_INSTANCEID:
case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
case PIPE_CAP_PRIMITIVE_RESTART:
+ case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
return 1;
case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
case PIPE_CAP_GLSL_FEATURE_LEVEL:
case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
- return is_gles3 ? 140 : 120;
+ return is_gl3 ? 330 : (is_gles3 ? 140 : 120);
case PIPE_CAP_ESSL_FEATURE_LEVEL:
return is_gles3 ? 300 : 120;
case PIPE_CAP_COMPUTE:
return is_deqp;
+ case PIPE_CAP_QUERY_TIMESTAMP:
+ case PIPE_CAP_CONDITIONAL_RENDER:
+ return is_gl3;
+
case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
return 4096;
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
enum pipe_shader_type shader,
enum pipe_shader_cap param)
{
- bool is_deqp = pan_debug & PAN_DBG_DEQP;
- bool is_fp16 = pan_debug & PAN_DBG_FP16;
struct panfrost_device *dev = pan_device(screen);
+ bool is_deqp = dev->debug & PAN_DBG_DEQP;
+ bool is_fp16 = dev->debug & PAN_DBG_FP16;
if (shader != PIPE_SHADER_VERTEX &&
shader != PIPE_SHADER_FRAGMENT &&
case PIPE_SHADER_CAP_FP16_DERIVATIVES:
case PIPE_SHADER_CAP_INT16:
+ case PIPE_SHADER_CAP_GLSL_16BIT_TEMPS:
case PIPE_SHADER_CAP_INT64_ATOMICS:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
return 0;
default:
- DBG("unknown shader param %d\n", param);
+ /* Other params are unknown */
return 0;
}
unsigned storage_sample_count,
unsigned bind)
{
+ struct panfrost_device *dev = pan_device(screen);
const struct util_format_description *format_desc;
assert(target == PIPE_BUFFER ||
return false;
/* MSAA 4x supported, but no more. Technically some revisions of the
- * hardware can go up to 16x but we don't support higher modes yet. */
-
- if (sample_count > 1 && !(pan_debug & PAN_DBG_DEQP))
- return false;
+ * hardware can go up to 16x but we don't support higher modes yet.
+ * MSAA 2x is notably not supported and gets rounded up to MSAA 4x. */
- if (sample_count > 4)
+ if (!(sample_count == 0 || sample_count == 1 || sample_count == 4))
return false;
if (MAX2(sample_count, 1) != MAX2(storage_sample_count, 1))
if (scanout && renderable && !util_format_is_rgba8_variant(format_desc))
return false;
+ if (dev->debug & (PAN_DBG_GL3 | PAN_DBG_DEQP)) {
+ if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC)
+ return true;
+ }
+
/* Check we support the format with the given bind */
unsigned relevant_bind = bind &
| PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_SAMPLER_VIEW);
struct panfrost_format fmt = panfrost_pipe_format_table[format];
+
+ /* Also check that compressed texture formats are supported on this
+ * particular chip. They may not be depending on system integration
+ * differences. */
+
+ if (!panfrost_supports_compressed_format(dev, fmt.hw))
+ return false;
+
return fmt.hw && ((relevant_bind & ~fmt.bind) == 0);
}
panfrost_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
enum pipe_compute_cap param, void *ret)
{
+ struct panfrost_device *dev = pan_device(pscreen);
const char * const ir = "panfrost";
- if (!(pan_debug & PAN_DBG_DEQP))
+ if (!(dev->debug & PAN_DBG_DEQP))
return 0;
#define RET(x) do { \
struct pipe_screen *
panfrost_create_screen(int fd, struct renderonly *ro)
{
- pan_debug = debug_get_option_pan_debug();
-
/* Blacklist apps known to be buggy under Panfrost */
const char *proc = util_get_process_name();
const char *blacklist[] = {
struct panfrost_device *dev = pan_device(&screen->base);
panfrost_open_device(screen, fd, dev);
+ dev->debug = debug_get_flags_option("PAN_MESA_DEBUG", debug_options, 0);
+
if (ro) {
dev->ro = renderonly_dup(ro);
if (!dev->ro) {
- DBG("Failed to dup renderonly object\n");
+ if (dev->debug & PAN_DBG_MSGS)
+ fprintf(stderr, "Failed to dup renderonly object\n");
+
free(screen);
return NULL;
}
break;
case 0x7093: /* G31 */
case 0x7212: /* G52 */
- if (pan_debug & PAN_DBG_BIFROST)
+ if (dev->debug & PAN_DBG_BIFROST)
break;
/* fallthrough */
return NULL;
}
- if (pan_debug & (PAN_DBG_TRACE | PAN_DBG_SYNC))
- pandecode_initialize(!(pan_debug & PAN_DBG_TRACE));
+ if (dev->debug & (PAN_DBG_TRACE | PAN_DBG_SYNC))
+ pandecode_initialize(!(dev->debug & PAN_DBG_TRACE));
screen->base.destroy = panfrost_destroy_screen;