r300g: Init regalloc state during context creation
[mesa.git] / src / gallium / drivers / r300 / compiler / r3xx_vertprog_dump.c
index 2bc0a87eed813178164a3a20244a2e371d172d29..a41559c8fde0142eff4fefaa5faaaf17845a62f6 100644 (file)
@@ -190,16 +190,25 @@ void r300_vertex_program_dump(struct radeon_compiler *compiler, void *user)
 
        fprintf(stderr, "Flow Control Ops: 0x%08x\n",vs->fc_ops);
        for(i = 0; i < vs->num_fc_ops; i++) {
+               unsigned is_loop = 0;
                switch((vs->fc_ops >> (i * 2)) & 0x3 ) {
                case 0: fprintf(stderr, "NOP"); break;
                case 1: fprintf(stderr, "JUMP"); break;
-               case 2: fprintf(stderr, "LOOP"); break;
+               case 2: fprintf(stderr, "LOOP"); is_loop = 1; break;
                case 3: fprintf(stderr, "JSR"); break;
                }
                if (c->Base.is_r500) {
-                       fprintf(stderr,": uw-> 0x%08x lw-> 0x%08x\n",
+                       fprintf(stderr,": uw-> 0x%08x lw-> 0x%08x "
+                                                       "loop data->0x%08x\n",
                                vs->fc_op_addrs.r500[i].uw,
-                               vs->fc_op_addrs.r500[i].lw);
+                               vs->fc_op_addrs.r500[i].lw,
+                               vs->fc_loop_index[i]);
+                       if (is_loop) {
+                               fprintf(stderr, "Before = %u First = %u Last = %u\n",
+                                       vs->fc_op_addrs.r500[i].lw & 0xffff,
+                                       (vs->fc_op_addrs.r500[i].uw >> 16) & 0xffff,
+                                       vs->fc_op_addrs.r500[i].uw  & 0xffff);
+                       }
                } else {
                        fprintf(stderr,": 0x%08x\n", vs->fc_op_addrs.r300[i]);
                }