#include "util/u_memory.h"
#include "util/u_sampler.h"
-#include "util/u_simple_list.h"
+#include "util/simple_list.h"
#include "util/u_upload_mgr.h"
#include "os/os_time.h"
#include "vl/vl_decoder.h"
#include "r300_screen_buffer.h"
#include "compiler/radeon_regalloc.h"
+#include <inttypes.h>
+
static void r300_release_referenced_objects(struct r300_context *r300)
{
struct pipe_framebuffer_state *fb =
}
/* Manually-created vertex buffers. */
- pipe_resource_reference(&r300->dummy_vb.buffer, NULL);
+ pipe_vertex_buffer_unreference(&r300->dummy_vb);
pb_reference(&r300->vbo, NULL);
r300->context.delete_depth_stencil_alpha_state(&r300->context,
if (r300->cs)
r300->rws->cs_destroy(r300->cs);
+ if (r300->ctx)
+ r300->rws->ctx_destroy(r300->ctx);
rc_destroy_regalloc_state(&r300->fs_regalloc_state);
/* XXX: No way to tell if this was initialized or not? */
- util_slab_destroy(&r300->pool_transfers);
+ slab_destroy_child(&r300->pool_transfers);
/* Free the structs allocated in r300_setup_atoms() */
if (r300->aa_state.state) {
FREE(r300);
}
-static void r300_flush_callback(void *data, unsigned flags)
+static void r300_flush_callback(void *data, unsigned flags,
+ struct pipe_fence_handle **fence)
{
struct r300_context* const cs_context_copy = data;
- r300_flush(&cs_context_copy->context, flags, NULL);
+ r300_flush(&cs_context_copy->context, flags, fence);
}
#define R300_INIT_ATOM(atomname, atomsize) \
boolean is_rv350 = r300->screen->caps.is_rv350;
boolean is_r500 = r300->screen->caps.is_r500;
boolean has_tcl = r300->screen->caps.has_tcl;
- boolean drm_2_6_0 = r300->screen->info.drm_minor >= 6;
/* Create the actual atom list.
*
R300_INIT_ATOM(gpu_flush, 9);
R300_INIT_ATOM(aa_state, 4);
R300_INIT_ATOM(fb_state, 0);
- R300_INIT_ATOM(hyperz_state, is_r500 || (is_rv350 && drm_2_6_0) ? 10 : 8);
+ R300_INIT_ATOM(hyperz_state, is_r500 || is_rv350 ? 10 : 8);
/* ZB (unpipelined), SC. */
R300_INIT_ATOM(ztop_state, 2);
/* ZB, FG. */
- R300_INIT_ATOM(dsa_state, is_r500 ? (drm_2_6_0 ? 10 : 8) : 6);
+ R300_INIT_ATOM(dsa_state, is_r500 ? 10 : 6);
/* RB3D. */
R300_INIT_ATOM(blend_state, 8);
R300_INIT_ATOM(blend_color_state, is_r500 ? 3 : 2);
/* VAP. */
R300_INIT_ATOM(viewport_state, 9);
R300_INIT_ATOM(pvs_flush, 2);
- R300_INIT_ATOM(vap_invariant_state, is_r500 ? 11 : 9);
+ R300_INIT_ATOM(vap_invariant_state, is_r500 || !has_tcl ? 11 : 9);
R300_INIT_ATOM(vertex_stream_state, 0);
R300_INIT_ATOM(vs_state, 0);
R300_INIT_ATOM(vs_constants, 0);
pipe->set_blend_color(pipe, &bc);
pipe->set_clip_state(pipe, &cs);
- pipe->set_scissor_state(pipe, &ss);
+ pipe->set_scissor_states(pipe, 0, 1, &ss);
pipe->set_sample_mask(pipe, ~0);
/* Initialize the GPU flush. */
if (r300->screen->caps.is_r500) {
OUT_CB_REG(R500_VAP_TEX_TO_COLOR_CNTL, 0);
+ } else if (!r300->screen->caps.has_tcl) {
+ /* RSxxx:
+ * Static VAP setup since r300_emit_vs_state() is never called.
+ */
+ OUT_CB_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(10) |
+ R300_PVS_NUM_CNTLRS(5) |
+ R300_PVS_NUM_FPUS(2) |
+ R300_PVS_VF_MAX_VTX_NUM(5));
}
END_CB;
}
OUT_CB_REG(R300_ZB_DEPTHCLEARVALUE, 0);
OUT_CB_REG(R300_SC_HYPERZ, R300_SC_HYPERZ_ADJ_2);
- if (r300->screen->caps.is_r500 ||
- (r300->screen->caps.is_rv350 &&
- r300->screen->info.drm_minor >= 6)) {
+ if (r300->screen->caps.is_r500 || r300->screen->caps.is_rv350) {
OUT_CB_REG(R300_GB_Z_PEQ_CONFIG, 0);
}
END_CB;
}
struct pipe_context* r300_create_context(struct pipe_screen* screen,
- void *priv)
+ void *priv, unsigned flags)
{
struct r300_context* r300 = CALLOC_STRUCT(r300_context);
struct r300_screen* r300screen = r300_screen(screen);
r300->context.destroy = r300_destroy_context;
- util_slab_create(&r300->pool_transfers,
- sizeof(struct pipe_transfer), 64,
- UTIL_SLAB_SINGLETHREADED);
+ slab_create_child(&r300->pool_transfers, &r300screen->pool_transfers);
+
+ r300->ctx = rws->ctx_create(rws);
+ if (!r300->ctx)
+ goto fail;
- r300->cs = rws->cs_create(rws, RING_GFX, NULL);
+ r300->cs = rws->cs_create(r300->ctx, RING_GFX, r300_flush_callback, r300);
if (r300->cs == NULL)
goto fail;
r300_init_render_functions(r300);
r300_init_states(&r300->context);
- r300->context.create_video_decoder = vl_create_decoder;
+ r300->context.create_video_codec = vl_create_decoder;
r300->context.create_video_buffer = vl_video_buffer_create;
- if (r300screen->caps.has_tcl) {
- r300->uploader = u_upload_create(&r300->context, 256 * 1024, 4,
- PIPE_BIND_INDEX_BUFFER);
- }
+ r300->uploader = u_upload_create(&r300->context, 1024 * 1024,
+ PIPE_BIND_CUSTOM, PIPE_USAGE_STREAM);
+ r300->context.stream_uploader = r300->uploader;
+ r300->context.const_uploader = r300->uploader;
r300->blitter = util_blitter_create(&r300->context);
if (r300->blitter == NULL)
goto fail;
r300->blitter->draw_rectangle = r300_blitter_draw_rectangle;
- rws->cs_set_flush_callback(r300->cs, r300_flush_callback, r300);
-
/* The KIL opcode needs the first texture unit to be enabled
* on r3xx-r4xx. In order to calm down the CS checker, we bind this
* dummy texture there. */
memset(&vb, 0, sizeof(vb));
vb.target = PIPE_BUFFER;
vb.format = PIPE_FORMAT_R8_UNORM;
- vb.usage = PIPE_USAGE_STATIC;
+ vb.usage = PIPE_USAGE_DEFAULT;
vb.width0 = sizeof(float) * 16;
vb.height0 = 1;
vb.depth0 = 1;
- r300->dummy_vb.buffer = screen->resource_create(screen, &vb);
+ r300->dummy_vb.buffer.resource = screen->resource_create(screen, &vb);
r300->context.set_vertex_buffers(&r300->context, 0, 1, &r300->dummy_vb);
}
#endif
fprintf(stderr,
"r300: DRM version: %d.%d.%d, Name: %s, ID: 0x%04x, GB: %d, Z: %d\n"
- "r300: GART size: %d MB, VRAM size: %d MB\n"
+ "r300: GART size: %"PRIu64" MB, VRAM size: %"PRIu64" MB\n"
"r300: AA compression RAM: %s, Z compression RAM: %s, HiZ RAM: %s\n",
r300->screen->info.drm_major,
r300->screen->info.drm_minor,