#include "util/u_sampler.h"
#include "util/u_simple_list.h"
#include "util/u_upload_mgr.h"
+#include "os/os_time.h"
+#include "vl/vl_decoder.h"
+#include "vl/vl_video_buffer.h"
#include "r300_cb.h"
#include "r300_context.h"
#include "r300_emit.h"
-#include "r300_hyperz.h"
#include "r300_screen.h"
#include "r300_screen_buffer.h"
-#include "r300_winsys.h"
-
-#include <inttypes.h>
static void r300_update_num_contexts(struct r300_screen *r300screen,
int diff)
{
+ pipe_mutex_lock(r300screen->num_contexts_mutex);
if (diff > 0) {
- p_atomic_inc(&r300screen->num_contexts);
+ r300screen->num_contexts++;
if (r300screen->num_contexts > 1)
util_slab_set_thread_safety(&r300screen->pool_buffers,
UTIL_SLAB_MULTITHREADED);
} else {
- p_atomic_dec(&r300screen->num_contexts);
+ r300screen->num_contexts--;
if (r300screen->num_contexts <= 1)
util_slab_set_thread_safety(&r300screen->pool_buffers,
UTIL_SLAB_SINGLETHREADED);
}
+ pipe_mutex_unlock(r300screen->num_contexts_mutex);
}
static void r300_release_referenced_objects(struct r300_context *r300)
(struct pipe_framebuffer_state*)r300->fb_state.state;
struct r300_textures_state *textures =
(struct r300_textures_state*)r300->textures_state.state;
- struct r300_query *query, *temp;
unsigned i;
/* Framebuffer state. */
NULL);
}
- /* The dummy VBO. */
- pipe_resource_reference(&r300->dummy_vb, NULL);
-
- /* The SWTCL VBO. */
+ /* Manually-created vertex buffers. */
+ pipe_resource_reference(&r300->dummy_vb.buffer, NULL);
pipe_resource_reference(&r300->vbo, NULL);
- /* Vertex buffers. */
- for (i = 0; i < r300->vertex_buffer_count; i++) {
- pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL);
- }
-
- /* If there are any queries pending or not destroyed, remove them now. */
- foreach_s(query, temp, &r300->query_list) {
- remove_from_list(query);
- FREE(query);
- }
+ r300->context.delete_depth_stencil_alpha_state(&r300->context,
+ r300->dsa_decompress_zmask);
}
static void r300_destroy_context(struct pipe_context* context)
{
struct r300_context* r300 = r300_context(context);
- struct r300_atom *atom;
+
+ if (r300->cs && r300->hyperz_enabled) {
+ r300->rws->cs_request_feature(r300->cs, RADEON_FID_R300_HYPERZ_ACCESS, FALSE);
+ }
if (r300->blitter)
util_blitter_destroy(r300->blitter);
if (r300->draw)
draw_destroy(r300->draw);
- /* Print stats, if enabled. */
- if (SCREEN_DBG_ON(r300->screen, DBG_STATS)) {
- fprintf(stderr, "r300: Stats for context %p:\n", r300);
- fprintf(stderr, " : Flushes: %" PRIu64 "\n", r300->flush_counter);
- foreach(atom, &r300->atom_list) {
- fprintf(stderr, " : %s: %" PRIu64 " emits\n",
- atom->name, atom->counter);
- }
- }
-
- if (r300->upload_vb)
- u_upload_destroy(r300->upload_vb);
- if (r300->upload_ib)
- u_upload_destroy(r300->upload_ib);
-
- if (r300->tran.translate_cache)
- translate_cache_destroy(r300->tran.translate_cache);
+ if (r300->vbuf_mgr)
+ u_vbuf_destroy(r300->vbuf_mgr);
/* XXX: This function assumes r300->query_list was initialized */
r300_release_referenced_objects(r300);
- if (r300->zmask_mm)
- r300_hyperz_destroy_mm(r300);
-
if (r300->cs)
r300->rws->cs_destroy(r300->cs);
FREE(r300);
}
-void r300_flush_cb(void *data)
+static void r300_flush_callback(void *data, unsigned flags)
{
struct r300_context* const cs_context_copy = data;
- cs_context_copy->context.flush(&cs_context_copy->context, 0, NULL);
+ r300_flush(&cs_context_copy->context, flags, NULL);
}
#define R300_INIT_ATOM(atomname, atomsize) \
r300->atomname.size = atomsize; \
r300->atomname.emit = r300_emit_##atomname; \
r300->atomname.dirty = FALSE; \
- insert_at_tail(&r300->atom_list, &r300->atomname); \
} while (0)
#define R300_ALLOC_ATOM(atomname, statetype) \
boolean is_rv350 = r300->screen->caps.is_rv350;
boolean is_r500 = r300->screen->caps.is_r500;
boolean has_tcl = r300->screen->caps.has_tcl;
- boolean drm_2_3_0 = r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
- boolean drm_2_6_0 = r300->rws->get_value(r300->rws, R300_VID_DRM_2_6_0);
- boolean can_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
- boolean has_hiz_ram = r300->screen->caps.hiz_ram > 0;
+ boolean drm_2_6_0 = r300->screen->info.drm_minor >= 6;
/* Create the actual atom list.
- *
- * Each atom is examined and emitted in the order it appears here, which
- * can affect performance and conformance if not handled with care.
*
* Some atoms never change size, others change every emit - those have
* the size of 0 here.
* - fb_state_pipelined (pipelined regs)
* The motivation behind this is to be able to emit a strict
* subset of the regs, and to have reasonable register ordering. */
- make_empty_list(&r300->atom_list);
/* SC, GB (unpipelined), RB3D (unpipelined), ZB (unpipelined). */
R300_INIT_ATOM(gpu_flush, 9);
R300_INIT_ATOM(aa_state, 4);
/* ZB (unpipelined), SC. */
R300_INIT_ATOM(ztop_state, 2);
/* ZB, FG. */
- R300_INIT_ATOM(dsa_state, is_r500 ? 8 : 6);
+ R300_INIT_ATOM(dsa_state, is_r500 ? (drm_2_6_0 ? 10 : 8) : 6);
/* RB3D. */
R300_INIT_ATOM(blend_state, 8);
R300_INIT_ATOM(blend_color_state, is_r500 ? 3 : 2);
/* SC. */
R300_INIT_ATOM(scissor_state, 3);
/* GB, FG, GA, SU, SC, RB3D. */
- R300_INIT_ATOM(invariant_state, 16 + (is_rv350 ? 4 : 0));
+ R300_INIT_ATOM(invariant_state, 16 + (is_rv350 ? 4 : 0) + (is_r500 ? 4 : 0));
/* VAP. */
R300_INIT_ATOM(viewport_state, 9);
R300_INIT_ATOM(pvs_flush, 2);
- R300_INIT_ATOM(vap_invariant_state, 9);
+ R300_INIT_ATOM(vap_invariant_state, is_r500 ? 11 : 9);
R300_INIT_ATOM(vertex_stream_state, 0);
R300_INIT_ATOM(vs_state, 0);
R300_INIT_ATOM(vs_constants, 0);
- R300_INIT_ATOM(clip_state, has_tcl ? 5 + (6 * 4) : 2);
+ R300_INIT_ATOM(clip_state, has_tcl ? 3 + (6 * 4) : 0);
/* VAP, RS, GA, GB, SU, SC. */
R300_INIT_ATOM(rs_block_state, 0);
R300_INIT_ATOM(rs_state, 0);
/* SC, US. */
- R300_INIT_ATOM(fb_state_pipelined, 5 + (drm_2_3_0 ? 3 : 0));
+ R300_INIT_ATOM(fb_state_pipelined, 8);
/* US. */
R300_INIT_ATOM(fs, 0);
R300_INIT_ATOM(fs_rc_constant_state, 0);
/* TX. */
R300_INIT_ATOM(texture_cache_inval, 2);
R300_INIT_ATOM(textures_state, 0);
- if (can_hyperz) {
- /* HiZ Clear */
- if (has_hiz_ram)
- R300_INIT_ATOM(hiz_clear, 0);
- /* zmask clear */
- R300_INIT_ATOM(zmask_clear, 0);
- }
+ /* HiZ Clear */
+ R300_INIT_ATOM(hiz_clear, r300->screen->caps.hiz_ram > 0 ? 4 : 0);
+ /* zmask clear */
+ R300_INIT_ATOM(zmask_clear, r300->screen->caps.zmask_ram > 0 ? 4 : 0);
/* ZB (unpipelined), SU. */
R300_INIT_ATOM(query_start, 4);
R300_ALLOC_ATOM(fs_constants, r300_constant_buffer);
R300_ALLOC_ATOM(vs_constants, r300_constant_buffer);
if (!r300->screen->caps.has_tcl) {
- R300_ALLOC_ATOM(r300->vertex_stream_state, r300_vertex_stream_state);
+ R300_ALLOC_ATOM(vertex_stream_state, r300_vertex_stream_state);
}
/* Some non-CSO atoms don't use the state pointer. */
/* Some states must be marked as dirty here to properly set up
* hardware in the first command stream. */
- r300->invariant_state.dirty = TRUE;
- r300->pvs_flush.dirty = TRUE;
- r300->vap_invariant_state.dirty = TRUE;
- r300->texture_cache_inval.dirty = TRUE;
- r300->textures_state.dirty = TRUE;
+ r300_mark_atom_dirty(r300, &r300->invariant_state);
+ r300_mark_atom_dirty(r300, &r300->pvs_flush);
+ r300_mark_atom_dirty(r300, &r300->vap_invariant_state);
+ r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
+ r300_mark_atom_dirty(r300, &r300->textures_state);
return TRUE;
}
struct pipe_blend_color bc = {{0}};
struct pipe_clip_state cs = {{{0}}};
struct pipe_scissor_state ss = {0};
- struct r300_clip_state *clip =
- (struct r300_clip_state*)r300->clip_state.state;
struct r300_gpu_flush *gpuflush =
(struct r300_gpu_flush*)r300->gpu_flush.state;
struct r300_vap_invariant_state *vap_invariant =
CB_LOCALS;
pipe->set_blend_color(pipe, &bc);
+ pipe->set_clip_state(pipe, &cs);
pipe->set_scissor_state(pipe, &ss);
- /* Initialize the clip state. */
- if (r300_context(pipe)->screen->caps.has_tcl) {
- pipe->set_clip_state(pipe, &cs);
- } else {
- BEGIN_CB(clip->cb, 2);
- OUT_CB_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE);
- END_CB;
- }
-
/* Initialize the GPU flush. */
{
BEGIN_CB(gpuflush->cb_flush_clean, 6);
/* Initialize the VAP invariant state. */
{
- BEGIN_CB(vap_invariant->cb, 9);
+ BEGIN_CB(vap_invariant->cb, r300->vap_invariant_state.size);
OUT_CB_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff);
OUT_CB_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4);
OUT_CB_32F(1.0);
OUT_CB_32F(1.0);
OUT_CB_32F(1.0);
OUT_CB_REG(R300_VAP_PSC_SGN_NORM_CNTL, R300_SGN_NORM_NO_ZERO);
+
+ if (r300->screen->caps.is_r500) {
+ OUT_CB_REG(R500_VAP_TEX_TO_COLOR_CNTL, 0);
+ }
END_CB;
}
BEGIN_CB(invariant->cb, r300->invariant_state.size);
OUT_CB_REG(R300_GB_SELECT, 0);
OUT_CB_REG(R300_FG_FOG_BLEND, 0);
- OUT_CB_REG(R300_GA_ROUND_MODE, 1);
OUT_CB_REG(R300_GA_OFFSET, 0);
OUT_CB_REG(R300_SU_TEX_WRAP, 0);
OUT_CB_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF);
OUT_CB_REG(R300_SU_DEPTH_OFFSET, 0);
OUT_CB_REG(R300_SC_EDGERULE, 0x2DA49525);
+ OUT_CB_REG(R300_SC_SCREENDOOR, 0xffffff);
if (r300->screen->caps.is_rv350) {
OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x01010101);
OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFEFEFEFE);
}
+
+ if (r300->screen->caps.is_r500) {
+ OUT_CB_REG(R500_GA_COLOR_CONTROL_PS3, 0);
+ OUT_CB_REG(R500_SU_TEX_WRAP_PS3, 0);
+ }
END_CB;
}
if (r300->screen->caps.is_r500 ||
(r300->screen->caps.is_rv350 &&
- r300->rws->get_value(r300->rws, R300_VID_DRM_2_6_0))) {
+ r300->screen->info.drm_minor >= 6)) {
OUT_CB_REG(R300_GB_Z_PEQ_CONFIG, 0);
}
END_CB;
{
struct r300_context* r300 = CALLOC_STRUCT(r300_context);
struct r300_screen* r300screen = r300_screen(screen);
- struct r300_winsys_screen *rws = r300screen->rws;
+ struct radeon_winsys *rws = r300screen->rws;
if (!r300)
return NULL;
r300->rws = rws;
r300->screen = r300screen;
- r300->context.winsys = (struct pipe_winsys*)rws;
r300->context.screen = screen;
r300->context.priv = priv;
r300->context.destroy = r300_destroy_context;
- make_empty_list(&r300->query_list);
-
util_slab_create(&r300->pool_transfers,
sizeof(struct pipe_transfer), 64,
UTIL_SLAB_SINGLETHREADED);
/* Disable converting points/lines to triangles. */
draw_wide_line_threshold(r300->draw, 10000000.f);
draw_wide_point_threshold(r300->draw, 10000000.f);
+ draw_wide_point_sprites(r300->draw, FALSE);
+ draw_enable_line_stipple(r300->draw, TRUE);
+ draw_enable_point_sprites(r300->draw, FALSE);
}
if (!r300_setup_atoms(r300))
r300_init_query_functions(r300);
r300_init_state_functions(r300);
r300_init_resource_functions(r300);
-
- r300->blitter = util_blitter_create(&r300->context);
- if (r300->blitter == NULL)
- goto fail;
-
- /* Render functions must be initialized after blitter. */
r300_init_render_functions(r300);
+ r300_init_states(&r300->context);
- rws->cs_set_flush(r300->cs, r300_flush_cb, r300);
+ r300->context.create_video_decoder = vl_create_decoder;
+ r300->context.create_video_buffer = vl_video_buffer_create;
- /* setup hyper-z mm */
- if (r300->rws->get_value(r300->rws, R300_CAN_HYPERZ))
- if (!r300_hyperz_init_mm(r300))
+ if (r300->screen->caps.has_tcl) {
+ r300->vbuf_mgr = u_vbuf_create(&r300->context, 1024 * 1024, 4,
+ PIPE_BIND_VERTEX_BUFFER |
+ PIPE_BIND_INDEX_BUFFER,
+ U_VERTEX_FETCH_DWORD_ALIGNED);
+ if (!r300->vbuf_mgr)
goto fail;
+ r300->vbuf_mgr->caps.format_fixed32 = 0;
+ }
- r300->upload_ib = u_upload_create(&r300->context,
- 32 * 1024, 16,
- PIPE_BIND_INDEX_BUFFER);
-
- if (r300->upload_ib == NULL)
- goto fail;
-
- r300->upload_vb = u_upload_create(&r300->context,
- 128 * 1024, 16,
- PIPE_BIND_VERTEX_BUFFER);
- if (r300->upload_vb == NULL)
- goto fail;
-
- r300->tran.translate_cache = translate_cache_create();
- if (r300->tran.translate_cache == NULL)
+ r300->blitter = util_blitter_create(&r300->context);
+ if (r300->blitter == NULL)
goto fail;
+ r300->blitter->draw_rectangle = r300_blitter_draw_rectangle;
- r300_init_states(&r300->context);
+ rws->cs_set_flush_callback(r300->cs, r300_flush_callback, r300);
/* The KIL opcode needs the first texture unit to be enabled
* on r3xx-r4xx. In order to calm down the CS checker, we bind this
}
{
- struct pipe_resource vb = {};
+ struct pipe_resource vb;
+ memset(&vb, 0, sizeof(vb));
vb.target = PIPE_BUFFER;
vb.format = PIPE_FORMAT_R8_UNORM;
vb.bind = PIPE_BIND_VERTEX_BUFFER;
vb.height0 = 1;
vb.depth0 = 1;
- r300->dummy_vb = screen->resource_create(screen, &vb);
+ r300->dummy_vb.buffer = screen->resource_create(screen, &vb);
}
- return &r300->context;
+ {
+ struct pipe_depth_stencil_alpha_state dsa;
+ memset(&dsa, 0, sizeof(dsa));
+ dsa.depth.writemask = 1;
- fail:
- r300_destroy_context(&r300->context);
- return NULL;
-}
+ r300->dsa_decompress_zmask =
+ r300->context.create_depth_stencil_alpha_state(&r300->context,
+ &dsa);
+ }
-void r300_finish(struct r300_context *r300)
-{
- struct pipe_framebuffer_state *fb;
- unsigned i;
+ r300->hyperz_time_of_last_flush = os_time_get();
- /* This is a preliminary implementation of glFinish.
- *
- * The ideal implementation should use something like EmitIrqLocked and
- * WaitIrq, or better, real fences.
- */
- if (r300->fb_state.state) {
- fb = r300->fb_state.state;
-
- for (i = 0; i < fb->nr_cbufs; i++) {
- if (fb->cbufs[i]->texture) {
- r300->rws->buffer_wait(r300->rws,
- r300_texture(fb->cbufs[i]->texture)->buffer);
- return;
- }
- }
- if (fb->zsbuf && fb->zsbuf->texture) {
- r300->rws->buffer_wait(r300->rws,
- r300_texture(fb->zsbuf->texture)->buffer);
- }
+ /* Print driver info. */
+#ifdef DEBUG
+ {
+#else
+ if (DBG_ON(r300, DBG_INFO)) {
+#endif
+ fprintf(stderr,
+ "r300: DRM version: %d.%d.%d, Name: %s, ID: 0x%04x, GB: %d, Z: %d\n"
+ "r300: GART size: %d MB, VRAM size: %d MB\n"
+ "r300: AA compression RAM: %s, Z compression RAM: %s, HiZ RAM: %s\n",
+ r300->screen->info.drm_major,
+ r300->screen->info.drm_minor,
+ r300->screen->info.drm_patchlevel,
+ screen->get_name(screen),
+ r300->screen->info.pci_id,
+ r300->screen->info.r300_num_gb_pipes,
+ r300->screen->info.r300_num_z_pipes,
+ r300->screen->info.gart_size >> 20,
+ r300->screen->info.vram_size >> 20,
+ "YES", /* XXX really? */
+ r300->screen->caps.zmask_ram ? "YES" : "NO",
+ r300->screen->caps.hiz_ram ? "YES" : "NO");
}
+
+ return &r300->context;
+
+fail:
+ r300_destroy_context(&r300->context);
+ return NULL;
}
projects / mesa.git / blobdiff