unsigned size, void* state)
{
struct pipe_clip_state* clip = (struct pipe_clip_state*)state;
- int i;
CS_LOCALS(r300);
if (r300->screen->caps.has_tcl) {
(r300->screen->caps.is_r500 ?
R500_PVS_UCP_START : R300_PVS_UCP_START));
OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4);
- for (i = 0; i < 6; i++) {
- OUT_CS_32F(clip->ucp[i][0]);
- OUT_CS_32F(clip->ucp[i][1]);
- OUT_CS_32F(clip->ucp[i][2]);
- OUT_CS_32F(clip->ucp[i][3]);
- }
+ OUT_CS_TABLE(clip->ucp, 6 * 4);
OUT_CS_REG(R300_VAP_CLIP_CNTL, ((1 << clip->nr) - 1) |
R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
END_CS;
OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE);
END_CS;
}
-
}
void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state)
OUT_CS_REG(R300_US_CODE_OFFSET, code->code_offset);
OUT_CS_REG_SEQ(R300_US_CODE_ADDR_0, 4);
- for(i = 0; i < 4; ++i)
- OUT_CS(code->code_addr[i]);
+ OUT_CS_TABLE(code->code_addr, 4);
OUT_CS_REG_SEQ(R300_US_ALU_RGB_INST_0, code->alu.length);
for (i = 0; i < code->alu.length; i++)
if (code->tex.length) {
OUT_CS_REG_SEQ(R300_US_TEX_INST_0, code->tex.length);
- for(i = 0; i < code->tex.length; ++i)
- OUT_CS(code->tex.inst[i]);
+ OUT_CS_TABLE(code->tex.inst, code->tex.length);
}
/* Emit immediates. */
R500_GA_US_VECTOR_INDEX_TYPE_CONST |
(i & R500_GA_US_VECTOR_INDEX_MASK));
OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);
- OUT_CS_32F(data[0]);
- OUT_CS_32F(data[1]);
- OUT_CS_32F(data[2]);
- OUT_CS_32F(data[3]);
+ OUT_CS_TABLE(data, 4);
}
}
}
OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST);
OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, count * 4);
for(i = 0; i < count; ++i) {
- const float *data;
assert(constants->Constants[i].Type == RC_CONSTANT_EXTERNAL);
- data = buf->constants[i];
-
- OUT_CS_32F(data[0]);
- OUT_CS_32F(data[1]);
- OUT_CS_32F(data[2]);
- OUT_CS_32F(data[3]);
}
+ OUT_CS_TABLE(buf->constants, count * 4);
END_CS;
}
R500_GA_US_VECTOR_INDEX_TYPE_CONST |
(i & R500_GA_US_VECTOR_INDEX_MASK));
OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);
- OUT_CS_32F(data[0]);
- OUT_CS_32F(data[1]);
- OUT_CS_32F(data[2]);
- OUT_CS_32F(data[3]);
+ OUT_CS_TABLE(data, 4);
}
}
END_CS;
OUT_CS(((fb->width + 1440-1) << R300_SCISSORS_X_SHIFT) |
((fb->height + 1440-1) << R300_SCISSORS_Y_SHIFT));
}
- OUT_CS_REG(R300_GA_POINT_MINMAX,
- (MAX2(fb->width, fb->height) * 6) << R300_GA_POINT_MINMAX_MAX_SHIFT);
END_CS;
}
OUT_CS_REG(R300_GB_AA_CONFIG, rs->antialiasing_config);
OUT_CS_REG(R300_GA_POINT_SIZE, rs->point_size);
- OUT_CS_REG(R300_GA_LINE_CNTL, rs->line_control);
+ OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX, 2);
+ OUT_CS(rs->point_minmax);
+ OUT_CS(rs->line_control);
if (rs->polygon_offset_enable) {
scale = rs->depth_scale * 12;
DBG(r300, DBG_DRAW, "r300: RS emit:\n");
BEGIN_CS(size);
+ OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
+ OUT_CS(rs->vap_vtx_state_cntl);
+ OUT_CS(rs->vap_vsm_vtx_assm);
+ OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
+ OUT_CS(rs->vap_out_vtx_fmt[0]);
+ OUT_CS(rs->vap_out_vtx_fmt[1]);
+
if (r300->screen->caps.is_r500) {
OUT_CS_REG_SEQ(R500_RS_IP_0, count);
} else {
OUT_CS_REG_SEQ(R300_RS_IP_0, count);
}
+ OUT_CS_TABLE(rs->ip, count);
for (i = 0; i < count; i++) {
- OUT_CS(rs->ip[i]);
DBG(r300, DBG_DRAW, " : ip %d: 0x%08x\n", i, rs->ip[i]);
}
} else {
OUT_CS_REG_SEQ(R300_RS_INST_0, count);
}
+ OUT_CS_TABLE(rs->inst, count);
for (i = 0; i < count; i++) {
- OUT_CS(rs->inst[i]);
DBG(r300, DBG_DRAW, " : inst %d: 0x%08x\n", i, rs->inst[i]);
}
END_CS;
}
-void r300_emit_aos(struct r300_context* r300, unsigned offset)
+void r300_emit_aos(struct r300_context* r300, unsigned offset, boolean indexed)
{
struct pipe_vertex_buffer *vb1, *vb2, *vbuf = r300->vertex_buffer;
struct pipe_vertex_element *velem = r300->velems->velem;
unsigned packet_size = (aos_count * 3 + 1) / 2;
CS_LOCALS(r300);
+ for (i = 0; i < aos_count; i++) {
+ if ((vbuf[velem[i].vertex_buffer_index].buffer_offset + velem[i].src_offset) % 4 != 0) {
+ /* XXX We must align the buffer. */
+ assert(0);
+ fprintf(stderr, "r300: Unaligned vertex buffer offsets aren't supported, aborting..\n");
+ abort();
+ }
+ }
+
BEGIN_CS(2 + packet_size + aos_count * 2);
OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, packet_size);
- OUT_CS(aos_count);
+ OUT_CS(aos_count | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
for (i = 0; i < aos_count - 1; i += 2) {
vb1 = &vbuf[velem[i].vertex_buffer_index];
BEGIN_CS(size);
OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, streams->count);
+ OUT_CS_TABLE(streams->vap_prog_stream_cntl, streams->count);
for (i = 0; i < streams->count; i++) {
- OUT_CS(streams->vap_prog_stream_cntl[i]);
DBG(r300, DBG_DRAW, " : prog_stream_cntl%d: 0x%08x\n", i,
streams->vap_prog_stream_cntl[i]);
}
OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, streams->count);
+ OUT_CS_TABLE(streams->vap_prog_stream_cntl_ext, streams->count);
for (i = 0; i < streams->count; i++) {
- OUT_CS(streams->vap_prog_stream_cntl_ext[i]);
DBG(r300, DBG_DRAW, " : prog_stream_cntl_ext%d: 0x%08x\n", i,
streams->vap_prog_stream_cntl_ext[i]);
}
END_CS;
}
-void r300_emit_vap_output_state(struct r300_context* r300,
- unsigned size, void* state)
-{
- struct r300_vap_output_state *vap_out_state =
- (struct r300_vap_output_state*)state;
- CS_LOCALS(r300);
-
- DBG(r300, DBG_DRAW, "r300: VAP emit:\n");
-
- BEGIN_CS(size);
- OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
- OUT_CS(vap_out_state->vap_vtx_state_cntl);
- OUT_CS(vap_out_state->vap_vsm_vtx_assm);
- OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
- OUT_CS(vap_out_state->vap_out_vtx_fmt[0]);
- OUT_CS(vap_out_state->vap_out_vtx_fmt[1]);
- END_CS;
-}
-
void r300_emit_pvs_flush(struct r300_context* r300, unsigned size, void* state)
{
CS_LOCALS(r300);
OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length);
- for (i = 0; i < code->length; i++) {
- OUT_CS(code->body.d[i]);
- }
+ OUT_CS_TABLE(code->body.d, code->length);
OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) |
R300_PVS_NUM_CNTLRS(pvs_num_controllers) |
OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, imm_count * 4);
for (i = imm_first; i < imm_end; i++) {
const float *data = vs->code.constants.Constants[i].u.Immediate;
- OUT_CS_32F(data[0]);
- OUT_CS_32F(data[1]);
- OUT_CS_32F(data[2]);
- OUT_CS_32F(data[3]);
+ OUT_CS_TABLE(data, 4);
}
}
END_CS;
void r300_emit_vs_constants(struct r300_context* r300,
unsigned size, void *state)
{
- unsigned i;
unsigned count =
((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;
struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
(r300->screen->caps.is_r500 ?
R500_PVS_CONST_START : R300_PVS_CONST_START));
OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, count * 4);
- for (i = 0; i < count; i++) {
- const float *data = buf->constants[i];
- OUT_CS_32F(data[0]);
- OUT_CS_32F(data[1]);
- OUT_CS_32F(data[2]);
- OUT_CS_32F(data[3]);
- }
+ OUT_CS_TABLE(buf->constants, count * 4);
END_CS;
}
struct r300_viewport_state* viewport = (struct r300_viewport_state*)state;
CS_LOCALS(r300);
- BEGIN_CS(size);
- OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
- OUT_CS_32F(viewport->xscale);
- OUT_CS_32F(viewport->xoffset);
- OUT_CS_32F(viewport->yscale);
- OUT_CS_32F(viewport->yoffset);
- OUT_CS_32F(viewport->zscale);
- OUT_CS_32F(viewport->zoffset);
- OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
- END_CS;
+ BEGIN_CS(size);
+ OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
+ OUT_CS_32F(viewport->xscale);
+ OUT_CS_32F(viewport->xoffset);
+ OUT_CS_32F(viewport->yscale);
+ OUT_CS_32F(viewport->yoffset);
+ OUT_CS_32F(viewport->zscale);
+ OUT_CS_32F(viewport->zoffset);
+ OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
+ END_CS;
}
void r300_emit_ztop_state(struct r300_context* r300,
}
}
+ /* let's reserve some more, just in case */
+ dwords += 32;
+
return dwords;
}
foreach(atom, &r300->atom_list) {
if (atom->dirty) {
atom->emit(r300, atom->size, atom->state);
+ if (SCREEN_DBG_ON(r300->screen, DBG_STATS)) {
+ atom->counter++;
+ }
atom->dirty = FALSE;
}
}