CS_LOCALS(r300);
if (fb->nr_cbufs) {
- WRITE_CS_TABLE(blend->cb, size);
+ if (fb->cbufs[0]->format == PIPE_FORMAT_R16G16B16A16_FLOAT) {
+ WRITE_CS_TABLE(blend->cb_noclamp, size);
+ } else {
+ unsigned swz = r300_surface(fb->cbufs[0])->colormask_swizzle;
+ WRITE_CS_TABLE(blend->cb_clamp[swz], size);
+ }
} else {
WRITE_CS_TABLE(blend->cb_no_readwrite, size);
}
CS_LOCALS(r300);
if (fb->zsbuf) {
- WRITE_CS_TABLE(&dsa->cb_begin, size);
+ if (fb->nr_cbufs && fb->cbufs[0]->format == PIPE_FORMAT_R16G16B16A16_FLOAT)
+ WRITE_CS_TABLE(&dsa->cb_begin_fp16, size);
+ else
+ WRITE_CS_TABLE(&dsa->cb_begin, size);
} else {
- WRITE_CS_TABLE(dsa->cb_no_readwrite, size);
+ if (fb->nr_cbufs && fb->cbufs[0]->format == PIPE_FORMAT_R16G16B16A16_FLOAT)
+ WRITE_CS_TABLE(dsa->cb_fp16_zb_no_readwrite, size);
+ else
+ WRITE_CS_TABLE(dsa->cb_zb_no_readwrite, size);
}
}
case RC_STATE_R300_TEXSCALE_FACTOR:
tex = r300_resource(texstate->sampler_views[constant->u.State[1]]->base.texture);
/* Add a small number to the texture size to work around rounding errors in hw. */
- vec[0] = tex->b.b.b.width0 / (tex->tex.width0 + 0.001f);
- vec[1] = tex->b.b.b.height0 / (tex->tex.height0 + 0.001f);
- vec[2] = tex->b.b.b.depth0 / (tex->tex.depth0 + 0.001f);
+ vec[0] = tex->b.b.width0 / (tex->tex.width0 + 0.001f);
+ vec[1] = tex->b.b.height0 / (tex->tex.height0 + 0.001f);
+ vec[2] = tex->b.b.depth0 / (tex->tex.depth0 + 0.001f);
vec[3] = 1;
break;
struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state;
struct r300_surface* surf;
unsigned i;
- boolean can_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
uint32_t rb3d_cctl = 0;
CS_LOCALS(r300);
if (r300->screen->caps.is_r500) {
rb3d_cctl = R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE;
}
- if (fb->nr_cbufs &&
- r300_fragment_shader_writes_all(r300_fs(r300))) {
+ if (fb->nr_cbufs && r300->fb_multiwrite) {
rb3d_cctl |= R300_RB3D_CCTL_NUM_MULTIWRITES(fb->nr_cbufs);
}
OUT_CS_REG(R300_ZB_DEPTHPITCH, surf->pitch);
OUT_CS_RELOC(surf);
- if (can_hyperz) {
- uint32_t surf_pitch;
- struct r300_resource *tex;
- int level = surf->base.u.tex.level;
- tex = r300_resource(surf->base.texture);
-
- surf_pitch = surf->pitch & R300_DEPTHPITCH_MASK;
-
+ if (r300->hyperz_enabled) {
/* HiZ RAM. */
- if (r300->screen->caps.hiz_ram) {
- if (tex->hiz_mem[level]) {
- OUT_CS_REG(R300_ZB_HIZ_OFFSET, tex->hiz_mem[level]->ofs << 2);
- OUT_CS_REG(R300_ZB_HIZ_PITCH, surf_pitch);
- } else {
- OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0);
- OUT_CS_REG(R300_ZB_HIZ_PITCH, 0);
- }
- }
-
+ OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0);
+ OUT_CS_REG(R300_ZB_HIZ_PITCH, surf->pitch_hiz);
/* Z Mask RAM. (compressed zbuffer) */
OUT_CS_REG(R300_ZB_ZMASK_OFFSET, 0);
- OUT_CS_REG(R300_ZB_ZMASK_PITCH, surf_pitch);
+ OUT_CS_REG(R300_ZB_ZMASK_PITCH, surf->pitch_zmask);
}
}
struct pipe_framebuffer_state* fb =
(struct pipe_framebuffer_state*)r300->fb_state.state;
unsigned i, num_cbufs = fb->nr_cbufs;
+ unsigned mspos0, mspos1;
CS_LOCALS(r300);
/* If we use the multiwrite feature, the colorbuffers 2,3,4 must be
* marked as UNUSED in the US block. */
- if (r300_fragment_shader_writes_all(r300_fs(r300))) {
+ if (r300->fb_multiwrite) {
num_cbufs = MIN2(num_cbufs, 1);
}
for (i = 0; i < num_cbufs; i++) {
OUT_CS(r300_surface(fb->cbufs[i])->format);
}
+ for (; i < 1; i++) {
+ OUT_CS(R300_US_OUT_FMT_C4_8 |
+ R300_C0_SEL_B | R300_C1_SEL_G |
+ R300_C2_SEL_R | R300_C3_SEL_A);
+ }
for (; i < 4; i++) {
OUT_CS(R300_US_OUT_FMT_UNUSED);
}
/* Multisampling. Depends on framebuffer sample count.
* These are pipelined regs and as such cannot be moved
* to the AA state. */
- if (r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) {
- unsigned mspos0 = 0x66666666;
- unsigned mspos1 = 0x6666666;
-
- if (fb->nr_cbufs && fb->cbufs[0]->texture->nr_samples > 1) {
- /* Subsample placement. These may not be optimal. */
- switch (fb->cbufs[0]->texture->nr_samples) {
- case 2:
- mspos0 = 0x33996633;
- mspos1 = 0x6666663;
- break;
- case 3:
- mspos0 = 0x33936933;
- mspos1 = 0x6666663;
- break;
- case 4:
- mspos0 = 0x33939933;
- mspos1 = 0x3966663;
- break;
- case 6:
- mspos0 = 0x22a2aa22;
- mspos1 = 0x2a65672;
- break;
- default:
- debug_printf("r300: Bad number of multisamples!\n");
- }
- }
+ mspos0 = 0x66666666;
+ mspos1 = 0x6666666;
- OUT_CS_REG_SEQ(R300_GB_MSPOS0, 2);
- OUT_CS(mspos0);
- OUT_CS(mspos1);
+ if (fb->nr_cbufs && fb->cbufs[0]->texture->nr_samples > 1) {
+ /* Subsample placement. These may not be optimal. */
+ switch (fb->cbufs[0]->texture->nr_samples) {
+ case 2:
+ mspos0 = 0x33996633;
+ mspos1 = 0x6666663;
+ break;
+ case 3:
+ mspos0 = 0x33936933;
+ mspos1 = 0x6666663;
+ break;
+ case 4:
+ mspos0 = 0x33939933;
+ mspos1 = 0x3966663;
+ break;
+ case 6:
+ mspos0 = 0x22a2aa22;
+ mspos1 = 0x2a65672;
+ break;
+ default:
+ debug_printf("r300: Bad number of multisamples!\n");
+ }
}
+
+ OUT_CS_REG_SEQ(R300_GB_MSPOS0, 2);
+ OUT_CS(mspos0);
+ OUT_CS(mspos1);
END_CS;
}
struct r300_query *query)
{
struct r300_capabilities* caps = &r300->screen->caps;
+ uint32_t gb_pipes = r300->screen->info.r300_num_gb_pipes;
CS_LOCALS(r300);
- assert(caps->num_frag_pipes);
+ assert(gb_pipes);
- BEGIN_CS(6 * caps->num_frag_pipes + 2);
+ BEGIN_CS(6 * gb_pipes + 2);
/* I'm not so sure I like this switch, but it's hard to be elegant
* when there's so many special cases...
*
* 4-byte offset for each pipe. RV380 and older are special; they have
* only two pipes, and the second pipe's enable is on bit 3, not bit 1,
* so there's a chipset cap for that. */
- switch (caps->num_frag_pipes) {
+ switch (gb_pipes) {
case 4:
/* pipe 3 only */
OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);
break;
default:
fprintf(stderr, "r300: Implementation error: Chipset reports %d"
- " pixel pipes!\n", caps->num_frag_pipes);
+ " pixel pipes!\n", gb_pipes);
abort();
}
return;
if (caps->family == CHIP_FAMILY_RV530) {
- if (caps->num_z_pipes == 2)
+ if (r300->screen->info.r300_num_z_pipes == 2)
rv530_emit_query_end_double_z(r300, query);
else
rv530_emit_query_end_single_z(r300, query);
query->num_results += query->num_pipes;
/* XXX grab all the results and reset the counter. */
- if (query->num_results >= query->buffer_size / 4 - 4) {
- query->num_results = (query->buffer_size / 4) / 2;
+ if (query->num_results >= query->buf->size / 4 - 4) {
+ query->num_results = (query->buf->size / 4) / 2;
fprintf(stderr, "r300: Rewinding OQBO...\n");
}
}
struct r300_texture_sampler_state *texstate;
struct r300_resource *tex;
unsigned i;
+ boolean has_us_format = r300->screen->caps.has_us_format;
CS_LOCALS(r300);
BEGIN_CS(size);
OUT_CS_REG(R300_TX_OFFSET_0 + (i * 4), texstate->format.tile_config);
OUT_CS_RELOC(tex);
+
+ if (has_us_format) {
+ OUT_CS_REG(R500_US_FORMAT0_0 + (i * 4),
+ texstate->format.us_format0);
+ }
}
}
END_CS;
}
-void r300_emit_vertex_arrays(struct r300_context* r300, int offset, boolean indexed)
+void r300_emit_vertex_arrays(struct r300_context* r300, int offset,
+ boolean indexed, int instance_id)
{
- struct pipe_vertex_buffer *vbuf = r300->vbuf_mgr->vertex_buffer;
- struct pipe_resource **valid_vbuf = r300->vbuf_mgr->real_vertex_buffer;
+ struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
struct pipe_vertex_element *velem = r300->velems->velem;
struct r300_resource *buf;
int i;
unsigned vertex_array_count = r300->velems->count;
unsigned packet_size = (vertex_array_count * 3 + 1) / 2;
struct pipe_vertex_buffer *vb1, *vb2;
- unsigned *hw_format_size;
- unsigned size1, size2;
+ unsigned *hw_format_size = r300->velems->format_size;
+ unsigned size1, size2, offset1, offset2, stride1, stride2;
CS_LOCALS(r300);
BEGIN_CS(2 + packet_size + vertex_array_count * 2);
OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, packet_size);
OUT_CS(vertex_array_count | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
- hw_format_size = r300->velems->format_size;
+ if (instance_id == -1) {
+ /* Non-instanced arrays. This ignores instance_divisor and instance_id. */
+ for (i = 0; i < vertex_array_count - 1; i += 2) {
+ vb1 = &vbuf[velem[i].vertex_buffer_index];
+ vb2 = &vbuf[velem[i+1].vertex_buffer_index];
+ size1 = hw_format_size[i];
+ size2 = hw_format_size[i+1];
+
+ OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride) |
+ R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(vb2->stride));
+ OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
+ OUT_CS(vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride);
+ }
- for (i = 0; i < vertex_array_count - 1; i += 2) {
- vb1 = &vbuf[velem[i].vertex_buffer_index];
- vb2 = &vbuf[velem[i+1].vertex_buffer_index];
- size1 = hw_format_size[i];
- size2 = hw_format_size[i+1];
+ if (vertex_array_count & 1) {
+ vb1 = &vbuf[velem[i].vertex_buffer_index];
+ size1 = hw_format_size[i];
- OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride) |
- R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(vb2->stride));
- OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
- OUT_CS(vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride);
- }
+ OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride));
+ OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
+ }
- if (vertex_array_count & 1) {
- vb1 = &vbuf[velem[i].vertex_buffer_index];
- size1 = hw_format_size[i];
+ for (i = 0; i < vertex_array_count; i++) {
+ buf = r300_resource(vbuf[velem[i].vertex_buffer_index].buffer);
+ OUT_CS_RELOC(buf);
+ }
+ } else {
+ /* Instanced arrays. */
+ for (i = 0; i < vertex_array_count - 1; i += 2) {
+ vb1 = &vbuf[velem[i].vertex_buffer_index];
+ vb2 = &vbuf[velem[i+1].vertex_buffer_index];
+ size1 = hw_format_size[i];
+ size2 = hw_format_size[i+1];
+
+ if (velem[i].instance_divisor) {
+ stride1 = 0;
+ offset1 = vb1->buffer_offset + velem[i].src_offset +
+ (instance_id / velem[i].instance_divisor) * vb1->stride;
+ } else {
+ stride1 = vb1->stride;
+ offset1 = vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride;
+ }
+ if (velem[i+1].instance_divisor) {
+ stride2 = 0;
+ offset2 = vb2->buffer_offset + velem[i+1].src_offset +
+ (instance_id / velem[i+1].instance_divisor) * vb2->stride;
+ } else {
+ stride2 = vb2->stride;
+ offset2 = vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride;
+ }
- OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride));
- OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
- }
+ OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(stride1) |
+ R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(stride2));
+ OUT_CS(offset1);
+ OUT_CS(offset2);
+ }
+
+ if (vertex_array_count & 1) {
+ vb1 = &vbuf[velem[i].vertex_buffer_index];
+ size1 = hw_format_size[i];
+
+ if (velem[i].instance_divisor) {
+ stride1 = 0;
+ offset1 = vb1->buffer_offset + velem[i].src_offset +
+ (instance_id / velem[i].instance_divisor) * vb1->stride;
+ } else {
+ stride1 = vb1->stride;
+ offset1 = vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride;
+ }
+
+ OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(stride1));
+ OUT_CS(offset1);
+ }
- for (i = 0; i < vertex_array_count; i++) {
- buf = r300_resource(valid_vbuf[velem[i].vertex_buffer_index]);
- OUT_CS_RELOC(buf);
+ for (i = 0; i < vertex_array_count; i++) {
+ buf = r300_resource(vbuf[velem[i].vertex_buffer_index].buffer);
+ OUT_CS_RELOC(buf);
+ }
}
END_CS;
}
R300_PVS_VF_MAX_VTX_NUM(12) |
(r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));
- /* Emit flow control instructions. */
- if (code->num_fc_ops) {
-
- OUT_CS_REG(R300_VAP_PVS_FLOW_CNTL_OPC, code->fc_ops);
- if (r300screen->caps.is_r500) {
- OUT_CS_REG_SEQ(R500_VAP_PVS_FLOW_CNTL_ADDRS_LW_0, code->num_fc_ops * 2);
- OUT_CS_TABLE(code->fc_op_addrs.r500, code->num_fc_ops * 2);
- } else {
- OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_ADDRS_0, code->num_fc_ops);
- OUT_CS_TABLE(code->fc_op_addrs.r300, code->num_fc_ops);
- }
- OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_LOOP_INDEX_0, code->num_fc_ops);
- OUT_CS_TABLE(code->fc_loop_index, code->num_fc_ops);
+ /* Emit flow control instructions. Even if there are no fc instructions,
+ * we still need to write the registers to make sure they are cleared. */
+ OUT_CS_REG(R300_VAP_PVS_FLOW_CNTL_OPC, code->fc_ops);
+ if (r300screen->caps.is_r500) {
+ OUT_CS_REG_SEQ(R500_VAP_PVS_FLOW_CNTL_ADDRS_LW_0, R300_VS_MAX_FC_OPS * 2);
+ OUT_CS_TABLE(code->fc_op_addrs.r500, R300_VS_MAX_FC_OPS * 2);
+ } else {
+ OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_ADDRS_0, R300_VS_MAX_FC_OPS);
+ OUT_CS_TABLE(code->fc_op_addrs.r300, R300_VS_MAX_FC_OPS);
}
+ OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_LOOP_INDEX_0, R300_VS_MAX_FC_OPS);
+ OUT_CS_TABLE(code->fc_loop_index, R300_VS_MAX_FC_OPS);
END_CS;
}
END_CS;
}
-static void r300_emit_hiz_line_clear(struct r300_context *r300, int start, uint16_t count, uint32_t val)
-{
- CS_LOCALS(r300);
- BEGIN_CS(4);
- OUT_CS_PKT3(R300_PACKET3_3D_CLEAR_HIZ, 2);
- OUT_CS(start);
- OUT_CS(count);
- OUT_CS(val);
- END_CS;
-}
-
-#define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
-
void r300_emit_hiz_clear(struct r300_context *r300, unsigned size, void *state)
{
struct pipe_framebuffer_state *fb =
(struct pipe_framebuffer_state*)r300->fb_state.state;
- struct r300_hyperz_state *z =
- (struct r300_hyperz_state*)r300->hyperz_state.state;
- struct r300_screen* r300screen = r300->screen;
- uint32_t stride, offset = 0, height, offset_shift;
struct r300_resource* tex;
- int i;
+ CS_LOCALS(r300);
tex = r300_resource(fb->zsbuf->texture);
- offset = tex->hiz_mem[fb->zsbuf->u.tex.level]->ofs;
- stride = tex->tex.stride_in_pixels[fb->zsbuf->u.tex.level];
-
- /* convert from pixels to 4x4 blocks */
- stride = ALIGN_DIVUP(stride, 4);
-
- stride = ALIGN_DIVUP(stride, r300screen->caps.num_frag_pipes);
- /* there are 4 blocks per dwords */
- stride = ALIGN_DIVUP(stride, 4);
-
- height = ALIGN_DIVUP(fb->zsbuf->height, 4);
-
- offset_shift = 2;
- offset_shift += (r300screen->caps.num_frag_pipes / 2);
-
- for (i = 0; i < height; i++) {
- offset = i * stride;
- offset <<= offset_shift;
- r300_emit_hiz_line_clear(r300, offset, stride, 0xffffffff);
- }
- z->current_func = -1;
+ BEGIN_CS(size);
+ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
+ R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
+ R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
+ OUT_CS_PKT3(R300_PACKET3_3D_CLEAR_HIZ, 2);
+ OUT_CS(0);
+ OUT_CS(tex->tex.hiz_dwords[fb->zsbuf->u.tex.level]);
+ OUT_CS(r300->hiz_clear_value);
+ END_CS;
/* Mark the current zbuffer's hiz ram as in use. */
- tex->hiz_in_use[fb->zsbuf->u.tex.level] = TRUE;
+ r300->hiz_in_use = TRUE;
+ r300->hiz_func = HIZ_FUNC_NONE;
+ r300_mark_atom_dirty(r300, &r300->hyperz_state);
}
void r300_emit_zmask_clear(struct r300_context *r300, unsigned size, void *state)
tex = r300_resource(fb->zsbuf->texture);
BEGIN_CS(size);
+ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
+ R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
+ R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
OUT_CS_PKT3(R300_PACKET3_3D_CLEAR_ZMASK, 2);
OUT_CS(0);
OUT_CS(tex->tex.zmask_dwords[fb->zsbuf->u.tex.level]);
for (i = 0; i < fb->nr_cbufs; i++) {
tex = r300_resource(fb->cbufs[i]->texture);
assert(tex && tex->buf && "cbuf is marked, but NULL!");
- r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, 0,
+ r300->rws->cs_add_reloc(r300->cs, tex->cs_buf,
+ RADEON_USAGE_READWRITE,
r300_surface(fb->cbufs[i])->domain);
}
/* ...depth buffer... */
if (fb->zsbuf) {
tex = r300_resource(fb->zsbuf->texture);
assert(tex && tex->buf && "zsbuf is marked, but NULL!");
- r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, 0,
+ r300->rws->cs_add_reloc(r300->cs, tex->cs_buf,
+ RADEON_USAGE_READWRITE,
r300_surface(fb->zsbuf)->domain);
}
}
}
tex = r300_resource(texstate->sampler_views[i]->base.texture);
- r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, tex->domain, 0);
+ r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, RADEON_USAGE_READ,
+ tex->domain);
}
}
/* ...occlusion query buffer... */
if (r300->query_current)
r300->rws->cs_add_reloc(r300->cs, r300->query_current->cs_buf,
- 0, r300->query_current->domain);
+ RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
/* ...vertex buffer for SWTCL path... */
if (r300->vbo)
r300->rws->cs_add_reloc(r300->cs, r300_resource(r300->vbo)->cs_buf,
- r300_resource(r300->vbo)->domain, 0);
+ RADEON_USAGE_READ,
+ r300_resource(r300->vbo)->domain);
/* ...vertex buffers for HWTCL path... */
if (do_validate_vertex_buffers && r300->vertex_arrays_dirty) {
- struct pipe_resource **buf = r300->vbuf_mgr->real_vertex_buffer;
- struct pipe_resource **last = r300->vbuf_mgr->real_vertex_buffer +
- r300->vbuf_mgr->nr_real_vertex_buffers;
- for (; buf != last; buf++) {
- if (!*buf)
+ struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
+ struct pipe_vertex_buffer *last = r300->vertex_buffer +
+ r300->nr_vertex_buffers;
+ struct pipe_resource *buf;
+
+ for (; vbuf != last; vbuf++) {
+ buf = vbuf->buffer;
+ if (!buf)
continue;
- r300->rws->cs_add_reloc(r300->cs, r300_resource(*buf)->cs_buf,
- r300_resource(*buf)->domain, 0);
+ r300->rws->cs_add_reloc(r300->cs, r300_resource(buf)->cs_buf,
+ RADEON_USAGE_READ,
+ r300_resource(buf)->domain);
}
}
/* ...and index buffer for HWTCL path. */
if (index_buffer)
r300->rws->cs_add_reloc(r300->cs, r300_resource(index_buffer)->cs_buf,
- r300_resource(index_buffer)->domain, 0);
+ RADEON_USAGE_READ,
+ r300_resource(index_buffer)->domain);
- /* Now do the validation. */
+ /* Now do the validation (flush is called inside cs_validate on failure). */
if (!r300->rws->cs_validate(r300->cs)) {
/* Ooops, an infinite loop, give up. */
if (flushed)
return FALSE;
- r300->context.flush(&r300->context, 0, NULL);
flushed = TRUE;
goto validate;
}
/* Emitted in flush. */
dwords += 26; /* emit_query_end */
dwords += r300->hyperz_state.size + 2; /* emit_hyperz_end + zcache flush */
- if (r300->screen->caps.index_bias_supported)
+ if (r300->screen->caps.is_r500)
dwords += 2;
return dwords;