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r300g: add support for all missing non-FP sampler formats
[mesa.git] / src / gallium / drivers / r300 / r300_emit.c
diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c
index a429457625a285c77ecb77f83dea635c07c2acbc..88fe166359b371e0c2a7bcd8a56ba313465aa9e7 100644 (file)
--- a/src/gallium/drivers/r300/r300_emit.c
+++ b/src/gallium/drivers/r300/r300_emit.c
@@ -114,16 +114,11 @@ void r300_emit_dsa_state(struct r300_context* r300, void* state)
     struct r300_screen* r300screen = r300_screen(r300->context.screen);
     struct pipe_framebuffer_state* fb =
         (struct pipe_framebuffer_state*)r300->fb_state.state;
+    struct pipe_stencil_ref stencil_ref = r300->stencil_ref;
     CS_LOCALS(r300);
 
     BEGIN_CS(r300screen->caps->is_r500 ? 8 : 6);
     OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
-
-    /* not needed since we use the 8bit alpha ref */
-    /*if (r300screen->caps->is_r500) {
-        OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference);
-    }*/
-
     OUT_CS_REG_SEQ(R300_ZB_CNTL, 3);
 
     if (fb->zsbuf) {
@@ -134,11 +129,10 @@ void r300_emit_dsa_state(struct r300_context* r300, void* state)
         OUT_CS(0);
     }
 
-    OUT_CS(dsa->stencil_ref_mask);
+    OUT_CS(dsa->stencil_ref_mask | stencil_ref.ref_value[0]);
 
-    /* XXX it seems r3xx doesn't support STENCILREFMASK_BF */
     if (r300screen->caps->is_r500) {
-        OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf);
+        OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf | stencil_ref.ref_value[1]);
     }
     END_CS;
 }
@@ -388,13 +382,13 @@ void r500_emit_fs_constant_buffer(struct r300_context* r300,
 void r300_emit_fb_state(struct r300_context* r300, void* state)
 {
     struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state;
+    struct r300_screen* r300screen = r300_screen(r300->context.screen);
     struct r300_texture* tex;
     struct pipe_surface* surf;
     int i;
     CS_LOCALS(r300);
 
-    BEGIN_CS((10 * fb->nr_cbufs) + (2 * (4 - fb->nr_cbufs)) +
-             (fb->zsbuf ? 10 : 0) + 6);
+    BEGIN_CS((10 * fb->nr_cbufs) + (fb->zsbuf ? 10 : 0) + 6);
 
     /* Flush and free renderbuffer caches. */
     OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
@@ -406,10 +400,14 @@ void r300_emit_fb_state(struct r300_context* r300, void* state)
 
     /* Set the number of colorbuffers. */
     if (fb->nr_cbufs > 1) {
-        OUT_CS_REG(R300_RB3D_CCTL,
-            R300_RB3D_CCTL_NUM_MULTIWRITES(fb->nr_cbufs) |
-            R300_RB3D_CCTL_INDEPENDENT_COLOR_CHANNEL_MASK_ENABLE |
-            R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE);
+        if (r300screen->caps->is_r500) {
+            OUT_CS_REG(R300_RB3D_CCTL,
+                R300_RB3D_CCTL_NUM_MULTIWRITES(fb->nr_cbufs) |
+                R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE);
+        } else {
+            OUT_CS_REG(R300_RB3D_CCTL,
+                R300_RB3D_CCTL_NUM_MULTIWRITES(fb->nr_cbufs));
+        }
     } else {
         OUT_CS_REG(R300_RB3D_CCTL, 0x0);
     }
@@ -426,7 +424,7 @@ void r300_emit_fb_state(struct r300_context* r300, void* state)
         OUT_CS_REG_SEQ(R300_RB3D_COLORPITCH0 + (4 * i), 1);
         OUT_CS_RELOC(tex->buffer, tex->pitch[surf->level] |
                      r300_translate_colorformat(tex->tex.format) |
-                     R300_COLOR_TILE(tex->macrotile) |
+                     R300_COLOR_TILE(tex->mip_macrotile[surf->level]) |
                      R300_COLOR_MICROTILE(tex->microtile),
                      0, RADEON_GEM_DOMAIN_VRAM, 0);
 
@@ -434,11 +432,6 @@ void r300_emit_fb_state(struct r300_context* r300, void* state)
             r300_translate_out_fmt(surf->format));
     }
 
-    /* Disable unused colorbuffers. */
-    for (; i < 4; i++) {
-        OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), R300_US_OUT_FMT_UNUSED);
-    }
-
     /* Set up a zbuffer. */
     if (fb->zsbuf) {
         surf = fb->zsbuf;
@@ -452,7 +445,7 @@ void r300_emit_fb_state(struct r300_context* r300, void* state)
 
         OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1);
         OUT_CS_RELOC(tex->buffer, tex->pitch[surf->level] |
-                     R300_DEPTHMACROTILE(tex->macrotile) |
+                     R300_DEPTHMACROTILE(tex->mip_macrotile[surf->level]) |
                      R300_DEPTHMICROTILE(tex->microtile),
                      0, RADEON_GEM_DOMAIN_VRAM, 0);
     }
@@ -592,7 +585,7 @@ void r300_emit_rs_state(struct r300_context* r300, void* state)
     float scale, offset;
     CS_LOCALS(r300);
 
-    BEGIN_CS(20 + (rs->polygon_offset_enable ? 5 : 0));
+    BEGIN_CS(18 + (rs->polygon_offset_enable ? 5 : 0));
     OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status);
 
     OUT_CS_REG(R300_GB_AA_CONFIG, rs->antialiasing_config);
@@ -627,7 +620,6 @@ void r300_emit_rs_state(struct r300_context* r300, void* state)
     OUT_CS(rs->cull_mode);
     OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config);
     OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value);
-    OUT_CS_REG(R300_GA_COLOR_CONTROL, rs->color_control);
     OUT_CS_REG(R300_GA_POLY_MODE, rs->polygon_mode);
     END_CS;
 }
@@ -637,17 +629,19 @@ void r300_emit_rs_block_state(struct r300_context* r300, void* state)
     struct r300_rs_block* rs = (struct r300_rs_block*)state;
     unsigned i;
     struct r300_screen* r300screen = r300_screen(r300->context.screen);
+    /* It's the same for both INST and IP tables */
+    unsigned count = (rs->inst_count & R300_RS_INST_COUNT_MASK) + 1;
     CS_LOCALS(r300);
 
     DBG(r300, DBG_DRAW, "r300: RS emit:\n");
 
-    BEGIN_CS(21);
+    BEGIN_CS(5 + count*2);
     if (r300screen->caps->is_r500) {
-        OUT_CS_REG_SEQ(R500_RS_IP_0, 8);
+        OUT_CS_REG_SEQ(R500_RS_IP_0, count);
     } else {
-        OUT_CS_REG_SEQ(R300_RS_IP_0, 8);
+        OUT_CS_REG_SEQ(R300_RS_IP_0, count);
     }
-    for (i = 0; i < 8; i++) {
+    for (i = 0; i < count; i++) {
         OUT_CS(rs->ip[i]);
         DBG(r300, DBG_DRAW, "    : ip %d: 0x%08x\n", i, rs->ip[i]);
     }
@@ -657,11 +651,11 @@ void r300_emit_rs_block_state(struct r300_context* r300, void* state)
     OUT_CS(rs->inst_count);
 
     if (r300screen->caps->is_r500) {
-        OUT_CS_REG_SEQ(R500_RS_INST_0, 8);
+        OUT_CS_REG_SEQ(R500_RS_INST_0, count);
     } else {
-        OUT_CS_REG_SEQ(R300_RS_INST_0, 8);
+        OUT_CS_REG_SEQ(R300_RS_INST_0, count);
     }
-    for (i = 0; i < 8; i++) {
+    for (i = 0; i < count; i++) {
         OUT_CS(rs->inst[i]);
         DBG(r300, DBG_DRAW, "    : inst %d: 0x%08x\n", i, rs->inst[i]);
     }
@@ -1154,14 +1148,15 @@ void r300_emit_dirty_state(struct r300_context* r300)
         for (i = 0; i < MIN2(r300->sampler_count, r300->texture_count); i++) {
            if (r300->dirty_state &
                ((R300_NEW_SAMPLER << i) | (R300_NEW_TEXTURE << i))) {
-               if (r300->textures[i]) 
+               if (r300->textures[i]) {
                    r300_emit_texture(r300,
                                      r300->sampler_states[i],
                                      r300->textures[i],
                                      i);
+                    dirty_tex |= r300->dirty_state & (R300_NEW_TEXTURE << i);
+                }
                 r300->dirty_state &=
                     ~((R300_NEW_SAMPLER << i) | (R300_NEW_TEXTURE << i));
-                dirty_tex++;
             }
         }
         r300->dirty_state &= ~(R300_ANY_NEW_SAMPLERS | R300_ANY_NEW_TEXTURES);