struct r300_context* r300 = r300_context(pipe);
struct pipe_draw_info info = *dinfo;
- info.indexed = info.indexed;
-
if (r300->skip_rendering ||
!u_trim_pipe_prim(info.mode, &info.count)) {
return;
r300->vbo = rws->buffer_create(rws,
MAX2(R300_MAX_DRAW_VBO_SIZE, size),
R300_BUFFER_ALIGNMENT, TRUE,
- RADEON_DOMAIN_GTT);
+ RADEON_DOMAIN_GTT, 0);
if (!r300->vbo) {
return FALSE;
}
{
struct r300_render* r300render = r300_render(render);
struct r300_context* r300 = r300render->r300;
- struct radeon_winsys_cs *cs = r300->cs;
- unsigned end_cs_dwords;
unsigned max_index = (r300->vbo->size - r300->draw_vbo_offset) /
(r300render->r300->vertex_info.size * 4) - 1;
- unsigned short_count;
- unsigned free_dwords;
+ struct pipe_resource *index_buffer = NULL;
+ unsigned index_buffer_offset;
CS_LOCALS(r300);
DBG(r300, DBG_DRAW, "r300: render_draw_elements (count: %d)\n", count);
+ u_upload_data(r300->uploader, 0, count * 2, indices,
+ &index_buffer_offset, &index_buffer);
+ if (!index_buffer) {
+ return;
+ }
+
if (!r300_prepare_for_rendering(r300,
PREP_EMIT_STATES |
PREP_EMIT_VARRAYS_SWTCL | PREP_INDEXED,
- NULL, 256, 0, 0, -1)) {
+ index_buffer, 12, 0, 0, -1)) {
+ pipe_resource_reference(&index_buffer, NULL);
return;
}
- /* Below we manage the CS space manually because there may be more
- * indices than it can fit in CS. */
-
- end_cs_dwords = r300_get_num_cs_end_dwords(r300);
-
- while (count) {
- free_dwords =
- RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw - end_cs_dwords - 6;
-
- short_count = MIN2(count, free_dwords * 2);
-
- BEGIN_CS(6);
- OUT_CS_REG(R300_GA_COLOR_CONTROL,
- r300_provoking_vertex_fixes(r300, r300render->prim));
- OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index);
- OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (short_count+1)/2);
- OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (short_count << 16) |
- r300render->hwprim);
- END_CS;
-
- memcpy(cs->buf+cs->cdw, indices, short_count * 2);
- cs->cdw += (short_count + 1) / 2;
+ BEGIN_CS(12);
+ OUT_CS_REG(R300_GA_COLOR_CONTROL,
+ r300_provoking_vertex_fixes(r300, r300render->prim));
+ OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index);
- /* OK now subtract the emitted indices and see if we need to emit
- * another draw packet. */
- indices += short_count;
- count -= short_count;
+ OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
+ OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
+ r300render->hwprim);
- if (count) {
- if (!r300_prepare_for_rendering(r300,
- PREP_EMIT_VARRAYS_SWTCL | PREP_INDEXED,
- NULL, 256, 0, 0, -1))
- return;
+ OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
+ OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2));
+ OUT_CS(index_buffer_offset);
+ OUT_CS((count + 1) / 2);
+ OUT_CS_RELOC(r300_resource(index_buffer));
+ END_CS;
- end_cs_dwords = r300_get_num_cs_end_dwords(r300);
- }
- }
+ pipe_resource_reference(&index_buffer, NULL);
}
static void r300_render_destroy(struct vbuf_render* render)
static const union pipe_color_union zeros;
CS_LOCALS(r300);
+ /* XXX workaround for a lockup in MSAA resolve on SWTCL chipsets, this
+ * function most probably doesn't handle type=NONE correctly */
+ if (!r300->screen->caps.has_tcl && type == UTIL_BLITTER_ATTRIB_NONE) {
+ util_blitter_draw_rectangle(blitter, x1, y1, x2, y2, depth, type, attrib);
+ return;
+ }
+
if (r300->skip_rendering)
return;
r300->sprite_coord_enable = last_sprite_coord_enable;
}
-#if 0
-static void r300_resource_resolve(struct pipe_context *pipe,
- const struct pipe_resolve_info *info)
-{
- struct r300_context *r300 = r300_context(pipe);
- struct pipe_surface *srcsurf, *dstsurf, surf_tmpl;
- struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
- static const union pipe_color_union color;
-
- assert(0 && "Resource resolve is unsupported, invalid call.");
-
- memset(&surf_tmpl, 0, sizeof(surf_tmpl));
- surf_tmpl.format = info->src.res->format;
- surf_tmpl.u.tex.first_layer =
- surf_tmpl.u.tex.last_layer = info->src.layer;
- srcsurf = pipe->create_surface(pipe, info->src.res, &surf_tmpl);
- /* XXX Offset both surfaces by x0,y1. */
-
- surf_tmpl.format = info->dst.res->format;
- surf_tmpl.u.tex.level = info->dst.level;
- surf_tmpl.u.tex.first_layer =
- surf_tmpl.u.tex.last_layer = info->dst.layer;
- dstsurf = pipe->create_surface(pipe, info->dst.res, &surf_tmpl);
-
- DBG(r300, DBG_DRAW, "r300: Resolving resource...\n");
-
- /* Enable AA resolve. */
- aa->dest = r300_surface(dstsurf);
- aa->aaresolve_ctl =
- R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE |
- R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE;
- r300->aa_state.size = 10;
- r300_mark_atom_dirty(r300, &r300->aa_state);
-
- /* Resolve the surface. */
- /* XXX: y1 < 0 ==> Y flip */
- r300->context.clear_render_target(pipe,
- srcsurf, &color, 0, 0,
- info->dst.x1 - info->dst.x0,
- info->dst.y1 - info->dst.y0);
-
- /* Disable AA resolve. */
- aa->dest = NULL;
- aa->aaresolve_ctl = 0;
- r300->aa_state.size = 4;
- r300_mark_atom_dirty(r300, &r300->aa_state);
-
- pipe_surface_reference(&srcsurf, NULL);
- pipe_surface_reference(&dstsurf, NULL);
-}
-#endif
-
void r300_init_render_functions(struct r300_context *r300)
{
/* Set draw functions based on presence of HW TCL. */