#include "util/u_format.h"
#include "util/u_format_s3tc.h"
+#include "util/u_screen.h"
#include "util/u_memory.h"
-#include "os/os_time.h"
+#include "util/os_time.h"
#include "vl/vl_decoder.h"
#include "vl/vl_video_buffer.h"
"ATI RV570"
};
+static const char* r300_get_family_name(struct r300_screen* r300screen)
+{
+ return chip_families[r300screen->caps.family];
+}
+
static const char* r300_get_name(struct pipe_screen* pscreen)
{
struct r300_screen* r300screen = r300_screen(pscreen);
- return chip_families[r300screen->caps.family];
+ return r300_get_family_name(r300screen);
+}
+
+static void r300_disk_cache_create(struct r300_screen* r300screen)
+{
+ struct mesa_sha1 ctx;
+ unsigned char sha1[20];
+ char cache_id[20 * 2 + 1];
+
+ _mesa_sha1_init(&ctx);
+ if (!disk_cache_get_function_identifier(r300_disk_cache_create,
+ &ctx))
+ return;
+
+ _mesa_sha1_final(&ctx, sha1);
+ disk_cache_format_hex_id(cache_id, sha1, 20 * 2);
+
+ r300screen->disk_shader_cache =
+ disk_cache_create(r300_get_family_name(r300screen),
+ cache_id,
+ r300screen->debug);
+}
+
+static struct disk_cache* r300_get_disk_shader_cache(struct pipe_screen* pscreen)
+{
+ struct r300_screen* r300screen = r300_screen(pscreen);
+ return r300screen->disk_shader_cache;
}
static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_NPOT_TEXTURES:
case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
- case PIPE_CAP_TWO_SIDED_STENCIL:
case PIPE_CAP_ANISOTROPIC_FILTER:
case PIPE_CAP_POINT_SPRITE:
case PIPE_CAP_OCCLUSION_QUERY:
- case PIPE_CAP_TEXTURE_SHADOW_MAP:
case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
+ case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
case PIPE_CAP_BLEND_EQUATION_SEPARATE:
case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
case PIPE_CAP_CONDITIONAL_RENDER:
case PIPE_CAP_TEXTURE_BARRIER:
case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
- case PIPE_CAP_USER_INDEX_BUFFERS:
- case PIPE_CAP_USER_CONSTANT_BUFFERS:
case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
case PIPE_CAP_CLIP_HALFZ:
+ case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
return 1;
case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
return 16;
case PIPE_CAP_GLSL_FEATURE_LEVEL:
+ case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
return 120;
/* r300 cannot do swizzling of compressed textures. Supported otherwise. */
case PIPE_CAP_TEXTURE_SWIZZLE:
- return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
+ return r300screen->caps.dxtc_swizzle;
/* We don't support color clamping on r500, so that we can use color
* intepolators for generic varyings. */
case PIPE_CAP_INDEP_BLEND_ENABLE:
case PIPE_CAP_INDEP_BLEND_FUNC:
case PIPE_CAP_DEPTH_CLIP_DISABLE:
+ case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
case PIPE_CAP_SHADER_STENCIL_EXPORT:
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
case PIPE_CAP_TGSI_INSTANCEID:
case PIPE_CAP_QUERY_BUFFER_OBJECT:
case PIPE_CAP_QUERY_MEMORY_INFO:
case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
- case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
+ case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
case PIPE_CAP_CULL_DISTANCE:
case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
case PIPE_CAP_TGSI_VOTE:
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
+ case PIPE_CAP_FBFETCH:
+ case PIPE_CAP_TGSI_MUL_ZERO_WINS:
+ case PIPE_CAP_DOUBLES:
+ case PIPE_CAP_INT64:
+ case PIPE_CAP_INT64_DIVMOD:
+ case PIPE_CAP_TGSI_TEX_TXF_LZ:
+ case PIPE_CAP_TGSI_CLOCK:
+ case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
+ case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
+ case PIPE_CAP_TGSI_BALLOT:
+ case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
+ case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
+ case PIPE_CAP_POST_DEPTH_COVERAGE:
+ case PIPE_CAP_BINDLESS_TEXTURE:
+ case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
+ case PIPE_CAP_QUERY_SO_OVERFLOW:
+ case PIPE_CAP_MEMOBJ:
+ case PIPE_CAP_LOAD_CONSTBUF:
+ case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
+ case PIPE_CAP_TILE_RASTER_ORDER:
+ case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+ case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
+ case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
+ case PIPE_CAP_CONTEXT_PRIORITY_MASK:
+ case PIPE_CAP_FENCE_SIGNAL:
+ case PIPE_CAP_CONSTBUF0_FLAGS:
+ case PIPE_CAP_PACKED_UNIFORMS:
+ case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
+ case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
+ case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
+ case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
+ case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
+ case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
+ case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
+ case PIPE_CAP_MAX_GS_INVOCATIONS:
+ return 32;
+ case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
+ return 1 << 27;
+
/* SWTCL-only features. */
case PIPE_CAP_PRIMITIVE_RESTART:
case PIPE_CAP_USER_VERTEX_BUFFERS:
case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
return r300screen->caps.has_tcl;
- case PIPE_CAP_TGSI_TEXCOORD:
+ case PIPE_CAP_TGSI_TEXCOORD:
return 0;
/* Texturing. */
- case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
+ case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
+ return is_r500 ? 4096 : 2048;
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
/* 13 == 4096, 12 == 2048 */
/* Render targets. */
case PIPE_CAP_MAX_RENDER_TARGETS:
return 4;
- case PIPE_CAP_ENDIANNESS:
+ case PIPE_CAP_ENDIANNESS:
return PIPE_ENDIAN_LITTLE;
case PIPE_CAP_MAX_VIEWPORTS:
case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
return 2048;
+ case PIPE_CAP_MAX_VARYINGS:
+ return 10;
+
case PIPE_CAP_VENDOR_ID:
return 0x1002;
case PIPE_CAP_DEVICE_ID:
return r300screen->info.pci_dev;
case PIPE_CAP_PCI_FUNCTION:
return r300screen->info.pci_func;
+ default:
+ return u_pipe_screen_get_param_defaults(pscreen, param);
}
- return 0;
}
-static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
+static int r300_get_shader_param(struct pipe_screen *pscreen,
+ enum pipe_shader_type shader,
+ enum pipe_shader_cap param)
{
struct r300_screen* r300screen = r300_screen(pscreen);
boolean is_r400 = r300screen->caps.is_r400;
return 1;
case PIPE_SHADER_CAP_MAX_TEMPS:
return is_r500 ? 128 : is_r400 ? 64 : 32;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0; /* unused */
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return r300screen->caps.num_tex_units;
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
case PIPE_SHADER_CAP_SUBROUTINES:
case PIPE_SHADER_CAP_INTEGERS:
- case PIPE_SHADER_CAP_DOUBLES:
+ case PIPE_SHADER_CAP_INT64_ATOMICS:
+ case PIPE_SHADER_CAP_FP16:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
+ case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
+ case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
+ case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
return 0;
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
return 32;
return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return 0;
+ case PIPE_SHADER_CAP_SCALAR_ISA:
+ return 0;
}
break;
case PIPE_SHADER_VERTEX:
return 1;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 32;
- case PIPE_SHADER_CAP_MAX_PREDS:
- return 0; /* unused */
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
return 1;
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_SUBROUTINES:
case PIPE_SHADER_CAP_INTEGERS:
+ case PIPE_SHADER_CAP_FP16:
+ case PIPE_SHADER_CAP_INT64_ATOMICS:
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
- case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
+ case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
+ case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
+ case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
return 0;
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
return 32;
return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return 0;
+ case PIPE_SHADER_CAP_SCALAR_ISA:
+ return 0;
}
break;
+ default:
+ ; /* nothing */
}
return 0;
}
return 16.0f;
case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
return 16.0f;
- case PIPE_CAPF_GUARD_BAND_LEFT:
- case PIPE_CAPF_GUARD_BAND_TOP:
- case PIPE_CAPF_GUARD_BAND_RIGHT:
- case PIPE_CAPF_GUARD_BAND_BOTTOM:
+ case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
+ case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
+ case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
return 0.0f;
default:
debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
enum pipe_format format,
enum pipe_texture_target target,
unsigned sample_count,
+ unsigned storage_sample_count,
unsigned usage)
{
uint32_t retval = 0;
format == PIPE_FORMAT_R16G16B16X16_FLOAT;
const struct util_format_description *desc;
- if (!util_format_is_supported(format, usage))
- return FALSE;
+ if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
+ return false;
/* Check multisampling support. */
switch (sample_count) {
if (rws && !rws->unref(rws))
return;
- pipe_mutex_destroy(r300screen->cmask_mutex);
+ mtx_destroy(&r300screen->cmask_mutex);
slab_destroy_parent(&r300screen->pool_transfers);
+ disk_cache_destroy(r300screen->disk_shader_cache);
+
if (rws)
rws->destroy(rws);
return rws->fence_wait(rws, fence, timeout);
}
-struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
+struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
+ const struct pipe_screen_config *config)
{
struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
r300screen->screen.get_name = r300_get_name;
r300screen->screen.get_vendor = r300_get_vendor;
r300screen->screen.get_device_vendor = r300_get_device_vendor;
+ r300screen->screen.get_disk_shader_cache = r300_get_disk_shader_cache;
r300screen->screen.get_param = r300_get_param;
r300screen->screen.get_shader_param = r300_get_shader_param;
r300screen->screen.get_paramf = r300_get_paramf;
r300_init_screen_resource_functions(r300screen);
+ r300_disk_cache_create(r300screen);
+
slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
- util_format_s3tc_init();
- pipe_mutex_init(r300screen->cmask_mutex);
+ (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
return &r300screen->screen;
}