/* Supported features (boolean caps). */
case PIPE_CAP_NPOT_TEXTURES:
case PIPE_CAP_TWO_SIDED_STENCIL:
- case PIPE_CAP_GLSL:
- /* I'll be frank. This is a lie.
- *
- * We don't truly support GLSL on any of this driver's chipsets.
- * To be fair, no chipset supports the full GLSL specification
- * to the best of our knowledge, but some of the less esoteric
- * features are still missing here.
- *
- * Rather than cripple ourselves intentionally, I'm going to set
- * this flag, and as Gallium's interface continues to change, I
- * hope that this single monolithic GLSL enable can slowly get
- * split down into many different pieces and the state tracker
- * will handle fallbacks transparently, like it should.
- *
- * ~ C.
- */
case PIPE_CAP_ANISOTROPIC_FILTER:
case PIPE_CAP_POINT_SPRITE:
case PIPE_CAP_OCCLUSION_QUERY:
case PIPE_CAP_TEXTURE_SHADOW_MAP:
case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
- case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
case PIPE_CAP_BLEND_EQUATION_SEPARATE:
case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
+ case PIPE_CAP_CONDITIONAL_RENDER:
+ case PIPE_CAP_TEXTURE_BARRIER:
+ case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
+ case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
+ case PIPE_CAP_VERTEX_COLOR_CLAMPED:
return 1;
+ case PIPE_CAP_GLSL_FEATURE_LEVEL:
+ return 120;
+
/* r300 cannot do swizzling of compressed textures. Supported otherwise. */
case PIPE_CAP_TEXTURE_SWIZZLE:
return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
/* Supported on r500 only. */
- case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
+ case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
case PIPE_CAP_SM3:
return is_r500 ? 1 : 0;
/* Unsupported features. */
case PIPE_CAP_TIMER_QUERY:
- case PIPE_CAP_DUAL_SOURCE_BLEND:
+ case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
case PIPE_CAP_INDEP_BLEND_ENABLE:
case PIPE_CAP_INDEP_BLEND_FUNC:
- case PIPE_CAP_DEPTH_CLAMP:
+ case PIPE_CAP_DEPTH_CLIP_DISABLE:
case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
case PIPE_CAP_SHADER_STENCIL_EXPORT:
- case PIPE_CAP_ARRAY_TEXTURES:
+ case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
case PIPE_CAP_TGSI_INSTANCEID:
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
- case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
case PIPE_CAP_SEAMLESS_CUBE_MAP:
case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
+ case PIPE_CAP_SCALED_RESOLVE:
+ case PIPE_CAP_MIN_TEXEL_OFFSET:
+ case PIPE_CAP_MAX_TEXEL_OFFSET:
+ case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
+ case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
+ case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
+ case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
+ case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
+ case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
return 0;
/* SWTCL-only features. */
- case PIPE_CAP_STREAM_OUTPUT:
case PIPE_CAP_PRIMITIVE_RESTART:
return !r300screen->caps.has_tcl;
/* Texturing. */
- case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return r300screen->caps.num_tex_units;
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
/* Render targets. */
case PIPE_CAP_MAX_RENDER_TARGETS:
return 4;
-
- default:
- debug_printf("r300: Warning: Unknown CAP %d in get_param.\n",
- param);
- return 0;
}
+ return 0;
}
static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
boolean is_r400 = r300screen->caps.is_r400;
boolean is_r500 = r300screen->caps.is_r500;
- switch (shader)
- {
+ switch (shader) {
case PIPE_SHADER_FRAGMENT:
switch (param)
{
return 1;
case PIPE_SHADER_CAP_MAX_TEMPS:
return is_r500 ? 128 : is_r400 ? 64 : 32;
- case PIPE_SHADER_CAP_MAX_ADDRS:
- return 0;
case PIPE_SHADER_CAP_MAX_PREDS:
return is_r500 ? 1 : 0;
+ case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
+ return r300screen->caps.num_tex_units;
+ case PIPE_SHADER_CAP_MAX_ADDRS:
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
- return 0;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
- return 0;
case PIPE_SHADER_CAP_SUBROUTINES:
+ case PIPE_SHADER_CAP_INTEGERS:
return 0;
}
break;
case PIPE_SHADER_VERTEX:
+ switch (param)
+ {
+ case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
+ case PIPE_SHADER_CAP_SUBROUTINES:
+ return 0;
+ default:;
+ }
+
if (!r300screen->caps.has_tcl) {
return draw_get_shader_param(shader, param);
}
case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
return is_r500 ? 1024 : 256;
- case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
- case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
- return 0;
case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
case PIPE_SHADER_CAP_MAX_INPUTS:
return 1; /* XXX guessed */
case PIPE_SHADER_CAP_MAX_PREDS:
return is_r500 ? 4 : 0; /* XXX guessed. */
+ case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
+ return 1;
+ case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
+ case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
- return 0;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
- return 0;
- case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
- return 1;
case PIPE_SHADER_CAP_SUBROUTINES:
+ case PIPE_SHADER_CAP_INTEGERS:
+ case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
return 0;
- default:
- break;
}
break;
- default:
- break;
}
return 0;
}
-static float r300_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
+static float r300_get_paramf(struct pipe_screen* pscreen,
+ enum pipe_capf param)
{
struct r300_screen* r300screen = r300_screen(pscreen);
switch (param) {
- case PIPE_CAP_MAX_LINE_WIDTH:
- case PIPE_CAP_MAX_LINE_WIDTH_AA:
- case PIPE_CAP_MAX_POINT_WIDTH:
- case PIPE_CAP_MAX_POINT_WIDTH_AA:
+ case PIPE_CAPF_MAX_LINE_WIDTH:
+ case PIPE_CAPF_MAX_LINE_WIDTH_AA:
+ case PIPE_CAPF_MAX_POINT_WIDTH:
+ case PIPE_CAPF_MAX_POINT_WIDTH_AA:
/* The maximum dimensions of the colorbuffer are our practical
* rendering limits. 2048 pixels should be enough for anybody. */
if (r300screen->caps.is_r500) {
} else {
return 2560.0f;
}
- case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
+ case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
return 16.0f;
- case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
+ case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
return 16.0f;
- case PIPE_CAP_GUARD_BAND_LEFT:
- case PIPE_CAP_GUARD_BAND_TOP:
- case PIPE_CAP_GUARD_BAND_RIGHT:
- case PIPE_CAP_GUARD_BAND_BOTTOM:
+ case PIPE_CAPF_GUARD_BAND_LEFT:
+ case PIPE_CAPF_GUARD_BAND_TOP:
+ case PIPE_CAPF_GUARD_BAND_RIGHT:
+ case PIPE_CAPF_GUARD_BAND_BOTTOM:
/* XXX I don't know what these should be but the least we can do is
* silence the potential error message */
return 0.0f;
case PIPE_VIDEO_CAP_MAX_WIDTH:
case PIPE_VIDEO_CAP_MAX_HEIGHT:
return vl_video_buffer_max_size(screen);
+ case PIPE_VIDEO_CAP_PREFERED_FORMAT:
+ return PIPE_FORMAT_NV12;
+ case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
+ return false;
+ case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
+ return false;
+ case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
+ return true;
default:
return 0;
}
unsigned sample_count,
unsigned usage)
{
- struct radeon_winsys *rws = r300_screen(screen)->rws;
uint32_t retval = 0;
- boolean drm_2_8_0 = rws->get_value(rws, RADEON_VID_DRM_2_8_0);
+ boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
boolean is_r500 = r300_screen(screen)->caps.is_r500;
boolean is_r400 = r300_screen(screen)->caps.is_r400;
boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
format == PIPE_FORMAT_R16G16_FLOAT ||
format == PIPE_FORMAT_R16G16B16_FLOAT ||
format == PIPE_FORMAT_R16G16B16A16_FLOAT;
+ boolean is_fixed = format == PIPE_FORMAT_R32_FIXED ||
+ format == PIPE_FORMAT_R32G32_FIXED ||
+ format == PIPE_FORMAT_R32G32B32_FIXED ||
+ format == PIPE_FORMAT_R32G32B32A32_FIXED;
if (!util_format_is_supported(format, usage))
return FALSE;
/* Check vertex buffer format support. */
if (usage & PIPE_BIND_VERTEX_BUFFER &&
- /* Half float is supported on >= RV350. */
+ /* Half float is supported on >= R400. */
(is_r400 || is_r500 || !is_half_float) &&
- r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
+ /* We have a fallback for FIXED. */
+ (is_fixed || r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT)) {
retval |= PIPE_BIND_VERTEX_BUFFER;
}
struct radeon_winsys *rws = r300_screen(screen)->rws;
struct pb_buffer *rfence = (struct pb_buffer*)fence;
- return !rws->buffer_is_busy(rfence);
+ return !rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE);
}
static boolean r300_fence_finish(struct pipe_screen *screen,
timeout /= 1000;
/* Wait in a loop. */
- while (rws->buffer_is_busy(rfence)) {
+ while (rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE)) {
if (os_time_get() - start_time >= timeout) {
return FALSE;
}
return TRUE;
}
- rws->buffer_wait(rfence);
+ rws->buffer_wait(rfence, RADEON_USAGE_READWRITE);
return TRUE;
}
return NULL;
}
- r300screen->caps.pci_id = rws->get_value(rws, RADEON_VID_PCI_ID);
- r300screen->caps.num_frag_pipes = rws->get_value(rws, RADEON_VID_R300_GB_PIPES);
- r300screen->caps.num_z_pipes = rws->get_value(rws, RADEON_VID_R300_Z_PIPES);
+ rws->query_info(rws, &r300screen->info);
r300_init_debug(r300screen);
- r300_parse_chipset(&r300screen->caps);
+ r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
r300screen->caps.zmask_ram = 0;
if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
r300screen->caps.hiz_ram = 0;
- if (!rws->get_value(rws, RADEON_VID_DRM_2_8_0))
+ if (r300screen->info.drm_minor < 8)
r300screen->caps.has_us_format = FALSE;
pipe_mutex_init(r300screen->num_contexts_mutex);
UTIL_SLAB_SINGLETHREADED);
r300screen->rws = rws;
- r300screen->screen.winsys = (struct pipe_winsys*)rws;
r300screen->screen.destroy = r300_destroy_screen;
r300screen->screen.get_name = r300_get_name;
r300screen->screen.get_vendor = r300_get_vendor;