case PIPE_CAP_TEXTURE_BARRIER:
case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
- case PIPE_CAP_VERTEX_COLOR_CLAMPED:
case PIPE_CAP_USER_INDEX_BUFFERS:
case PIPE_CAP_USER_CONSTANT_BUFFERS:
case PIPE_CAP_DEPTH_CLIP_DISABLE: /* XXX implemented, but breaks Regnum Online */
+ case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
return 1;
case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
case PIPE_CAP_TEXTURE_SWIZZLE:
return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
+ /* We don't support color clamping on r500, so that we can use color
+ * intepolators for generic varyings. */
+ case PIPE_CAP_VERTEX_COLOR_CLAMPED:
+ return !is_r500;
+
/* Supported on r500 only. */
case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
/* Unsupported features. */
case PIPE_CAP_QUERY_TIME_ELAPSED:
+ case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
case PIPE_CAP_INDEP_BLEND_ENABLE:
case PIPE_CAP_INDEP_BLEND_FUNC:
case PIPE_CAP_CUBE_MAP_ARRAY:
case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
+ case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
+ case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
return 0;
/* SWTCL-only features. */
case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
return r300screen->caps.has_tcl;
+ case PIPE_CAP_TGSI_TEXCOORD:
+ return 0;
/* Texturing. */
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
return r300screen->caps.num_tex_units;
case PIPE_SHADER_CAP_MAX_ADDRS:
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
format == PIPE_FORMAT_A16_FLOAT ||
format == PIPE_FORMAT_L16_FLOAT ||
format == PIPE_FORMAT_L16A16_FLOAT ||
+ format == PIPE_FORMAT_R16A16_FLOAT ||
format == PIPE_FORMAT_I16_FLOAT;
boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
format == PIPE_FORMAT_R16G16_FLOAT ||
format == PIPE_FORMAT_R16G16B16_FLOAT ||
- format == PIPE_FORMAT_R16G16B16A16_FLOAT;
+ format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
+ format == PIPE_FORMAT_R16G16B16X16_FLOAT;
const struct util_format_description *desc;
if (!util_format_is_supported(format, usage))
if (!util_format_is_depth_or_stencil(format) &&
!util_format_is_rgba8_variant(desc) &&
!util_format_is_rgba1010102_variant(desc) &&
- format != PIPE_FORMAT_R16G16B16A16_FLOAT) {
+ format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
+ format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
return FALSE;
}
} else {
/* Check sampler format support. */
if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
+ /* these two are broken for an unknown reason */
+ format != PIPE_FORMAT_R8G8B8X8_SNORM &&
+ format != PIPE_FORMAT_R16G16B16X16_SNORM &&
/* ATI1N is r5xx-only. */
(is_r500 || !is_ati1n) &&
/* ATI2N is supported on r4xx-r5xx. */