return "X.Org R300 Project";
}
+static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
+{
+ return "ATI";
+}
+
static const char* chip_families[] = {
"unknown",
"ATI R300",
case PIPE_CAP_USER_CONSTANT_BUFFERS:
case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
+ case PIPE_CAP_CLIP_HALFZ:
return 1;
case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
+ case PIPE_CAP_MAX_VERTEX_STREAMS:
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
- case PIPE_CAP_TGSI_VS_LAYER:
+ case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
case PIPE_CAP_TEXTURE_GATHER_SM5:
case PIPE_CAP_TEXTURE_QUERY_LOD:
case PIPE_CAP_FAKE_SW_MSAA:
case PIPE_CAP_SAMPLE_SHADING:
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
- case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
+ case PIPE_CAP_DRAW_INDIRECT:
+ case PIPE_CAP_MULTI_DRAW_INDIRECT:
+ case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
+ case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
+ case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
+ case PIPE_CAP_SAMPLER_VIEW_TARGET:
+ case PIPE_CAP_VERTEXID_NOBASE:
+ case PIPE_CAP_POLYGON_OFFSET_CLAMP:
+ case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
+ case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
+ case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
+ case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
+ case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
+ case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
+ case PIPE_CAP_DEPTH_BOUNDS_TEST:
+ case PIPE_CAP_TGSI_TXQS:
+ case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
+ case PIPE_CAP_SHAREABLE_SHADERS:
+ case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
+ case PIPE_CAP_CLEAR_TEXTURE:
+ case PIPE_CAP_DRAW_PARAMETERS:
+ case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
+ case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
+ case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
+ case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
+ case PIPE_CAP_INVALIDATE_BUFFER:
+ case PIPE_CAP_GENERATE_MIPMAP:
+ case PIPE_CAP_STRING_MARKER:
+ case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
+ case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
+ case PIPE_CAP_QUERY_BUFFER_OBJECT:
+ case PIPE_CAP_QUERY_MEMORY_INFO:
+ case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
+ case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
return 0;
/* SWTCL-only features. */
case PIPE_CAP_PRIMITIVE_RESTART:
case PIPE_CAP_USER_VERTEX_BUFFERS:
+ case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
return !r300screen->caps.has_tcl;
/* HWTCL-only features / limitations. */
case PIPE_CAP_MAX_VIEWPORTS:
return 1;
+
+ case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
+ return 2048;
+
+ case PIPE_CAP_VENDOR_ID:
+ return 0x1002;
+ case PIPE_CAP_DEVICE_ID:
+ return r300screen->info.pci_id;
+ case PIPE_CAP_ACCELERATED:
+ return 1;
+ case PIPE_CAP_VIDEO_MEMORY:
+ return r300screen->info.vram_size >> 20;
+ case PIPE_CAP_UMA:
+ return 0;
+ case PIPE_CAP_PCI_GROUP:
+ return r300screen->info.pci_domain;
+ case PIPE_CAP_PCI_BUS:
+ return r300screen->info.pci_bus;
+ case PIPE_CAP_PCI_DEVICE:
+ return r300screen->info.pci_dev;
+ case PIPE_CAP_PCI_FUNCTION:
+ return r300screen->info.pci_func;
}
return 0;
}
* additional texcoords but there is no two-sided color
* selection then. However the facing bit can be used instead. */
return 10;
- case PIPE_SHADER_CAP_MAX_CONSTS:
- return is_r500 ? 256 : 32;
+ case PIPE_SHADER_CAP_MAX_OUTPUTS:
+ return 4;
+ case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
+ return (is_r500 ? 256 : 32) * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
+ case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
return 1;
case PIPE_SHADER_CAP_MAX_TEMPS:
return is_r500 ? 128 : is_r400 ? 64 : 32;
case PIPE_SHADER_CAP_MAX_PREDS:
- return is_r500 ? 1 : 0;
+ return 0; /* unused */
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return r300screen->caps.num_tex_units;
- case PIPE_SHADER_CAP_MAX_ADDRS:
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
case PIPE_SHADER_CAP_SUBROUTINES:
case PIPE_SHADER_CAP_INTEGERS:
+ case PIPE_SHADER_CAP_DOUBLES:
+ case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
+ case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
+ case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
return 0;
+ case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
+ return 32;
case PIPE_SHADER_CAP_PREFERRED_IR:
return PIPE_SHADER_IR_TGSI;
+ case PIPE_SHADER_CAP_SUPPORTED_IRS:
+ return 0;
}
break;
case PIPE_SHADER_VERTEX:
return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
case PIPE_SHADER_CAP_MAX_INPUTS:
return 16;
- case PIPE_SHADER_CAP_MAX_CONSTS:
- return 256;
+ case PIPE_SHADER_CAP_MAX_OUTPUTS:
+ return 10;
+ case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
+ return 256 * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 32;
- case PIPE_SHADER_CAP_MAX_ADDRS:
- return 1; /* XXX guessed */
case PIPE_SHADER_CAP_MAX_PREDS:
- return is_r500 ? 4 : 0; /* XXX guessed. */
+ return 0; /* unused */
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
+ case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
return 1;
case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
case PIPE_SHADER_CAP_INTEGERS:
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
+ case PIPE_SHADER_CAP_DOUBLES:
+ case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
+ case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
+ case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
return 0;
+ case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
+ return 32;
case PIPE_SHADER_CAP_PREFERRED_IR:
return PIPE_SHADER_IR_TGSI;
+ case PIPE_SHADER_CAP_SUPPORTED_IRS:
+ return 0;
}
break;
}
case PIPE_CAPF_GUARD_BAND_TOP:
case PIPE_CAPF_GUARD_BAND_RIGHT:
case PIPE_CAPF_GUARD_BAND_BOTTOM:
- /* XXX I don't know what these should be but the least we can do is
- * silence the potential error message */
return 0.0f;
default:
debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
* Whether the format matches:
* PIPE_FORMAT_?10?10?10?2_UNORM
*/
-static INLINE boolean
+static inline boolean
util_format_is_rgba1010102_variant(const struct util_format_description *desc)
{
static const unsigned size[4] = {10, 10, 10, 2};
return TRUE;
}
+static bool r300_is_blending_supported(struct r300_screen *rscreen,
+ enum pipe_format format)
+{
+ int c;
+ const struct util_format_description *desc =
+ util_format_description(format);
+
+ if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
+ return false;
+
+ c = util_format_get_first_non_void_channel(format);
+
+ /* RGBA16F */
+ if (rscreen->caps.is_r500 &&
+ desc->nr_channels == 4 &&
+ desc->channel[c].size == 16 &&
+ desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
+ return true;
+
+ if (desc->channel[c].normalized &&
+ desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
+ desc->channel[c].size >= 4 &&
+ desc->channel[c].size <= 10) {
+ /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
+ if (desc->nr_channels >= 3)
+ return true;
+
+ if (format == PIPE_FORMAT_R8G8_UNORM)
+ return true;
+
+ /* R8, I8, L8, A8 */
+ if (desc->nr_channels == 1)
+ return true;
+ }
+
+ return false;
+}
+
static boolean r300_is_format_supported(struct pipe_screen* screen,
enum pipe_format format,
enum pipe_texture_target target,
unsigned usage)
{
uint32_t retval = 0;
- boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
boolean is_r500 = r300_screen(screen)->caps.is_r500;
boolean is_r400 = r300_screen(screen)->caps.is_r400;
boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
format == PIPE_FORMAT_R10G10B10X2_SNORM ||
format == PIPE_FORMAT_B10G10R10A2_UNORM ||
+ format == PIPE_FORMAT_B10G10R10X2_UNORM ||
format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
format == PIPE_FORMAT_RGTC1_SNORM ||
format == PIPE_FORMAT_RGTC2_SNORM ||
format == PIPE_FORMAT_LATC2_UNORM ||
format == PIPE_FORMAT_LATC2_SNORM;
- boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
- format == PIPE_FORMAT_R16G16_FLOAT ||
- format == PIPE_FORMAT_A16_FLOAT ||
- format == PIPE_FORMAT_L16_FLOAT ||
- format == PIPE_FORMAT_L16A16_FLOAT ||
- format == PIPE_FORMAT_R16A16_FLOAT ||
- format == PIPE_FORMAT_I16_FLOAT;
boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
format == PIPE_FORMAT_R16G16_FLOAT ||
format == PIPE_FORMAT_R16G16B16_FLOAT ||
case 2:
case 4:
case 6:
- /* We need DRM 2.8.0. */
- if (!drm_2_8_0) {
- return FALSE;
- }
/* No texturing and scanout. */
if (usage & (PIPE_BIND_SAMPLER_VIEW |
PIPE_BIND_DISPLAY_TARGET |
(is_r500 || !is_ati1n) &&
/* ATI2N is supported on r4xx-r5xx. */
(is_r400 || is_r500 || !is_ati2n) &&
- /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
- (drm_2_8_0 || !is_x16f_xy16f) &&
r300_is_sampler_format_supported(format)) {
retval |= PIPE_BIND_SAMPLER_VIEW;
}
if ((usage & (PIPE_BIND_RENDER_TARGET |
PIPE_BIND_DISPLAY_TARGET |
PIPE_BIND_SCANOUT |
- PIPE_BIND_SHARED)) &&
+ PIPE_BIND_SHARED |
+ PIPE_BIND_BLENDABLE)) &&
/* 2101010 cannot be rendered to on non-r5xx. */
- (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
+ (!is_color2101010 || is_r500) &&
r300_is_colorbuffer_format_supported(format)) {
retval |= usage &
(PIPE_BIND_RENDER_TARGET |
PIPE_BIND_DISPLAY_TARGET |
PIPE_BIND_SCANOUT |
PIPE_BIND_SHARED);
+
+ if (r300_is_blending_supported(r300_screen(screen), format)) {
+ retval |= usage & PIPE_BIND_BLENDABLE;
+ }
}
/* Check depth-stencil format support. */
rws->fence_reference(ptr, fence);
}
-static boolean r300_fence_signalled(struct pipe_screen *screen,
- struct pipe_fence_handle *fence)
-{
- struct radeon_winsys *rws = r300_screen(screen)->rws;
-
- return rws->fence_wait(rws, fence, 0);
-}
-
static boolean r300_fence_finish(struct pipe_screen *screen,
struct pipe_fence_handle *fence,
uint64_t timeout)
if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
r300screen->caps.hiz_ram = 0;
- if (r300screen->info.drm_minor < 8)
- r300screen->caps.has_us_format = FALSE;
-
r300screen->rws = rws;
r300screen->screen.destroy = r300_destroy_screen;
r300screen->screen.get_name = r300_get_name;
r300screen->screen.get_vendor = r300_get_vendor;
+ r300screen->screen.get_device_vendor = r300_get_device_vendor;
r300screen->screen.get_param = r300_get_param;
r300screen->screen.get_shader_param = r300_get_shader_param;
r300screen->screen.get_paramf = r300_get_paramf;
r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
r300screen->screen.context_create = r300_create_context;
r300screen->screen.fence_reference = r300_fence_reference;
- r300screen->screen.fence_signalled = r300_fence_signalled;
r300screen->screen.fence_finish = r300_fence_finish;
r300_init_screen_resource_functions(r300screen);
projects / mesa.git / blobdiff