dsa->z_stencil_control |=
(r300_translate_depth_stencil_function(state->depth.func) <<
R300_Z_FUNC_SHIFT);
+ } else {
+ /* We must enable depth test, otherwise occlusion queries won't work. */
+ dsa->z_buffer_control |= R300_Z_ENABLE;
+ dsa->z_stencil_control |= R300_ZS_ALWAYS;
}
/* Stencil buffer setup. */
OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
END_CB;
+ /* We must enable depth test, otherwise occlusion queries won't work.
+ * We setup a dummy zbuffer to silent the CS checker, see emit_fb_state. */
BEGIN_CB(dsa->cb_zb_no_readwrite, 10);
OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
- OUT_CB(0);
- OUT_CB(0);
+ OUT_CB(R300_Z_ENABLE);
+ OUT_CB(R300_ZS_ALWAYS);
OUT_CB(0);
OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
BEGIN_CB(dsa->cb_fp16_zb_no_readwrite, 10);
OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function_fp16);
OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
- OUT_CB(0);
- OUT_CB(0);
+ OUT_CB(R300_Z_ENABLE);
+ OUT_CB(R300_ZS_ALWAYS);
OUT_CB(0);
OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
/* Now compute the fb_state atom size. */
r300->fb_state.size = 2 + (8 * state->nr_cbufs);
- if (r300->cbzb_clear)
+ if (r300->cbzb_clear) {
r300->fb_state.size += 10;
- else if (state->zsbuf) {
+ } else if (state->zsbuf) {
r300->fb_state.size += 10;
if (r300->hyperz_enabled)
r300->fb_state.size += 8;
+ } else if (state->nr_cbufs) {
+ r300->fb_state.size += 10;
}
/* The size of the rest of atoms stays the same. */
sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
state->mag_img_filter,
state->min_mip_filter,
- state->max_anisotropy > 0);
+ state->max_anisotropy > 1);
sampler->filter0 |= r300_anisotropy(state->max_anisotropy);
boolean dxtc_swizzle = r300_screen(pipe->screen)->caps.dxtc_swizzle;
if (view) {
+ unsigned hwformat;
+
view->base = *templ;
view->base.reference.count = 1;
view->base.context = pipe;
view->swizzle[2] = templ->swizzle_b;
view->swizzle[3] = templ->swizzle_a;
+ hwformat = r300_translate_texformat(templ->format,
+ view->swizzle,
+ is_r500,
+ dxtc_swizzle);
+
+ if (hwformat == ~0) {
+ fprintf(stderr, "r300: Ooops. Got unsupported format %s in %s.\n",
+ util_format_short_name(templ->format), __func__);
+ }
+ assert(hwformat != ~0);
+
view->format = tex->tx_format;
- view->format.format1 |= r300_translate_texformat(templ->format,
- view->swizzle,
- is_r500,
- dxtc_swizzle);
+ view->format.format1 |= hwformat;
if (is_r500) {
view->format.format2 |= r500_tx_format_msb_bit(templ->format);
}
}
/* Initialize the PSC tables. */
-static void r300_vertex_psc(struct r300_vertex_element_state *velems,
- struct r300_vertex_stream_state *vstream,
- boolean insert_instance_id_attrib)
+static void r300_vertex_psc(struct r300_vertex_element_state *velems)
{
+ struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
uint16_t type, swizzle;
enum pipe_format format;
unsigned i;
}
}
- /* Insert attrib emulating InstanceID. */
- if (i < 15 && insert_instance_id_attrib) {
- format = PIPE_FORMAT_R32_FLOAT;
-
- type = r300_translate_vertex_data_type(format);
- assert(type != R300_INVALID_FORMAT);
-
- type |= i << R300_DST_VEC_LOC_SHIFT;
- swizzle = r300_translate_vertex_data_swizzle(format);
-
- if (i & 1) {
- vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
- vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
- } else {
- vstream->vap_prog_stream_cntl[i >> 1] |= type;
- vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
- }
-
- i++;
- }
-
/* Set the last vector in the PSC. */
if (i) {
i -= 1;
if (r300_screen(pipe->screen)->caps.has_tcl) {
/* Setup PSC.
* The unused components will be replaced by (..., 0, 1). */
- r300_vertex_psc(velems, &velems->vertex_stream, FALSE);
- r300_vertex_psc(velems, &velems->vertex_stream_instanced, TRUE);
+ r300_vertex_psc(velems);
for (i = 0; i < count; i++) {
velems->format_size[i] =
return;
}
- UPDATE_STATE(velems, r300->vertex_stream_state);
- r300->vertex_stream_state.size = (1 + velems->vertex_stream_instanced.count) * 2;
+ UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
+ r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2;
r300->vertex_arrays_dirty = TRUE;
}