#include "draw/draw_context.h"
+#include "util/u_blitter.h"
#include "util/u_math.h"
#include "util/u_memory.h"
#include "util/u_pack_color.h"
#include "pipe/p_config.h"
+#include "r300_cb.h"
#include "r300_context.h"
#include "r300_emit.h"
#include "r300_reg.h"
#include "r300_screen.h"
#include "r300_screen_buffer.h"
-#include "r300_state.h"
#include "r300_state_inlines.h"
#include "r300_fs.h"
#include "r300_texture.h"
{
struct r300_screen* r300screen = r300_screen(pipe->screen);
struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
+ uint32_t blend_control = 0; /* R300_RB3D_CBLEND: 0x4e04 */
+ uint32_t alpha_blend_control = 0; /* R300_RB3D_ABLEND: 0x4e08 */
+ uint32_t color_channel_mask = 0; /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
+ uint32_t rop = 0; /* R300_RB3D_ROPCNTL: 0x4e18 */
+ uint32_t dither = 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */
+ CB_LOCALS;
if (state->rt[0].blend_enable)
{
/* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
* this is just the crappy D3D naming */
- blend->blend_control = R300_ALPHA_BLEND_ENABLE |
+ blend_control = R300_ALPHA_BLEND_ENABLE |
r300_translate_blend_function(eqRGB) |
( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) {
/* Enable reading from the colorbuffer. */
- blend->blend_control |= R300_READ_ENABLE;
+ blend_control |= R300_READ_ENABLE;
if (r300screen->caps.is_r500) {
/* Optimization: Depending on incoming pixels, we can
(dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
dstA == PIPE_BLENDFACTOR_ZERO)) {
- blend->blend_control |= R500_SRC_ALPHA_0_NO_READ;
+ blend_control |= R500_SRC_ALPHA_0_NO_READ;
}
/* Disable reading if SRC_ALPHA == 1. */
(dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
dstA == PIPE_BLENDFACTOR_ZERO)) {
- blend->blend_control |= R500_SRC_ALPHA_1_NO_READ;
+ blend_control |= R500_SRC_ALPHA_1_NO_READ;
}
}
}
* pixels.
*/
if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) {
- blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
+ blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
} else if (blend_discard_if_src_alpha_1(srcRGB, srcA,
dstRGB, dstA)) {
- blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
+ blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
} else if (blend_discard_if_src_color_0(srcRGB, srcA,
dstRGB, dstA)) {
- blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
+ blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
} else if (blend_discard_if_src_color_1(srcRGB, srcA,
dstRGB, dstA)) {
- blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
+ blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
} else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA,
dstRGB, dstA)) {
- blend->blend_control |=
+ blend_control |=
R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0;
} else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA,
dstRGB, dstA)) {
- blend->blend_control |=
+ blend_control |=
R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1;
}
}
/* separate alpha */
if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
- blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE;
- blend->alpha_blend_control =
+ blend_control |= R300_SEPARATE_ALPHA_ENABLE;
+ alpha_blend_control =
r300_translate_blend_function(eqA) |
(r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
(r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
/* PIPE_LOGICOP_* don't need to be translated, fortunately. */
if (state->logicop_enable) {
- blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
+ rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
(state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
}
/* Color channel masks for all MRTs. */
- blend->color_channel_mask = bgra_cmask(state->rt[0].colormask);
+ color_channel_mask = bgra_cmask(state->rt[0].colormask);
if (r300screen->caps.is_r500 && state->independent_blend_enable) {
if (state->rt[1].blend_enable) {
- blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4;
+ color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4;
}
if (state->rt[2].blend_enable) {
- blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8;
+ color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8;
}
if (state->rt[3].blend_enable) {
- blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12;
+ color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12;
}
}
* This could be revisited if we ever get quality or conformance hints.
*
if (state->dither) {
- blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
+ dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
}
*/
+ /* Build a command buffer. */
+ BEGIN_CB(blend->cb, 8);
+ OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
+ OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
+ OUT_CB(blend_control);
+ OUT_CB(alpha_blend_control);
+ OUT_CB(color_channel_mask);
+ OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
+ END_CB;
+
+ /* The same as above, but with no colorbuffer reads and writes. */
+ BEGIN_CB(blend->cb_no_readwrite, 8);
+ OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
+ OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
+ OUT_CB(0);
+ OUT_CB(0);
+ OUT_CB(0);
+ OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
+ END_CB;
+
return (void*)blend;
}
struct r300_context* r300 = r300_context(pipe);
struct r300_blend_color_state* state =
(struct r300_blend_color_state*)r300->blend_color_state.state;
- union util_color uc;
+ CB_LOCALS;
- util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
- state->blend_color = uc.ui;
+ if (r300->screen->caps.is_r500) {
+ /* XXX if FP16 blending is enabled, we should use the FP16 format */
+ BEGIN_CB(state->cb, 3);
+ OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
+ OUT_CB(float_to_fixed10(color->color[0]) |
+ (float_to_fixed10(color->color[3]) << 16));
+ OUT_CB(float_to_fixed10(color->color[2]) |
+ (float_to_fixed10(color->color[1]) << 16));
+ END_CB;
+ } else {
+ union util_color uc;
+ util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
- /* XXX if FP16 blending is enabled, we should use the FP16 format */
- state->blend_color_red_alpha =
- float_to_fixed10(color->color[0]) |
- (float_to_fixed10(color->color[3]) << 16);
- state->blend_color_green_blue =
- float_to_fixed10(color->color[2]) |
- (float_to_fixed10(color->color[1]) << 16);
+ BEGIN_CB(state->cb, 2);
+ OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui);
+ END_CB;
+ }
- r300->blend_color_state.size = r300->screen->caps.is_r500 ? 3 : 2;
r300->blend_color_state.dirty = TRUE;
}
const struct pipe_clip_state* state)
{
struct r300_context* r300 = r300_context(pipe);
+ struct r300_clip_state *clip =
+ (struct r300_clip_state*)r300->clip_state.state;
+ CB_LOCALS;
- r300->clip = *state;
+ clip->clip = *state;
if (r300->screen->caps.has_tcl) {
- memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state));
- r300->clip_state.size = 29;
+ r300->clip_state.size = 2 + !!state->nr * 3 + state->nr * 4;
+
+ BEGIN_CB(clip->cb, r300->clip_state.size);
+ if (state->nr) {
+ OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG,
+ (r300->screen->caps.is_r500 ?
+ R500_PVS_UCP_START : R300_PVS_UCP_START));
+ OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, state->nr * 4);
+ OUT_CB_TABLE(state->ucp, state->nr * 4);
+ }
+ OUT_CB_REG(R300_VAP_CLIP_CNTL, ((1 << state->nr) - 1) |
+ R300_PS_UCP_MODE_CLIP_AS_TRIFAN |
+ (state->depth_clamp ? R300_CLIP_DISABLE : 0));
+ END_CB;
+
+ r300->clip_state.dirty = TRUE;
} else {
draw_flush(r300->draw);
draw_set_clip_state(r300->draw, state);
- r300->clip_state.size = 2;
}
+}
- r300->clip_state.dirty = TRUE;
+static void
+r300_set_sample_mask(struct pipe_context *pipe,
+ unsigned sample_mask)
+{
}
+
/* Create a new depth, stencil, and alpha state based on the CSO dsa state.
*
* This contains the depth buffer, stencil buffer, alpha test, and such.
{
struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps;
struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
+ CB_LOCALS;
+
+ dsa->dsa = *state;
/* Depth test setup. */
if (state->depth.enabled) {
if (caps->is_r500) {
dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
} else {
- dsa->stencil_ref_bf_fallback =
+ dsa->two_sided_stencil_ref =
(state->stencil[0].valuemask != state->stencil[1].valuemask ||
state->stencil[0].writemask != state->stencil[1].writemask);
}
dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
}
+ BEGIN_CB(&dsa->cb_begin, 8);
+ OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
+ OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
+ OUT_CB(dsa->z_buffer_control);
+ OUT_CB(dsa->z_stencil_control);
+ OUT_CB(dsa->stencil_ref_mask);
+ OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf);
+ END_CB;
+
+ BEGIN_CB(dsa->cb_no_readwrite, 8);
+ OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
+ OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
+ OUT_CB(0);
+ OUT_CB(0);
+ OUT_CB(0);
+ OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
+ END_CB;
+
return (void*)dsa;
}
-static void r300_update_stencil_ref_fallback_status(struct r300_context *r300)
+static void r300_dsa_inject_stencilref(struct r300_context *r300)
{
- struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state;
+ struct r300_dsa_state *dsa =
+ (struct r300_dsa_state*)r300->dsa_state.state;
- if (r300->screen->caps.is_r500) {
+ if (!dsa)
return;
- }
- r300->stencil_ref_bf_fallback =
- dsa->stencil_ref_bf_fallback ||
- (dsa->two_sided &&
- r300->stencil_ref.ref_value[0] != r300->stencil_ref.ref_value[1]);
+ dsa->stencil_ref_mask =
+ (dsa->stencil_ref_mask & ~R300_STENCILREF_MASK) |
+ r300->stencil_ref.ref_value[0];
+ dsa->stencil_ref_bf =
+ (dsa->stencil_ref_bf & ~R300_STENCILREF_MASK) |
+ r300->stencil_ref.ref_value[1];
}
/* Bind DSA state. */
UPDATE_STATE(state, r300->dsa_state);
- r300_update_stencil_ref_fallback_status(r300);
+ r300_dsa_inject_stencilref(r300);
}
/* Free DSA state. */
struct r300_context* r300 = r300_context(pipe);
r300->stencil_ref = *sr;
+
+ r300_dsa_inject_stencilref(r300);
r300->dsa_state.dirty = TRUE;
+}
- r300_update_stencil_ref_fallback_status(r300);
+static void r300_tex_set_tiling_flags(struct r300_context *r300,
+ struct r300_texture *tex, unsigned level)
+{
+ /* Check if the macrotile flag needs to be changed.
+ * Skip changing the flags otherwise. */
+ if (tex->desc.macrotile[tex->surface_level] !=
+ tex->desc.macrotile[level]) {
+ /* Tiling determines how DRM treats the buffer data.
+ * We must flush CS when changing it if the buffer is referenced. */
+ if (r300->rws->cs_is_buffer_referenced(r300->cs,
+ tex->buffer, R300_REF_CS))
+ r300->context.flush(&r300->context, 0, NULL);
+
+ r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
+ tex->desc.microtile, tex->desc.macrotile[level],
+ tex->desc.stride_in_bytes[0]);
+
+ tex->surface_level = level;
+ }
}
/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
-static void r300_fb_update_tiling_flags(struct r300_context *r300,
- const struct pipe_framebuffer_state *old_state,
- const struct pipe_framebuffer_state *new_state)
+static void r300_fb_set_tiling_flags(struct r300_context *r300,
+ const struct pipe_framebuffer_state *state)
{
- struct r300_texture *tex;
- unsigned i, j, level;
+ unsigned i;
- /* Reset tiling flags for old surfaces to default values. */
- for (i = 0; i < old_state->nr_cbufs; i++) {
- for (j = 0; j < new_state->nr_cbufs; j++) {
- if (old_state->cbufs[i]->texture == new_state->cbufs[j]->texture) {
- break;
- }
- }
- /* If not binding the surface again... */
- if (j != new_state->nr_cbufs) {
- continue;
- }
+ /* Set tiling flags for new surfaces. */
+ for (i = 0; i < state->nr_cbufs; i++) {
+ r300_tex_set_tiling_flags(r300,
+ r300_texture(state->cbufs[i]->texture),
+ state->cbufs[i]->level);
+ }
+ if (state->zsbuf) {
+ r300_tex_set_tiling_flags(r300,
+ r300_texture(state->zsbuf->texture),
+ state->zsbuf->level);
+ }
+}
- tex = r300_texture(old_state->cbufs[i]->texture);
+static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index,
+ const char *binding)
+{
+ struct pipe_resource *tex = surf->texture;
+ struct r300_texture *rtex = r300_texture(tex);
- if (tex) {
- r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
- tex->pitch[0],
- tex->microtile,
- tex->macrotile);
- }
- }
- if (old_state->zsbuf &&
- (!new_state->zsbuf ||
- old_state->zsbuf->texture != new_state->zsbuf->texture)) {
- tex = r300_texture(old_state->zsbuf->texture);
+ fprintf(stderr,
+ "r300: %s[%i] Dim: %ix%i, Offset: %i, ZSlice: %i, "
+ "Face: %i, Level: %i, Format: %s\n"
- if (tex) {
- r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
- tex->pitch[0],
- tex->microtile,
- tex->macrotile);
- }
- }
+ "r300: TEX: Macro: %s, Micro: %s, Pitch: %i, "
+ "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
- /* Set tiling flags for new surfaces. */
- for (i = 0; i < new_state->nr_cbufs; i++) {
- tex = r300_texture(new_state->cbufs[i]->texture);
- level = new_state->cbufs[i]->level;
+ binding, index, surf->width, surf->height, surf->offset,
+ surf->zslice, surf->face, surf->level,
+ util_format_short_name(surf->format),
- r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
- tex->pitch[level],
- tex->microtile,
- tex->mip_macrotile[level]);
- }
- if (new_state->zsbuf) {
- tex = r300_texture(new_state->zsbuf->texture);
- level = new_state->zsbuf->level;
+ rtex->desc.macrotile[0] ? "YES" : " NO",
+ rtex->desc.microtile ? "YES" : " NO",
+ rtex->desc.stride_in_pixels[0],
+ tex->width0, tex->height0, tex->depth0,
+ tex->last_level, util_format_short_name(tex->format));
+}
- r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
- tex->pitch[level],
- tex->microtile,
- tex->mip_macrotile[level]);
+void r300_mark_fb_state_dirty(struct r300_context *r300,
+ enum r300_fb_state_change change)
+{
+ struct pipe_framebuffer_state *state = r300->fb_state.state;
+
+ /* What is marked as dirty depends on the enum r300_fb_state_change. */
+ r300->gpu_flush.dirty = TRUE;
+ r300->fb_state.dirty = TRUE;
+ r300->hyperz_state.dirty = TRUE;
+
+ if (change == R300_CHANGED_FB_STATE) {
+ r300->aa_state.dirty = TRUE;
+ r300->fb_state_pipelined.dirty = TRUE;
}
+
+ /* Now compute the fb_state atom size. */
+ r300->fb_state.size = 2 + (8 * state->nr_cbufs);
+
+ if (r300->cbzb_clear)
+ r300->fb_state.size += 10;
+ else if (state->zsbuf)
+ r300->fb_state.size += r300->screen->caps.has_hiz ? 18 : 14;
+
+ /* The size of the rest of atoms stays the same. */
}
static void
const struct pipe_framebuffer_state* state)
{
struct r300_context* r300 = r300_context(pipe);
+ struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
struct pipe_framebuffer_state *old_state = r300->fb_state.state;
- unsigned max_width, max_height;
+ unsigned max_width, max_height, i;
uint32_t zbuffer_bpp = 0;
- if (state->nr_cbufs > 4) {
- fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, "
- "refusing to bind framebuffer state!\n", __FUNCTION__);
- return;
- }
-
if (r300->screen->caps.is_r500) {
max_width = max_height = 4096;
} else if (r300->screen->caps.is_r400) {
draw_flush(r300->draw);
}
- r300->fb_state.dirty = TRUE;
-
/* If nr_cbufs is changed from zero to non-zero or vice versa... */
if (!!old_state->nr_cbufs != !!state->nr_cbufs) {
r300->blend_state.dirty = TRUE;
r300->dsa_state.dirty = TRUE;
}
- r300_fb_update_tiling_flags(r300, r300->fb_state.state, state);
+ /* The tiling flags are dependent on the surface miplevel, unfortunately. */
+ r300_fb_set_tiling_flags(r300, state);
- memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state));
+ util_assign_framebuffer_state(r300->fb_state.state, state);
- r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) +
- (state->zsbuf ? 10 : 0) + 11;
+ r300_mark_fb_state_dirty(r300, R300_CHANGED_FB_STATE);
/* Polygon offset depends on the zbuffer bit depth. */
if (state->zsbuf && r300->polygon_offset_enabled) {
r300->rs_state.dirty = TRUE;
}
}
+
+ /* Set up AA config. */
+ if (r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) {
+ if (state->nr_cbufs && state->cbufs[0]->texture->nr_samples > 1) {
+ aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE;
+
+ switch (state->cbufs[0]->texture->nr_samples) {
+ case 2:
+ aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2;
+ break;
+ case 3:
+ aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3;
+ break;
+ case 4:
+ aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4;
+ break;
+ case 6:
+ aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6;
+ break;
+ }
+ } else {
+ aa->aa_config = 0;
+ }
+ }
+
+ if (DBG_ON(r300, DBG_FB)) {
+ fprintf(stderr, "r300: set_framebuffer_state:\n");
+ for (i = 0; i < state->nr_cbufs; i++) {
+ r300_print_fb_surf_info(state->cbufs[i], i, "CB");
+ }
+ if (state->zsbuf) {
+ r300_print_fb_surf_info(state->zsbuf, 0, "ZB");
+ }
+ }
}
/* Create fragment shader state. */
r300->fs.dirty = TRUE;
r300->fs_rc_constant_state.dirty = TRUE;
r300->fs_constants.dirty = TRUE;
+ r300->fs.size = fs->shader->cb_code_size;
if (r300->screen->caps.is_r500) {
- r300->fs.size = r500_get_fs_atom_size(r300);
r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7;
r300->fs_constants.size = fs->shader->externals_count * 4 + 3;
} else {
- r300->fs.size = r300_get_fs_atom_size(r300);
r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5;
r300->fs_constants.size = fs->shader->externals_count * 4 + 1;
}
r300_mark_fs_code_dirty(r300);
r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
-
- if (r300->vs_state.state && r300_vertex_shader_setup_wpos(r300)) {
- r300->vap_output_state.dirty = TRUE;
- }
}
/* Delete fragment shader state. */
tmp = ptr;
ptr = ptr->next;
rc_constants_destroy(&tmp->code.constants);
+ FREE(tmp->cb_code);
FREE(tmp);
}
FREE((void*)fs->state.tokens);
{
struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
int i;
-
- /* Copy rasterizer state for Draw. */
+ float psiz;
+ uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */
+ uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */
+ uint32_t point_minmax; /* R300_GA_POINT_MINMAX: 0x4230 */
+ uint32_t line_control; /* R300_GA_LINE_CNTL: 0x4234 */
+ uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
+ uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */
+ uint32_t line_stipple_config; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
+ uint32_t line_stipple_value; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
+ uint32_t polygon_mode; /* R300_GA_POLY_MODE: 0x4288 */
+ uint32_t clip_rule; /* R300_SC_CLIP_RULE: 0x43D0 */
+
+ /* Specifies top of Raster pipe specific enable controls,
+ * i.e. texture coordinates stuffing for points, lines, triangles */
+ uint32_t stuffing_enable; /* R300_GB_ENABLE: 0x4008 */
+
+ /* Point sprites texture coordinates, 0: lower left, 1: upper right */
+ float point_texcoord_left; /* R300_GA_POINT_S0: 0x4200 */
+ float point_texcoord_bottom = 0;/* R300_GA_POINT_T0: 0x4204 */
+ float point_texcoord_right; /* R300_GA_POINT_S1: 0x4208 */
+ float point_texcoord_top = 0; /* R300_GA_POINT_T1: 0x420c */
+ CB_LOCALS;
+
+ /* Copy rasterizer state. */
rs->rs = *state;
+ rs->rs_draw = *state;
+
+ /* Override some states for Draw. */
+ rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */
#ifdef PIPE_ARCH_LITTLE_ENDIAN
- rs->vap_control_status = R300_VC_NO_SWAP;
+ vap_control_status = R300_VC_NO_SWAP;
#else
- rs->vap_control_status = R300_VC_32BIT_SWAP;
+ vap_control_status = R300_VC_32BIT_SWAP;
#endif
/* If no TCL engine is present, turn off the HW TCL. */
if (!r300_screen(pipe->screen)->caps.has_tcl) {
- rs->vap_control_status |= R300_VAP_TCL_BYPASS;
+ vap_control_status |= R300_VAP_TCL_BYPASS;
}
- rs->point_size = pack_float_16_6x(state->point_size) |
+ /* Point size width and height. */
+ point_size =
+ pack_float_16_6x(state->point_size) |
(pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
- rs->line_control = pack_float_16_6x(state->line_width) |
+ /* Point size clamping. */
+ if (state->point_size_per_vertex) {
+ /* Per-vertex point size.
+ * Clamp to [0, max FB size] */
+ psiz = pipe->screen->get_paramf(pipe->screen,
+ PIPE_CAP_MAX_POINT_WIDTH);
+ point_minmax =
+ pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT;
+ } else {
+ /* We cannot disable the point-size vertex output,
+ * so clamp it. */
+ psiz = state->point_size;
+ point_minmax =
+ (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) |
+ (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT);
+ }
+
+ /* Line control. */
+ line_control = pack_float_16_6x(state->line_width) |
R300_GA_LINE_CNTL_END_TYPE_COMP;
/* Enable polygon mode */
- if (state->fill_cw != PIPE_POLYGON_MODE_FILL ||
- state->fill_ccw != PIPE_POLYGON_MODE_FILL) {
- rs->polygon_mode = R300_GA_POLY_MODE_DUAL;
+ polygon_mode = 0;
+ if (state->fill_front != PIPE_POLYGON_MODE_FILL ||
+ state->fill_back != PIPE_POLYGON_MODE_FILL) {
+ polygon_mode = R300_GA_POLY_MODE_DUAL;
}
- /* Radeons don't think in "CW/CCW", they think in "front/back". */
- if (state->front_winding == PIPE_WINDING_CW) {
- rs->cull_mode = R300_FRONT_FACE_CW;
-
- /* Polygon offset */
- if (state->offset_cw) {
- rs->polygon_offset_enable |= R300_FRONT_ENABLE;
- }
- if (state->offset_ccw) {
- rs->polygon_offset_enable |= R300_BACK_ENABLE;
- }
-
- /* Polygon mode */
- if (rs->polygon_mode) {
- rs->polygon_mode |=
- r300_translate_polygon_mode_front(state->fill_cw);
- rs->polygon_mode |=
- r300_translate_polygon_mode_back(state->fill_ccw);
- }
- } else {
- rs->cull_mode = R300_FRONT_FACE_CCW;
-
- /* Polygon offset */
- if (state->offset_ccw) {
- rs->polygon_offset_enable |= R300_FRONT_ENABLE;
- }
- if (state->offset_cw) {
- rs->polygon_offset_enable |= R300_BACK_ENABLE;
- }
+ /* Front face */
+ if (state->front_ccw)
+ cull_mode = R300_FRONT_FACE_CCW;
+ else
+ cull_mode = R300_FRONT_FACE_CW;
- /* Polygon mode */
- if (rs->polygon_mode) {
- rs->polygon_mode |=
- r300_translate_polygon_mode_front(state->fill_ccw);
- rs->polygon_mode |=
- r300_translate_polygon_mode_back(state->fill_cw);
- }
+ /* Polygon offset */
+ polygon_offset_enable = 0;
+ if (util_get_offset(state, state->fill_front)) {
+ polygon_offset_enable |= R300_FRONT_ENABLE;
}
- if (state->front_winding & state->cull_mode) {
- rs->cull_mode |= R300_CULL_FRONT;
+ if (util_get_offset(state, state->fill_back)) {
+ polygon_offset_enable |= R300_BACK_ENABLE;
}
- if (~(state->front_winding) & state->cull_mode) {
- rs->cull_mode |= R300_CULL_BACK;
+
+ rs->polygon_offset_enable = polygon_offset_enable != 0;
+
+ /* Polygon mode */
+ if (polygon_mode) {
+ polygon_mode |=
+ r300_translate_polygon_mode_front(state->fill_front);
+ polygon_mode |=
+ r300_translate_polygon_mode_back(state->fill_back);
}
- if (rs->polygon_offset_enable) {
- rs->depth_offset = state->offset_units;
- rs->depth_scale = state->offset_scale;
+ if (state->cull_face & PIPE_FACE_FRONT) {
+ cull_mode |= R300_CULL_FRONT;
+ }
+ if (state->cull_face & PIPE_FACE_BACK) {
+ cull_mode |= R300_CULL_BACK;
}
if (state->line_stipple_enable) {
- rs->line_stipple_config =
+ line_stipple_config =
R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
(fui((float)state->line_stipple_factor) &
R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
/* XXX this might need to be scaled up */
- rs->line_stipple_value = state->line_stipple_pattern;
+ line_stipple_value = state->line_stipple_pattern;
+ } else {
+ line_stipple_config = 0;
+ line_stipple_value = 0;
}
if (state->flatshade) {
rs->color_control = R300_SHADE_MODEL_SMOOTH;
}
- rs->clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
-
- /* XXX Disable point sprites until we know what's wrong with them. */
- rs->rs.sprite_coord_enable = 0;
+ clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
/* Point sprites */
- if (rs->rs.sprite_coord_enable) {
- rs->stuffing_enable = R300_GB_POINT_STUFF_ENABLE;
+ stuffing_enable = 0;
+ if (state->sprite_coord_enable) {
+ stuffing_enable = R300_GB_POINT_STUFF_ENABLE;
for (i = 0; i < 8; i++) {
if (state->sprite_coord_enable & (1 << i))
- rs->stuffing_enable |=
+ stuffing_enable |=
R300_GB_TEX_STR << (R300_GB_TEX0_SOURCE_SHIFT + (i*2));
}
- rs->point_texcoord_left = 0.0f;
- rs->point_texcoord_right = 1.0f;
+ point_texcoord_left = 0.0f;
+ point_texcoord_right = 1.0f;
switch (state->sprite_coord_mode) {
case PIPE_SPRITE_COORD_UPPER_LEFT:
- rs->point_texcoord_top = 0.0f;
- rs->point_texcoord_bottom = 1.0f;
+ point_texcoord_top = 0.0f;
+ point_texcoord_bottom = 1.0f;
break;
case PIPE_SPRITE_COORD_LOWER_LEFT:
- rs->point_texcoord_top = 1.0f;
- rs->point_texcoord_bottom = 0.0f;
+ point_texcoord_top = 1.0f;
+ point_texcoord_bottom = 0.0f;
break;
}
}
+ /* Build the main command buffer. */
+ BEGIN_CB(rs->cb_main, 25);
+ OUT_CB_REG(R300_VAP_CNTL_STATUS, vap_control_status);
+ OUT_CB_REG(R300_GA_POINT_SIZE, point_size);
+ OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX, 2);
+ OUT_CB(point_minmax);
+ OUT_CB(line_control);
+ OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE, 2);
+ OUT_CB(polygon_offset_enable);
+ rs->cull_mode_index = 9;
+ OUT_CB(cull_mode);
+ OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG, line_stipple_config);
+ OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE, line_stipple_value);
+ OUT_CB_REG(R300_GA_POLY_MODE, polygon_mode);
+ OUT_CB_REG(R300_SC_CLIP_RULE, clip_rule);
+ OUT_CB_REG(R300_GB_ENABLE, stuffing_enable);
+ OUT_CB_REG_SEQ(R300_GA_POINT_S0, 4);
+ OUT_CB_32F(point_texcoord_left);
+ OUT_CB_32F(point_texcoord_bottom);
+ OUT_CB_32F(point_texcoord_right);
+ OUT_CB_32F(point_texcoord_top);
+ END_CB;
+
+ /* Build the two command buffers for polygon offset setup. */
+ if (polygon_offset_enable) {
+ float scale = state->offset_scale * 12;
+ float offset = state->offset_units * 4;
+
+ BEGIN_CB(rs->cb_poly_offset_zb16, 5);
+ OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
+ OUT_CB_32F(scale);
+ OUT_CB_32F(offset);
+ OUT_CB_32F(scale);
+ OUT_CB_32F(offset);
+ END_CB;
+
+ offset = state->offset_units * 2;
+
+ BEGIN_CB(rs->cb_poly_offset_zb24, 5);
+ OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
+ OUT_CB_32F(scale);
+ OUT_CB_32F(offset);
+ OUT_CB_32F(scale);
+ OUT_CB_32F(offset);
+ END_CB;
+ }
+
return (void*)rs;
}
struct r300_context* r300 = r300_context(pipe);
struct r300_rs_state* rs = (struct r300_rs_state*)state;
int last_sprite_coord_enable = r300->sprite_coord_enable;
+ boolean last_two_sided_color = r300->two_sided_color;
- if (r300->draw) {
+ if (r300->draw && rs) {
draw_flush(r300->draw);
- draw_set_rasterizer_state(r300->draw, &rs->rs, state);
+ draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state);
}
if (rs) {
- r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw;
+ r300->polygon_offset_enabled = (rs->rs.offset_point ||
+ rs->rs.offset_line ||
+ rs->rs.offset_tri);
r300->sprite_coord_enable = rs->rs.sprite_coord_enable;
+ r300->two_sided_color = rs->rs.light_twoside;
} else {
r300->polygon_offset_enabled = FALSE;
r300->sprite_coord_enable = 0;
+ r300->two_sided_color = FALSE;
}
UPDATE_STATE(state, r300->rs_state);
- r300->rs_state.size = 26 + (r300->polygon_offset_enabled ? 5 : 0);
+ r300->rs_state.size = 25 + (r300->polygon_offset_enabled ? 5 : 0);
- if (last_sprite_coord_enable != r300->sprite_coord_enable) {
+ if (last_sprite_coord_enable != r300->sprite_coord_enable ||
+ last_two_sided_color != r300->two_sided_color) {
r300->rs_block_state.dirty = TRUE;
}
}
sampler->state = *state;
+ /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
+ * or MIN filter is NEAREST. Since texwrap produces same results
+ * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
+ if (sampler->state.min_img_filter == PIPE_TEX_FILTER_NEAREST ||
+ sampler->state.mag_img_filter == PIPE_TEX_FILTER_NEAREST) {
+ /* Wrap S. */
+ if (sampler->state.wrap_s == PIPE_TEX_WRAP_CLAMP)
+ sampler->state.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
+ else if (sampler->state.wrap_s == PIPE_TEX_WRAP_MIRROR_CLAMP)
+ sampler->state.wrap_s = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
+
+ /* Wrap T. */
+ if (sampler->state.wrap_t == PIPE_TEX_WRAP_CLAMP)
+ sampler->state.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
+ else if (sampler->state.wrap_t == PIPE_TEX_WRAP_MIRROR_CLAMP)
+ sampler->state.wrap_t = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
+
+ /* Wrap R. */
+ if (sampler->state.wrap_r == PIPE_TEX_WRAP_CLAMP)
+ sampler->state.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
+ else if (sampler->state.wrap_r == PIPE_TEX_WRAP_MIRROR_CLAMP)
+ sampler->state.wrap_r = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
+ }
+
sampler->filter0 |=
- (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
- (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
- (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
+ (r300_translate_wrap(sampler->state.wrap_s) << R300_TX_WRAP_S_SHIFT) |
+ (r300_translate_wrap(sampler->state.wrap_t) << R300_TX_WRAP_T_SHIFT) |
+ (r300_translate_wrap(sampler->state.wrap_r) << R300_TX_WRAP_R_SHIFT);
sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
state->mag_img_filter,
sampler->min_lod = MAX2((unsigned)state->min_lod, 0);
sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0);
- lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
+ lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1);
- sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
+ sampler->filter1 |= (lod_bias << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK;
/* This is very high quality anisotropic filtering for R5xx.
* It's good for benchmarking the performance of texturing but
FREE(state);
}
+static uint32_t r300_assign_texture_cache_region(unsigned index, unsigned num)
+{
+ /* This looks like a hack, but I believe it's suppose to work like
+ * that. To illustrate how this works, let's assume you have 5 textures.
+ * From docs, 5 and the successive numbers are:
+ *
+ * FOURTH_1 = 5
+ * FOURTH_2 = 6
+ * FOURTH_3 = 7
+ * EIGHTH_0 = 8
+ * EIGHTH_1 = 9
+ *
+ * First 3 textures will get 3/4 of size of the cache, divived evenly
+ * between them. The last 1/4 of the cache must be divided between
+ * the last 2 textures, each will therefore get 1/8 of the cache.
+ * Why not just to use "5 + texture_index" ?
+ *
+ * This simple trick works for all "num" <= 16.
+ */
+ if (num <= 1)
+ return R300_TX_CACHE(R300_TX_CACHE_WHOLE);
+ else
+ return R300_TX_CACHE(num + index);
+}
+
static void r300_set_fragment_sampler_views(struct pipe_context* pipe,
unsigned count,
struct pipe_sampler_view** views)
struct r300_textures_state* state =
(struct r300_textures_state*)r300->textures_state.state;
struct r300_texture *texture;
- unsigned i;
+ unsigned i, real_num_views = 0, view_index = 0;
unsigned tex_units = r300->screen->caps.num_tex_units;
boolean dirty_tex = FALSE;
return;
}
+ /* Calculate the real number of views. */
+ for (i = 0; i < count; i++) {
+ if (views[i])
+ real_num_views++;
+ }
+
for (i = 0; i < count; i++) {
if (&state->sampler_views[i]->base != views[i]) {
pipe_sampler_view_reference(
/* Set the texrect factor in the fragment shader.
* Needed for RECT and NPOT fallback. */
texture = r300_texture(views[i]->texture);
- if (texture->uses_pitch) {
+ if (texture->desc.uses_stride_addressing) {
r300->fs_rc_constant_state.dirty = TRUE;
}
+
+ state->sampler_views[i]->texcache_region =
+ r300_assign_texture_cache_region(view_index, real_num_views);
+ view_index++;
}
}
{
struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view);
struct r300_texture *tex = r300_texture(texture);
- unsigned char swizzle[4];
if (view) {
view->base = *templ;
view->base.texture = NULL;
pipe_resource_reference(&view->base.texture, texture);
- swizzle[0] = templ->swizzle_r;
- swizzle[1] = templ->swizzle_g;
- swizzle[2] = templ->swizzle_b;
- swizzle[3] = templ->swizzle_a;
+ view->swizzle[0] = templ->swizzle_r;
+ view->swizzle[1] = templ->swizzle_g;
+ view->swizzle[2] = templ->swizzle_b;
+ view->swizzle[3] = templ->swizzle_a;
- /* XXX Enable swizzles when they become supported. Now we get RGBA
- * everywhere. And do testing! */
view->format = tex->tx_format;
view->format.format1 |= r300_translate_texformat(templ->format,
- 0); /*swizzle);*/
+ view->swizzle);
if (r300_screen(pipe->screen)->caps.is_r500) {
view->format.format2 |= r500_tx_format_msb_bit(templ->format);
}
r300->viewport = *state;
+ if (r300->draw) {
+ draw_flush(r300->draw);
+ draw_set_viewport_state(r300->draw, state);
+ viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT;
+ return;
+ }
+
/* Do the transform in HW. */
viewport->vte_control = R300_VTX_W0_FMT;
return;
}
- /* Check if the stride is aligned to the size of DWORD. */
- for (i = 0; i < count; i++) {
- if (buffers[i].buffer) {
- if (buffers[i].stride % 4 != 0) {
- // XXX Shouldn't we align the buffer?
- fprintf(stderr, "r300: set_vertex_buffers: "
- "Unaligned buffer stride %i isn't supported.\n",
- buffers[i].stride);
- abort();
+ if (r300->screen->caps.has_tcl) {
+ /* HW TCL. */
+ r300->incompatible_vb_layout = FALSE;
+
+ /* Check if the strides and offsets are aligned to the size of DWORD. */
+ for (i = 0; i < count; i++) {
+ if (buffers[i].buffer) {
+ if (buffers[i].stride % 4 != 0 ||
+ buffers[i].buffer_offset % 4 != 0) {
+ r300->incompatible_vb_layout = TRUE;
+ break;
+ }
}
}
- }
- for (i = 0; i < count; i++) {
- /* Why, yes, I AM casting away constness. How did you know? */
- vbo = (struct pipe_vertex_buffer*)&buffers[i];
+ for (i = 0; i < count; i++) {
+ /* Why, yes, I AM casting away constness. How did you know? */
+ vbo = (struct pipe_vertex_buffer*)&buffers[i];
- /* Reference our buffer. */
- pipe_resource_reference(&r300->vertex_buffer[i].buffer, vbo->buffer);
+ /* Skip NULL buffers */
+ if (!buffers[i].buffer) {
+ continue;
+ }
- /* Skip NULL buffers */
- if (!buffers[i].buffer) {
- continue;
- }
+ if (r300_buffer_is_user_buffer(vbo->buffer)) {
+ any_user_buffer = TRUE;
+ }
- if (r300_buffer_is_user_buffer(vbo->buffer)) {
- any_user_buffer = TRUE;
- }
+ if (vbo->max_index == ~0) {
+ /* if no VBO stride then only one vertex value so max index is 1 */
+ /* should think about converting to VS constants like svga does */
+ if (!vbo->stride)
+ vbo->max_index = 1;
+ else
+ vbo->max_index =
+ (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride;
+ }
- if (vbo->max_index == ~0) {
- /* if no VBO stride then only one vertex value so max index is 1 */
- /* should think about converting to VS constants like svga does */
- if (!vbo->stride)
- vbo->max_index = 1;
- else
- vbo->max_index =
- (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride;
+ max_index = MIN2(vbo->max_index, max_index);
}
- max_index = MIN2(vbo->max_index, max_index);
+ r300->any_user_vbs = any_user_buffer;
+ r300->vertex_buffer_max_index = max_index;
+
+ } else {
+ /* SW TCL. */
+ draw_flush(r300->draw);
+ draw_set_vertex_buffers(r300->draw, count, buffers);
}
+ /* Common code. */
+ for (i = 0; i < count; i++) {
+ /* Reference our buffer. */
+ pipe_resource_reference(&r300->vertex_buffer[i].buffer, buffers[i].buffer);
+ }
for (; i < r300->vertex_buffer_count; i++) {
/* Dereference any old buffers. */
pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL);
memcpy(r300->vertex_buffer, buffers,
sizeof(struct pipe_vertex_buffer) * count);
-
r300->vertex_buffer_count = count;
- r300->vertex_buffer_max_index = max_index;
- r300->any_user_vbs = any_user_buffer;
-
- if (r300->draw) {
- draw_flush(r300->draw);
- draw_set_vertex_buffers(r300->draw, count, buffers);
- }
}
-/* Update the PSC tables. */
+/* Initialize the PSC tables. */
static void r300_vertex_psc(struct r300_vertex_element_state *velems)
{
struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
* so PSC should just route stuff based on the vertex elements,
* and not on attrib information. */
for (i = 0; i < velems->count; i++) {
- format = velems->velem[i].src_format;
+ format = velems->hw_format[i];
- type = r300_translate_vertex_data_type(format) |
- (i << R300_DST_VEC_LOC_SHIFT);
+ type = r300_translate_vertex_data_type(format);
+ if (type == R300_INVALID_FORMAT) {
+ fprintf(stderr, "r300: Bad vertex format %s.\n",
+ util_format_short_name(format));
+ assert(0);
+ abort();
+ }
+
+ type |= i << R300_DST_VEC_LOC_SHIFT;
swizzle = r300_translate_vertex_data_swizzle(format);
if (i & 1) {
vstream->count = (i >> 1) + 1;
}
+#define FORMAT_REPLACE(what, withwhat) \
+ case PIPE_FORMAT_##what: *format = PIPE_FORMAT_##withwhat; break
+
static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
unsigned count,
const struct pipe_vertex_element* attribs)
{
struct r300_vertex_element_state *velems;
- unsigned i, size;
+ unsigned i;
enum pipe_format *format;
assert(count <= PIPE_MAX_ATTRIBS);
memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count);
if (r300_screen(pipe->screen)->caps.has_tcl) {
- r300_vertex_psc(velems);
-
- /* Check if the format is aligned to the size of DWORD.
- * We only care about the blocksizes of the formats since
- * swizzles are already set up. */
+ /* Set the best hw format in case the original format is not
+ * supported by hw. */
for (i = 0; i < count; i++) {
- format = &velems->velem[i].src_format;
+ velems->hw_format[i] = velems->velem[i].src_format;
+ format = &velems->hw_format[i];
- /* Replace some formats with their aligned counterparts,
- * this is OK because we check for aligned strides too. */
+ /* This is basically the list of unsupported formats.
+ * For now we don't care about the alignment, that's going to
+ * be sorted out after the PSC setup. */
switch (*format) {
- case PIPE_FORMAT_R8G8B8_UNORM:
- *format = PIPE_FORMAT_R8G8B8X8_UNORM;
- continue;
- case PIPE_FORMAT_R8G8B8_SNORM:
- *format = PIPE_FORMAT_R8G8B8A8_SNORM;
- continue;
- case PIPE_FORMAT_R8G8B8_USCALED:
- *format = PIPE_FORMAT_R8G8B8A8_USCALED;
- continue;
- case PIPE_FORMAT_R8G8B8_SSCALED:
- *format = PIPE_FORMAT_R8G8B8A8_SSCALED;
- continue;
- case PIPE_FORMAT_R16G16B16_UNORM:
- *format = PIPE_FORMAT_R16G16B16A16_UNORM;
- continue;
- case PIPE_FORMAT_R16G16B16_SNORM:
- *format = PIPE_FORMAT_R16G16B16A16_SNORM;
- continue;
- case PIPE_FORMAT_R16G16B16_USCALED:
- *format = PIPE_FORMAT_R16G16B16A16_USCALED;
- continue;
- case PIPE_FORMAT_R16G16B16_SSCALED:
- *format = PIPE_FORMAT_R16G16B16A16_SSCALED;
- continue;
+ FORMAT_REPLACE(R64_FLOAT, R32_FLOAT);
+ FORMAT_REPLACE(R64G64_FLOAT, R32G32_FLOAT);
+ FORMAT_REPLACE(R64G64B64_FLOAT, R32G32B32_FLOAT);
+ FORMAT_REPLACE(R64G64B64A64_FLOAT, R32G32B32A32_FLOAT);
+
+ FORMAT_REPLACE(R32_UNORM, R32_FLOAT);
+ FORMAT_REPLACE(R32G32_UNORM, R32G32_FLOAT);
+ FORMAT_REPLACE(R32G32B32_UNORM, R32G32B32_FLOAT);
+ FORMAT_REPLACE(R32G32B32A32_UNORM, R32G32B32A32_FLOAT);
+
+ FORMAT_REPLACE(R32_USCALED, R32_FLOAT);
+ FORMAT_REPLACE(R32G32_USCALED, R32G32_FLOAT);
+ FORMAT_REPLACE(R32G32B32_USCALED, R32G32B32_FLOAT);
+ FORMAT_REPLACE(R32G32B32A32_USCALED,R32G32B32A32_FLOAT);
+
+ FORMAT_REPLACE(R32_SNORM, R32_FLOAT);
+ FORMAT_REPLACE(R32G32_SNORM, R32G32_FLOAT);
+ FORMAT_REPLACE(R32G32B32_SNORM, R32G32B32_FLOAT);
+ FORMAT_REPLACE(R32G32B32A32_SNORM, R32G32B32A32_FLOAT);
+
+ FORMAT_REPLACE(R32_SSCALED, R32_FLOAT);
+ FORMAT_REPLACE(R32G32_SSCALED, R32G32_FLOAT);
+ FORMAT_REPLACE(R32G32B32_SSCALED, R32G32B32_FLOAT);
+ FORMAT_REPLACE(R32G32B32A32_SSCALED,R32G32B32A32_FLOAT);
+
+ FORMAT_REPLACE(R32_FIXED, R32_FLOAT);
+ FORMAT_REPLACE(R32G32_FIXED, R32G32_FLOAT);
+ FORMAT_REPLACE(R32G32B32_FIXED, R32G32B32_FLOAT);
+ FORMAT_REPLACE(R32G32B32A32_FIXED, R32G32B32A32_FLOAT);
+
default:;
}
- size = util_format_get_blocksize(*format);
-
- if (size % 4 != 0) {
- /* XXX Shouldn't we align the format? */
- fprintf(stderr, "r300_create_vertex_elements_state: "
- "Unaligned format %s:%i isn't supported\n",
- util_format_name(*format), size);
- assert(0);
- abort();
- }
+ velems->incompatible_layout =
+ velems->incompatible_layout ||
+ velems->velem[i].src_format != velems->hw_format[i] ||
+ velems->velem[i].src_offset % 4 != 0;
}
+ /* Now setup PSC.
+ * The unused components will be replaced by (..., 0, 1). */
+ r300_vertex_psc(velems);
+
+ /* Align the formats to the size of DWORD.
+ * We only care about the blocksizes of the formats since
+ * swizzles are already set up.
+ * Also compute the vertex size. */
+ for (i = 0; i < count; i++) {
+ /* This is OK because we check for aligned strides too. */
+ velems->hw_format_size[i] =
+ align(util_format_get_blocksize(velems->hw_format[i]), 4);
+ velems->vertex_size_dwords += velems->hw_format_size[i] / 4;
+ }
}
}
return velems;
if (r300->draw) {
draw_flush(r300->draw);
draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
+ return;
}
UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
const struct pipe_shader_state* shader)
{
struct r300_context* r300 = r300_context(pipe);
-
struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
/* Copy state directly into shader. */
vs->state.tokens = tgsi_dup_tokens(shader->tokens);
if (r300->screen->caps.has_tcl) {
- r300_translate_vertex_shader(r300, vs, vs->state.tokens);
+ r300_init_vs_outputs(vs);
+ r300_translate_vertex_shader(r300, vs);
} else {
- vs->draw_vs = draw_create_vertex_shader(r300->draw, shader);
+ r300_draw_init_vertex_shader(r300->draw, vs);
}
return vs;
}
r300->vs_state.state = vs;
- // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block
- if (r300->fs.state) {
- r300_vertex_shader_setup_wpos(r300);
- }
- memcpy(r300->vap_output_state.state, &vs->vap_out,
- sizeof(struct r300_vap_output_state));
- r300->vap_output_state.dirty = TRUE;
-
/* The majority of the RS block bits is dependent on the vertex shader. */
r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
{
struct r300_context* r300 = r300_context(pipe);
struct r300_constant_buffer *cbuf;
- struct pipe_transfer *tr;
- void *mapped;
- int max_size = 0;
+ uint32_t *mapped = r300_buffer(buf)->user_buffer;
+ int max_size = 0, max_size_bytes = 0, clamped_size = 0;
switch (shader) {
case PIPE_SHADER_VERTEX:
assert(0);
return;
}
+ max_size_bytes = max_size * 4 * sizeof(float);
if (buf == NULL || buf->width0 == 0 ||
- (mapped = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &tr)) == NULL)
- {
+ (mapped = r300_buffer(buf)->constant_buffer) == NULL) {
cbuf->count = 0;
return;
}
- assert((buf->width0 % 4 * sizeof(float)) == 0);
+ if (shader == PIPE_SHADER_FRAGMENT ||
+ (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) {
+ assert((buf->width0 % (4 * sizeof(float))) == 0);
- /* Check the size of the constant buffer. */
- /* XXX Subtract immediates and RC_STATE_* variables. */
- if (buf->width0 > (sizeof(float) * 4 * max_size)) {
- fprintf(stderr, "r300: Max size of the constant buffer is "
- "%i*4 floats.\n", max_size);
- abort();
- }
+ /* Check the size of the constant buffer. */
+ /* XXX Subtract immediates and RC_STATE_* variables. */
+ if (buf->width0 > max_size_bytes) {
+ fprintf(stderr, "r300: Max size of the constant buffer is "
+ "%i*4 floats.\n", max_size);
+ }
- memcpy(cbuf->constants, mapped, buf->width0);
- cbuf->count = buf->width0 / (4 * sizeof(float));
- pipe_buffer_unmap(pipe, buf, tr);
+ clamped_size = MIN2(buf->width0, max_size_bytes);
+ cbuf->count = clamped_size / (4 * sizeof(float));
+ cbuf->ptr = mapped;
+ }
if (shader == PIPE_SHADER_VERTEX) {
if (r300->screen->caps.has_tcl) {
r300->pvs_flush.dirty = TRUE;
} else if (r300->draw) {
draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX,
- 0, cbuf->constants,
- buf->width0);
+ 0, mapped, buf->width0);
}
} else if (shader == PIPE_SHADER_FRAGMENT) {
r300->fs_constants.dirty = TRUE;
r300->context.set_blend_color = r300_set_blend_color;
r300->context.set_clip_state = r300_set_clip_state;
+ r300->context.set_sample_mask = r300_set_sample_mask;
r300->context.set_constant_buffer = r300_set_constant_buffer;
projects / mesa.git / blobdiff