Merge branch 'gallium-nopointsizeminmax'

[mesa.git] / src / gallium / drivers / r300 / r300_state.c

diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c
index a5c0869066c70121c83a1003089782eb8bfa48c7..d07e90860c28e2f2b61a093045044eb3dfd556bd 100644 (file)
--- a/src/gallium/drivers/r300/r300_state.c
+++ b/src/gallium/drivers/r300/r300_state.c
@@ -155,6 +155,15 @@ static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA
             dstA == PIPE_BLENDFACTOR_ONE);
 }
 
+static unsigned bgra_cmask(unsigned mask)
+{
+    /* Gallium uses RGBA color ordering while R300 expects BGRA. */
+
+    return ((mask & PIPE_MASK_R) << 2) |
+           ((mask & PIPE_MASK_B) >> 2) |
+           (mask & (PIPE_MASK_G | PIPE_MASK_A));
+}
+
 /* Create a new blend state based on the CSO blend state.
  *
  * This encompasses alpha blending, logic/raster ops, and blend dithering. */
@@ -290,16 +299,16 @@ static void* r300_create_blend_state(struct pipe_context* pipe,
     }
 
     /* Color channel masks for all MRTs. */
-    blend->color_channel_mask = state->rt[0].colormask;
+    blend->color_channel_mask = bgra_cmask(state->rt[0].colormask);
     if (r300screen->caps->is_r500 && state->independent_blend_enable) {
         if (state->rt[1].blend_enable) {
-            blend->color_channel_mask |= (state->rt[1].colormask << 4);
+            blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4;
         }
         if (state->rt[2].blend_enable) {
-            blend->color_channel_mask |= (state->rt[2].colormask << 8);
+            blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8;
         }
         if (state->rt[3].blend_enable) {
-            blend->color_channel_mask |= (state->rt[3].colormask << 12);
+            blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12;
         }
     }
 
@@ -432,7 +441,6 @@ static void*
             (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
                 R300_S_BACK_ZFAIL_OP_SHIFT);
 
-            /* XXX it seems r3xx doesn't support STENCILREFMASK_BF */
             if (caps->is_r500)
             {
                 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
@@ -451,8 +459,7 @@ static void*
             r300_translate_alpha_function(state->alpha.func) |
             R300_FG_ALPHA_FUNC_ENABLE;
 
-        /* XXX figure out why emitting 10bit alpha ref causes CS to dump */
-        /* always use 8bit alpha ref */
+        /* We could use 10bit alpha ref but who needs that? */
         dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
 
         if (caps->is_r500)
@@ -502,7 +509,7 @@ static void
         draw_flush(r300->draw);
     }
 
-    r300->fb_state.state = state;
+    memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state));
 
     /* Don't rely on the order of states being set for the first time. */
     /* XXX wait what */
@@ -621,10 +628,12 @@ static void* r300_create_rs_state(struct pipe_context* pipe,
     rs->point_size = pack_float_16_6x(state->point_size) |
         (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
 
-    rs->point_minmax =
-        ((int)(state->point_size_min * 6.0) <<
+        /* set hw limits - clamping done by state tracker in vs or point_size
+           XXX always need to emit this? */
+        rs->point_minmax =
+        ((int)(0.0 * 6.0) <<
          R300_GA_POINT_MINMAX_MIN_SHIFT) |
-        ((int)(state->point_size_max * 6.0) <<
+        ((int)(4096.0 * 6.0) <<
          R300_GA_POINT_MINMAX_MAX_SHIFT);
 
     rs->line_control = pack_float_16_6x(state->line_width) |