gallium: Add pipe cap for primitive restart with fixed index

[mesa.git] / src / gallium / drivers / r300 / r300_texture.c

diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c
index 14372da62e422218aed875eda236f88222f23714..be5818794c65b01775544c8e2b885b390bde8b46 100644 (file)
--- a/src/gallium/drivers/r300/r300_texture.c
+++ b/src/gallium/drivers/r300/r300_texture.c
@@ -30,13 +30,13 @@
 #include "r300_transfer.h"
 #include "r300_screen.h"
 
-#include "util/u_format.h"
-#include "util/u_format_s3tc.h"
+#include "util/format/u_format.h"
+#include "util/format/u_format_s3tc.h"
 #include "util/u_math.h"
 #include "util/u_memory.h"
-#include "util/u_mm.h"
 
 #include "pipe/p_screen.h"
+#include "frontend/winsys_handle.h"
 
 /* These formats are supported by swapping their bytes.
  * The swizzles must be set exactly like their non-swapped counterparts,
@@ -47,6 +47,11 @@
  */
 static enum pipe_format r300_unbyteswap_array_format(enum pipe_format format)
 {
+    /* FIXME: Disabled on little endian because of a reported regression:
+     * https://bugs.freedesktop.org/show_bug.cgi?id=98869 */
+    if (PIPE_ENDIAN_NATIVE != PIPE_ENDIAN_BIG)
+        return format;
+
     /* Only BGRA 8888 array formats are supported for simplicity of
      * the implementation. */
     switch (format) {
@@ -246,10 +251,6 @@ uint32_t r300_translate_texformat(enum pipe_format format,
 
     /* S3TC formats. */
     if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
-        if (!util_format_s3tc_enabled) {
-            return ~0; /* Unsupported. */
-        }
-
         switch (format) {
             case PIPE_FORMAT_DXT1_RGB:
             case PIPE_FORMAT_DXT1_RGBA:
@@ -1025,30 +1026,33 @@ static void r300_texture_destroy(struct pipe_screen *screen,
     struct r300_resource* tex = (struct r300_resource*)texture;
 
     if (tex->tex.cmask_dwords) {
-        pipe_mutex_lock(rscreen->cmask_mutex);
+        mtx_lock(&rscreen->cmask_mutex);
         if (texture == rscreen->cmask_resource) {
             rscreen->cmask_resource = NULL;
         }
-        pipe_mutex_unlock(rscreen->cmask_mutex);
+        mtx_unlock(&rscreen->cmask_mutex);
     }
     pb_reference(&tex->buf, NULL);
     FREE(tex);
 }
 
-boolean r300_resource_get_handle(struct pipe_screen* screen,
-                                 struct pipe_resource *texture,
-                                 struct winsys_handle *whandle,
-                                 unsigned usage)
+bool r300_resource_get_handle(struct pipe_screen* screen,
+                              struct pipe_context *ctx,
+                              struct pipe_resource *texture,
+                              struct winsys_handle *whandle,
+                              unsigned usage)
 {
     struct radeon_winsys *rws = r300_screen(screen)->rws;
     struct r300_resource* tex = (struct r300_resource*)texture;
 
     if (!tex) {
-        return FALSE;
+        return false;
     }
 
-    return rws->buffer_get_handle(tex->buf, tex->tex.stride_in_bytes[0],
-                                  0, 0, whandle);
+    whandle->stride = tex->tex.stride_in_bytes[0];
+    whandle->offset = 0;
+
+    return rws->buffer_get_handle(rws, tex->buf, whandle);
 }
 
 static const struct u_resource_vtbl r300_texture_vtbl =
@@ -1058,7 +1062,6 @@ static const struct u_resource_vtbl r300_texture_vtbl =
     r300_texture_transfer_map,      /* transfer_map */
     NULL,                           /* transfer_flush_region */
     r300_texture_transfer_unmap,    /* transfer_unmap */
-    NULL /* transfer_inline_write */
 };
 
 /* The common texture constructor. */
@@ -1113,8 +1116,16 @@ r300_texture_create_object(struct r300_screen *rscreen,
 
     /* Create the backing buffer if needed. */
     if (!tex->buf) {
+        /* Only use the first domain for allocation. Multiple domains are not allowed. */
+        unsigned alloc_domain =
+            tex->domain & RADEON_DOMAIN_VRAM ? RADEON_DOMAIN_VRAM :
+                                               RADEON_DOMAIN_GTT;
+
         tex->buf = rws->buffer_create(rws, tex->tex.size_in_bytes, 2048,
-                                      tex->domain, 0);
+                                      alloc_domain,
+                                      RADEON_FLAG_NO_SUBALLOC |
+                                      /* Use the reusable pool: */
+                                      RADEON_FLAG_NO_INTERPROCESS_SHARING);
 
         if (!tex->buf) {
             goto fail;
@@ -1127,10 +1138,10 @@ r300_texture_create_object(struct r300_screen *rscreen,
                 util_format_is_depth_or_stencil(base->format) ? "depth" : "color");
     }
 
-    tiling.microtile = tex->tex.microtile;
-    tiling.macrotile = tex->tex.macrotile[0];
-    tiling.stride = tex->tex.stride_in_bytes[0];
-    rws->buffer_set_metadata(tex->buf, &tiling);
+    tiling.u.legacy.microtile = tex->tex.microtile;
+    tiling.u.legacy.macrotile = tex->tex.macrotile[0];
+    tiling.u.legacy.stride = tex->tex.stride_in_bytes[0];
+    rws->buffer_set_metadata(tex->buf, &tiling, NULL);
 
     return tex;
 
@@ -1171,7 +1182,6 @@ struct pipe_resource *r300_texture_from_handle(struct pipe_screen *screen,
     struct r300_screen *rscreen = r300_screen(screen);
     struct radeon_winsys *rws = rscreen->rws;
     struct pb_buffer *buffer;
-    unsigned stride;
     struct radeon_bo_metadata tiling = {};
 
     /* Support only 2D textures without mipmaps */
@@ -1182,29 +1192,29 @@ struct pipe_resource *r300_texture_from_handle(struct pipe_screen *screen,
         return NULL;
     }
 
-    buffer = rws->buffer_from_handle(rws, whandle, &stride, NULL);
+    buffer = rws->buffer_from_handle(rws, whandle, 0);
     if (!buffer)
         return NULL;
 
-    rws->buffer_get_metadata(buffer, &tiling);
+    rws->buffer_get_metadata(buffer, &tiling, NULL);
 
     /* Enforce a microtiled zbuffer. */
     if (util_format_is_depth_or_stencil(base->format) &&
-        tiling.microtile == RADEON_LAYOUT_LINEAR) {
+        tiling.u.legacy.microtile == RADEON_LAYOUT_LINEAR) {
         switch (util_format_get_blocksize(base->format)) {
             case 4:
-                tiling.microtile = RADEON_LAYOUT_TILED;
+                tiling.u.legacy.microtile = RADEON_LAYOUT_TILED;
                 break;
 
             case 2:
-                tiling.microtile = RADEON_LAYOUT_SQUARETILED;
+                tiling.u.legacy.microtile = RADEON_LAYOUT_SQUARETILED;
                 break;
         }
     }
 
     return (struct pipe_resource*)
-           r300_texture_create_object(rscreen, base, tiling.microtile, tiling.macrotile,
-                                      stride, buffer);
+           r300_texture_create_object(rscreen, base, tiling.u.legacy.microtile, tiling.u.legacy.macrotile,
+                                      whandle->stride, buffer);
 }
 
 /* Not required to implement u_resource_vtbl, consider moving to another file:
@@ -1234,7 +1244,6 @@ struct pipe_surface* r300_create_surface_custom(struct pipe_context * ctx,
         surface->base.u.tex.first_layer = surf_tmpl->u.tex.first_layer;
         surface->base.u.tex.last_layer = surf_tmpl->u.tex.last_layer;
 
-        surface->buf = tex->buf;
         surface->buf = tex->buf;
 
         /* Prefer VRAM if there are multiple domains to choose from. */