freedreno/a6xx: disable LRZ when color channels are masked

[mesa.git] / src / gallium / drivers / r300 / r300_texture.c

diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c
index cdf9ccb9738e04712bcba930eb78dd9a284b97fb..d175d6caa65dd384d5fbe315661b879425d84786 100644 (file)
--- a/src/gallium/drivers/r300/r300_texture.c
+++ b/src/gallium/drivers/r300/r300_texture.c
@@ -30,13 +30,13 @@
 #include "r300_transfer.h"
 #include "r300_screen.h"
 
-#include "util/u_format.h"
-#include "util/u_format_s3tc.h"
+#include "util/format/u_format.h"
+#include "util/format/u_format_s3tc.h"
 #include "util/u_math.h"
 #include "util/u_memory.h"
-#include "util/u_mm.h"
 
 #include "pipe/p_screen.h"
+#include "frontend/winsys_handle.h"
 
 /* These formats are supported by swapping their bytes.
  * The swizzles must be set exactly like their non-swapped counterparts,
@@ -251,10 +251,6 @@ uint32_t r300_translate_texformat(enum pipe_format format,
 
     /* S3TC formats. */
     if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
-        if (!util_format_s3tc_enabled) {
-            return ~0; /* Unsupported. */
-        }
-
         switch (format) {
             case PIPE_FORMAT_DXT1_RGB:
             case PIPE_FORMAT_DXT1_RGBA:
@@ -278,6 +274,7 @@ uint32_t r300_translate_texformat(enum pipe_format format,
             case PIPE_FORMAT_RGTC1_SNORM:
             case PIPE_FORMAT_LATC1_SNORM:
                 result |= sign_bit[0];
+                /* fallthrough */
             case PIPE_FORMAT_LATC1_UNORM:
             case PIPE_FORMAT_RGTC1_UNORM:
                 return R500_TX_FORMAT_ATI1N | result;
@@ -285,6 +282,7 @@ uint32_t r300_translate_texformat(enum pipe_format format,
             case PIPE_FORMAT_RGTC2_SNORM:
             case PIPE_FORMAT_LATC2_SNORM:
                 result |= sign_bit[1] | sign_bit[0];
+                /* fallthrough */
             case PIPE_FORMAT_RGTC2_UNORM:
             case PIPE_FORMAT_LATC2_UNORM:
                 return R400_TX_FORMAT_ATI2N | result;
@@ -1040,21 +1038,23 @@ static void r300_texture_destroy(struct pipe_screen *screen,
     FREE(tex);
 }
 
-boolean r300_resource_get_handle(struct pipe_screen* screen,
-                                 struct pipe_context *ctx,
-                                 struct pipe_resource *texture,
-                                 struct winsys_handle *whandle,
-                                 unsigned usage)
+bool r300_resource_get_handle(struct pipe_screen* screen,
+                              struct pipe_context *ctx,
+                              struct pipe_resource *texture,
+                              struct winsys_handle *whandle,
+                              unsigned usage)
 {
     struct radeon_winsys *rws = r300_screen(screen)->rws;
     struct r300_resource* tex = (struct r300_resource*)texture;
 
     if (!tex) {
-        return FALSE;
+        return false;
     }
 
-    return rws->buffer_get_handle(tex->buf, tex->tex.stride_in_bytes[0],
-                                  0, 0, whandle);
+    whandle->stride = tex->tex.stride_in_bytes[0];
+    whandle->offset = 0;
+
+    return rws->buffer_get_handle(rws, tex->buf, whandle);
 }
 
 static const struct u_resource_vtbl r300_texture_vtbl =
@@ -1118,8 +1118,16 @@ r300_texture_create_object(struct r300_screen *rscreen,
 
     /* Create the backing buffer if needed. */
     if (!tex->buf) {
+        /* Only use the first domain for allocation. Multiple domains are not allowed. */
+        unsigned alloc_domain =
+            tex->domain & RADEON_DOMAIN_VRAM ? RADEON_DOMAIN_VRAM :
+                                               RADEON_DOMAIN_GTT;
+
         tex->buf = rws->buffer_create(rws, tex->tex.size_in_bytes, 2048,
-                                      tex->domain, RADEON_FLAG_NO_SUBALLOC);
+                                      alloc_domain,
+                                      RADEON_FLAG_NO_SUBALLOC |
+                                      /* Use the reusable pool: */
+                                      RADEON_FLAG_NO_INTERPROCESS_SHARING);
 
         if (!tex->buf) {
             goto fail;
@@ -1135,7 +1143,7 @@ r300_texture_create_object(struct r300_screen *rscreen,
     tiling.u.legacy.microtile = tex->tex.microtile;
     tiling.u.legacy.macrotile = tex->tex.macrotile[0];
     tiling.u.legacy.stride = tex->tex.stride_in_bytes[0];
-    rws->buffer_set_metadata(tex->buf, &tiling);
+    rws->buffer_set_metadata(tex->buf, &tiling, NULL);
 
     return tex;
 
@@ -1176,7 +1184,6 @@ struct pipe_resource *r300_texture_from_handle(struct pipe_screen *screen,
     struct r300_screen *rscreen = r300_screen(screen);
     struct radeon_winsys *rws = rscreen->rws;
     struct pb_buffer *buffer;
-    unsigned stride;
     struct radeon_bo_metadata tiling = {};
 
     /* Support only 2D textures without mipmaps */
@@ -1187,11 +1194,11 @@ struct pipe_resource *r300_texture_from_handle(struct pipe_screen *screen,
         return NULL;
     }
 
-    buffer = rws->buffer_from_handle(rws, whandle, &stride, NULL);
+    buffer = rws->buffer_from_handle(rws, whandle, 0);
     if (!buffer)
         return NULL;
 
-    rws->buffer_get_metadata(buffer, &tiling);
+    rws->buffer_get_metadata(buffer, &tiling, NULL);
 
     /* Enforce a microtiled zbuffer. */
     if (util_format_is_depth_or_stencil(base->format) &&
@@ -1209,7 +1216,7 @@ struct pipe_resource *r300_texture_from_handle(struct pipe_screen *screen,
 
     return (struct pipe_resource*)
            r300_texture_create_object(rscreen, base, tiling.u.legacy.microtile, tiling.u.legacy.macrotile,
-                                      stride, buffer);
+                                      whandle->stride, buffer);
 }
 
 /* Not required to implement u_resource_vtbl, consider moving to another file:
@@ -1239,7 +1246,6 @@ struct pipe_surface* r300_create_surface_custom(struct pipe_context * ctx,
         surface->base.u.tex.first_layer = surf_tmpl->u.tex.first_layer;
         surface->base.u.tex.last_layer = surf_tmpl->u.tex.last_layer;
 
-        surface->buf = tex->buf;
         surface->buf = tex->buf;
 
         /* Prefer VRAM if there are multiple domains to choose from. */