nvir: bump max encoding size of instructions
[mesa.git] / src / gallium / drivers / r300 / r300_transfer.c
index 436b30445b273269c75c96d5dae4fc3d7a6e9502..95cea7265512fb53b3d95b57c6e92058443b23ec 100644 (file)
@@ -26,7 +26,7 @@
 #include "r300_screen_buffer.h"
 
 #include "util/u_memory.h"
-#include "util/u_format.h"
+#include "util/format/u_format.h"
 #include "util/u_box.h"
 
 struct r300_transfer {
@@ -41,7 +41,7 @@ struct r300_transfer {
 };
 
 /* Convenience cast wrapper. */
-static INLINE struct r300_transfer*
+static inline struct r300_transfer*
 r300_transfer(struct pipe_transfer* transfer)
 {
     return (struct r300_transfer*)transfer;
@@ -86,7 +86,10 @@ static void r300_copy_into_tiled_texture(struct pipe_context *ctx,
     struct pipe_transfer *transfer = (struct pipe_transfer*)r300transfer;
     struct pipe_resource *tex = transfer->resource;
     struct pipe_box src_box;
-    u_box_origin_2d(transfer->box.width, transfer->box.height, &src_box);
+
+    u_box_3d(0, 0, 0,
+             transfer->box.width, transfer->box.height, transfer->box.depth,
+             &src_box);
 
     ctx->resource_copy_region(ctx, tex, transfer->level,
                               transfer->box.x, transfer->box.y, transfer->box.z,
@@ -107,18 +110,17 @@ r300_texture_transfer_map(struct pipe_context *ctx,
     struct r300_context *r300 = r300_context(ctx);
     struct r300_resource *tex = r300_resource(texture);
     struct r300_transfer *trans;
-    struct pipe_resource base;
     boolean referenced_cs, referenced_hw;
     enum pipe_format format = tex->b.b.format;
     char *map;
 
     referenced_cs =
-        r300->rws->cs_is_buffer_referenced(r300->cs, tex->cs_buf, RADEON_USAGE_READWRITE);
+        r300->rws->cs_is_buffer_referenced(r300->cs, tex->buf, RADEON_USAGE_READWRITE);
     if (referenced_cs) {
         referenced_hw = TRUE;
     } else {
         referenced_hw =
-            r300->rws->buffer_is_busy(tex->buf, RADEON_USAGE_READWRITE);
+            !r300->rws->buffer_wait(tex->buf, 0, RADEON_USAGE_READWRITE);
     }
 
     trans = CALLOC_STRUCT(r300_transfer);
@@ -135,6 +137,8 @@ r300_texture_transfer_map(struct pipe_context *ctx,
         if (tex->tex.microtile || tex->tex.macrotile[level] ||
             (referenced_hw && !(usage & PIPE_TRANSFER_READ) &&
              r300_is_blit_supported(texture->format))) {
+            struct pipe_resource base;
+
             if (r300->blitter->running) {
                 fprintf(stderr, "r300: ERROR: Blitter recursion in texture_get_transfer.\n");
                 os_break();
@@ -150,6 +154,15 @@ r300_texture_transfer_map(struct pipe_context *ctx,
             base.usage = PIPE_USAGE_STAGING;
             base.flags = R300_RESOURCE_FLAG_TRANSFER;
 
+            /* We must set the correct texture target and dimensions if needed for a 3D transfer. */
+            if (box->depth > 1 && util_max_layer(texture, level) > 0) {
+                base.target = texture->target;
+
+                if (base.target == PIPE_TEXTURE_3D) {
+                    base.depth0 = util_next_power_of_two(box->depth);
+                }
+            }
+
             /* Create the temporary texture. */
             trans->linear_texture = r300_resource(
                ctx->screen->resource_create(ctx->screen,
@@ -178,6 +191,8 @@ r300_texture_transfer_map(struct pipe_context *ctx,
             /* Set the stride. */
             trans->transfer.stride =
                     trans->linear_texture->tex.stride_in_bytes[0];
+            trans->transfer.layer_stride =
+                    trans->linear_texture->tex.layer_size_in_bytes[0];
 
             if (usage & PIPE_TRANSFER_READ) {
                 /* We cannot map a tiled texture directly because the data is
@@ -190,6 +205,7 @@ r300_texture_transfer_map(struct pipe_context *ctx,
         } else {
             /* Unpipelined transfer. */
             trans->transfer.stride = tex->tex.stride_in_bytes[level];
+            trans->transfer.layer_stride = tex->tex.layer_size_in_bytes[level];
             trans->offset = r300_texture_get_offset(tex, level, box->z);
 
             if (referenced_cs &&
@@ -202,7 +218,7 @@ r300_texture_transfer_map(struct pipe_context *ctx,
     if (trans->linear_texture) {
         /* The detiled texture is of the same size as the region being mapped
          * (no offset needed). */
-        map = r300->rws->buffer_map(trans->linear_texture->cs_buf,
+        map = r300->rws->buffer_map(trans->linear_texture->buf,
                                     r300->cs, usage);
         if (!map) {
             pipe_resource_reference(
@@ -214,7 +230,7 @@ r300_texture_transfer_map(struct pipe_context *ctx,
         return map;
     } else {
         /* Tiling is disabled. */
-        map = r300->rws->buffer_map(tex->cs_buf, r300->cs, usage);
+        map = r300->rws->buffer_map(tex->buf, r300->cs, usage);
         if (!map) {
             FREE(trans);
             return NULL;
@@ -230,21 +246,15 @@ r300_texture_transfer_map(struct pipe_context *ctx,
 void r300_texture_transfer_unmap(struct pipe_context *ctx,
                                 struct pipe_transfer *transfer)
 {
-    struct radeon_winsys *rws = r300_context(ctx)->rws;
     struct r300_transfer *trans = r300_transfer(transfer);
-    struct r300_resource *tex = r300_resource(transfer->resource);
 
     if (trans->linear_texture) {
-        rws->buffer_unmap(trans->linear_texture->cs_buf);
-
         if (transfer->usage & PIPE_TRANSFER_WRITE) {
             r300_copy_into_tiled_texture(ctx, trans);
         }
 
         pipe_resource_reference(
             (struct pipe_resource**)&trans->linear_texture, NULL);
-    } else {
-        rws->buffer_unmap(tex->cs_buf);
     }
     FREE(transfer);
 }