clover: Wrap event::wait_count in a method taking care of the required locking.
[mesa.git] / src / gallium / drivers / r600 / eg_asm.c
index 67d742b376098890b75c7a4a923fd77dba63197b..6840cf6f18a32dfe391909b5e6f0a850f83ddc27 100644 (file)
  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-#include <stdio.h>
-#include <errno.h>
-#include "util/u_memory.h"
 #include "r600_pipe.h"
-#include "r600_asm.h"
-#include "eg_sq.h"
 #include "r600_opcodes.h"
-#include "evergreend.h"
+#include "r600_shader.h"
+
+#include "util/u_memory.h"
+#include "eg_sq.h"
+#include <errno.h>
 
-int eg_bc_cf_build(struct r600_bc *bc, struct r600_bc_cf *cf)
+int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf)
 {
        unsigned id = cf->id;
 
-       switch (cf->inst) {
-       case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
-       case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3):
-       case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3):
-       case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
-               bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
-                       S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) |
-                       S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
-                       S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank);
-               bc->bytecode[id++] = S_SQ_CF_ALU_WORD1_CF_INST(cf->inst >> 3) |
-                       S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache[1].mode) |
-                       S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache[0].addr) |
-                       S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache[1].addr) |
+       if (cf->op == CF_NATIVE) {
+               bc->bytecode[id++] = cf->isa[0];
+               bc->bytecode[id++] = cf->isa[1];
+       } else {
+               const struct cf_op_info *cfop = r600_isa_cf(cf->op);
+               unsigned opcode = r600_isa_cf_opcode(bc->isa->hw_class, cf->op);
+               if (cfop->flags & CF_ALU) { /* ALU clauses */
+
+                       /* prepend ALU_EXTENDED if we need more than 2 kcache sets */
+                       if (cf->eg_alu_extended) {
+                               bc->bytecode[id++] =
+                                               S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE0(cf->kcache[0].index_mode) |
+                                               S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE1(cf->kcache[1].index_mode) |
+                                               S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE2(cf->kcache[2].index_mode) |
+                                               S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE3(cf->kcache[3].index_mode) |
+                                               S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK2(cf->kcache[2].bank) |
+                                               S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK3(cf->kcache[3].bank) |
+                                               S_SQ_CF_ALU_WORD0_EXT_KCACHE_MODE2(cf->kcache[2].mode);
+                               bc->bytecode[id++] =
+                                               S_SQ_CF_ALU_WORD1_EXT_CF_INST(
+                                                       r600_isa_cf_opcode(bc->isa->hw_class, CF_OP_ALU_EXT)) |
+                                               S_SQ_CF_ALU_WORD1_EXT_KCACHE_MODE3(cf->kcache[3].mode) |
+                                               S_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR2(cf->kcache[2].addr) |
+                                               S_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR3(cf->kcache[3].addr) |
+                                               S_SQ_CF_ALU_WORD1_EXT_BARRIER(1);
+                       }
+                       bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
+                                       S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) |
+                                       S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
+                                       S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank);
+                       bc->bytecode[id++] = S_SQ_CF_ALU_WORD1_CF_INST(opcode) |
+                                       S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache[1].mode) |
+                                       S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache[0].addr) |
+                                       S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache[1].addr) |
                                        S_SQ_CF_ALU_WORD1_BARRIER(1) |
                                        S_SQ_CF_ALU_WORD1_COUNT((cf->ndw / 2) - 1);
-               break;
-       case EG_V_SQ_CF_WORD1_SQ_CF_INST_TEX:
-       case EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX:
-               bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->addr >> 1);
-               bc->bytecode[id++] = S_SQ_CF_WORD1_CF_INST(cf->inst) |
+               } else if (cfop->flags & CF_CLAUSE) {
+                       /* CF_TEX/VTX (CF_ALU already handled above) */
+                       bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->addr >> 1);
+                       bc->bytecode[id++] = S_SQ_CF_WORD1_CF_INST(opcode) |
                                        S_SQ_CF_WORD1_BARRIER(1) |
                                        S_SQ_CF_WORD1_COUNT((cf->ndw / 4) - 1);
-               break;
-       case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
-       case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
-               bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
-                       S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
-                       S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
-                       S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type);
-               bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(cf->output.swizzle_x) |
-                       S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(cf->output.swizzle_y) |
-                       S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(cf->output.swizzle_z) |
-                       S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(cf->output.swizzle_w) |
-                       S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->output.barrier) |
-                       S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->output.inst) |
-                       S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->output.end_of_program);
-               break;
-       case EG_V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
-       case EG_V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
-       case EG_V_SQ_CF_WORD1_SQ_CF_INST_POP:
-       case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
-       case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
-       case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
-       case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
-       case EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
-       case EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
-               bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->cf_addr >> 1);
-               bc->bytecode[id++] = S_SQ_CF_WORD1_CF_INST(cf->inst) |
+               } else if (cfop->flags & CF_EXP) {
+                       /* EXPORT instructions */
+                       bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(cf->output.index_gpr);
+                       bc->bytecode[id] =
+                                       S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(cf->output.swizzle_x) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(cf->output.swizzle_y) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(cf->output.swizzle_z) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(cf->output.swizzle_w) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode);
+
+                       if (bc->chip_class == EVERGREEN) /* no EOP on cayman */
+                               bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
+                       id++;
+               } else if (cfop->flags & CF_MEM) {
+                       /* MEM_STREAM, MEM_RING instructions */
+                       bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(cf->output.index_gpr);
+                       bc->bytecode[id] = S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(cf->output.comp_mask) |
+                                       S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(cf->output.array_size);
+                       if (bc->chip_class == EVERGREEN) /* no EOP on cayman */
+                               bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
+                       id++;
+               } else {
+                       /* other instructions */
+                       bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->cf_addr >> 1);
+                       bc->bytecode[id++] =  S_SQ_CF_WORD1_CF_INST(opcode)|
                                        S_SQ_CF_WORD1_BARRIER(1) |
                                        S_SQ_CF_WORD1_COND(cf->cond) |
-                                       S_SQ_CF_WORD1_POP_COUNT(cf->pop_count);
+                                       S_SQ_CF_WORD1_POP_COUNT(cf->pop_count) |
+                                       S_SQ_CF_WORD1_COUNT(cf->count) |
+                                       S_SQ_CF_WORD1_END_OF_PROGRAM(cf->end_of_program);
+               }
+       }
+       return 0;
+}
+
+#if 0
+void eg_bytecode_export_read(struct r600_bytecode *bc,
+               struct r600_bytecode_output *output, uint32_t word0, uint32_t word1)
+{
+       output->array_base = G_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(word0);
+       output->type = G_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(word0);
+       output->gpr = G_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(word0);
+       output->elem_size = G_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(word0);
+
+       output->swizzle_x = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(word1);
+       output->swizzle_y = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(word1);
+       output->swizzle_z = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(word1);
+       output->swizzle_w = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(word1);
+       output->burst_count = G_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(word1);
+       output->end_of_program = G_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(word1);
+       output->op = r600_isa_cf_by_opcode(bc->isa,
+                       G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(word1), /* is_cf_alu = */ 0 );
+       output->barrier = G_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(word1);
+       output->array_size = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(word1);
+       output->comp_mask = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(word1);
+}
+#endif
+
+int egcm_load_index_reg(struct r600_bytecode *bc, unsigned id, bool inside_alu_clause)
+{
+       struct r600_bytecode_alu alu;
+       int r;
+       unsigned type;
+
+       assert(id < 2);
+       assert(bc->chip_class >= EVERGREEN);
 
-               break;
-       default:
-               R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
-               return -EINVAL;
+       if (bc->index_loaded[id])
+               return 0;
+
+       memset(&alu, 0, sizeof(alu));
+       alu.op = ALU_OP1_MOVA_INT;
+       alu.src[0].sel = bc->index_reg[id];
+       alu.src[0].chan = 0;
+       if (bc->chip_class == CAYMAN)
+               alu.dst.sel = id == 0 ? CM_V_SQ_MOVA_DST_CF_IDX0 : CM_V_SQ_MOVA_DST_CF_IDX1;
+
+       alu.last = 1;
+       r = r600_bytecode_add_alu(bc, &alu);
+       if (r)
+               return r;
+
+       bc->ar_loaded = 0; /* clobbered */
+
+       if (bc->chip_class == EVERGREEN) {
+               memset(&alu, 0, sizeof(alu));
+               alu.op = id == 0 ? ALU_OP0_SET_CF_IDX0 : ALU_OP0_SET_CF_IDX1;
+               alu.last = 1;
+               r = r600_bytecode_add_alu(bc, &alu);
+               if (r)
+                       return r;
+       }
+
+       /* Must split ALU group as index only applies to following group */
+       if (inside_alu_clause) {
+               type = bc->cf_last->op;
+               if ((r = r600_bytecode_add_cf(bc))) {
+                       return r;
+               }
+               bc->cf_last->op = type;
        }
+
+       bc->index_loaded[id] = 1;
+
+       return 0;
+}
+
+int eg_bytecode_gds_build(struct r600_bytecode *bc, struct r600_bytecode_gds *gds, unsigned id)
+{
+       unsigned gds_op = (r600_isa_fetch_opcode(bc->isa->hw_class, gds->op) >> 8) & 0x3f;
+       unsigned opcode;
+       if (gds->op == FETCH_OP_TF_WRITE)
+               opcode = 5;
+       else
+               opcode = 4;
+       bc->bytecode[id++] = S_SQ_MEM_GDS_WORD0_MEM_INST(2) |
+               S_SQ_MEM_GDS_WORD0_MEM_OP(opcode) |
+               S_SQ_MEM_GDS_WORD0_SRC_GPR(gds->src_gpr) |
+               S_SQ_MEM_GDS_WORD0_SRC_REL(gds->src_rel) |
+               S_SQ_MEM_GDS_WORD0_SRC_SEL_X(gds->src_sel_x) |
+               S_SQ_MEM_GDS_WORD0_SRC_SEL_Y(gds->src_sel_y) |
+               S_SQ_MEM_GDS_WORD0_SRC_SEL_Z(gds->src_sel_z);
+
+       bc->bytecode[id++] = S_SQ_MEM_GDS_WORD1_DST_GPR(gds->dst_gpr) |
+               S_SQ_MEM_GDS_WORD1_DST_REL(gds->dst_rel) |
+               S_SQ_MEM_GDS_WORD1_GDS_OP(gds_op) |
+               S_SQ_MEM_GDS_WORD1_SRC_GPR(gds->src_gpr2) |
+               S_SQ_MEM_GDS_WORD1_UAV_INDEX_MODE(gds->uav_index_mode) |
+               S_SQ_MEM_GDS_WORD1_UAV_ID(gds->uav_id) |
+               S_SQ_MEM_GDS_WORD1_ALLOC_CONSUME(gds->alloc_consume) |
+               S_SQ_MEM_GDS_WORD1_BCAST_FIRST_REQ(gds->bcast_first_req);
+
+       bc->bytecode[id++] = S_SQ_MEM_GDS_WORD2_DST_SEL_X(gds->dst_sel_x) |
+               S_SQ_MEM_GDS_WORD2_DST_SEL_Y(gds->dst_sel_y) |
+               S_SQ_MEM_GDS_WORD2_DST_SEL_Z(gds->dst_sel_z) |
+               S_SQ_MEM_GDS_WORD2_DST_SEL_W(gds->dst_sel_w);
        return 0;
 }
 
-void eg_cf_vtx(struct r600_vertex_element *ve, u32 *bytecode, unsigned count)
+int eg_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id)
 {
-       struct r600_pipe_state *rstate;
-       unsigned i = 0;
-
-       if (count > 8) {
-               bytecode[i++] = S_SQ_CF_WORD0_ADDR(8 >> 1);
-               bytecode[i++] = S_SQ_CF_WORD1_CF_INST(EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX) |
-                               S_SQ_CF_WORD1_BARRIER(1) |
-                               S_SQ_CF_WORD1_COUNT(8 - 1);
-               bytecode[i++] = S_SQ_CF_WORD0_ADDR(40 >> 1);
-               bytecode[i++] = S_SQ_CF_WORD1_CF_INST(EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX) |
-                               S_SQ_CF_WORD1_BARRIER(1) |
-                               S_SQ_CF_WORD1_COUNT(count - 8 - 1);
+       if (alu->is_lds_idx_op) {
+               assert(!alu->src[0].abs && !alu->src[1].abs && !alu->src[2].abs);
+               assert(!alu->src[0].neg && !alu->src[1].neg && !alu->src[2].neg);
+               bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
+                       S_SQ_ALU_WORD0_SRC0_REL(alu->src[0].rel) |
+                       S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) |
+                       S_SQ_ALU_WORD0_LDS_IDX_OP_IDX_OFFSET_4(alu->lds_idx >> 4) |
+                       S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) |
+                       S_SQ_ALU_WORD0_SRC1_REL(alu->src[1].rel) |
+                       S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
+                       S_SQ_ALU_WORD0_LDS_IDX_OP_IDX_OFFSET_5(alu->lds_idx >> 5) |
+                       S_SQ_ALU_WORD0_INDEX_MODE(alu->index_mode) |
+                       S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) |
+                       S_SQ_ALU_WORD0_LAST(alu->last);
+       } else {
+               bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
+                       S_SQ_ALU_WORD0_SRC0_REL(alu->src[0].rel) |
+                       S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) |
+                       S_SQ_ALU_WORD0_SRC0_NEG(alu->src[0].neg) |
+                       S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) |
+                       S_SQ_ALU_WORD0_SRC1_REL(alu->src[1].rel) |
+                       S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
+                       S_SQ_ALU_WORD0_SRC1_NEG(alu->src[1].neg) |
+                       S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) |
+                       S_SQ_ALU_WORD0_LAST(alu->last);
+       }
+
+       /* don't replace gpr by pv or ps for destination register */
+       if (alu->is_lds_idx_op) {
+               unsigned lds_op = r600_isa_alu_opcode(bc->isa->hw_class, alu->op);
+               bc->bytecode[id++] =
+                       S_SQ_ALU_WORD1_OP3_SRC2_SEL(alu->src[2].sel) |
+                       S_SQ_ALU_WORD1_OP3_SRC2_REL(alu->src[2].rel) |
+                       S_SQ_ALU_WORD1_OP3_SRC2_CHAN(alu->src[2].chan) |
+                       S_SQ_ALU_WORD1_LDS_IDX_OP_IDX_OFFSET_1(alu->lds_idx >> 1) |
+
+                       S_SQ_ALU_WORD1_OP3_ALU_INST(lds_op & 0xff) |
+                       S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle) |
+                       S_SQ_ALU_WORD1_LDS_IDX_OP_LDS_OP((lds_op >> 8) & 0xff) |
+                       S_SQ_ALU_WORD1_LDS_IDX_OP_IDX_OFFSET_0(alu->lds_idx) |
+                       S_SQ_ALU_WORD1_LDS_IDX_OP_IDX_OFFSET_2(alu->lds_idx >> 2) |
+                       S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
+                       S_SQ_ALU_WORD1_LDS_IDX_OP_IDX_OFFSET_3(alu->lds_idx >> 3);
+
+       } else if (alu->is_op3) {
+               assert(!alu->src[0].abs && !alu->src[1].abs && !alu->src[2].abs);
+               bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
+                                       S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
+                                       S_SQ_ALU_WORD1_DST_REL(alu->dst.rel) |
+                                       S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) |
+                                       S_SQ_ALU_WORD1_OP3_SRC2_SEL(alu->src[2].sel) |
+                                       S_SQ_ALU_WORD1_OP3_SRC2_REL(alu->src[2].rel) |
+                                       S_SQ_ALU_WORD1_OP3_SRC2_CHAN(alu->src[2].chan) |
+                                       S_SQ_ALU_WORD1_OP3_SRC2_NEG(alu->src[2].neg) |
+                                       S_SQ_ALU_WORD1_OP3_ALU_INST(r600_isa_alu_opcode(bc->isa->hw_class, alu->op)) |
+                                       S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle);
        } else {
-               bytecode[i++] = S_SQ_CF_WORD0_ADDR(8 >> 1);
-               bytecode[i++] = S_SQ_CF_WORD1_CF_INST(EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX) |
-                               S_SQ_CF_WORD1_BARRIER(1) |
-                               S_SQ_CF_WORD1_COUNT(count - 1);
+               bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
+                                       S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
+                                       S_SQ_ALU_WORD1_DST_REL(alu->dst.rel) |
+                                       S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) |
+                                       S_SQ_ALU_WORD1_OP2_SRC0_ABS(alu->src[0].abs) |
+                                       S_SQ_ALU_WORD1_OP2_SRC1_ABS(alu->src[1].abs) |
+                                       S_SQ_ALU_WORD1_OP2_WRITE_MASK(alu->dst.write) |
+                                       S_SQ_ALU_WORD1_OP2_OMOD(alu->omod) |
+                                       S_SQ_ALU_WORD1_OP2_ALU_INST(r600_isa_alu_opcode(bc->isa->hw_class, alu->op)) |
+                                       S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle) |
+                                       S_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(alu->execute_mask) |
+                                       S_SQ_ALU_WORD1_OP2_UPDATE_PRED(alu->update_pred);
        }
-       bytecode[i++] = S_SQ_CF_WORD0_ADDR(0);
-       bytecode[i++] = S_SQ_CF_WORD1_CF_INST(EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN) |
-                       S_SQ_CF_WORD1_BARRIER(1);
-
-       rstate = &ve->rstate;
-       rstate->id = R600_PIPE_STATE_FETCH_SHADER;
-       rstate->nregs = 0;
-       r600_pipe_state_add_reg(rstate, R_0288A8_SQ_PGM_RESOURCES_FS,
-                               0x00000000, 0xFFFFFFFF, NULL);
-       r600_pipe_state_add_reg(rstate, R_0288A4_SQ_PGM_START_FS,
-                               (r600_bo_offset(ve->fetch_shader)) >> 8,
-                               0xFFFFFFFF, ve->fetch_shader);
+       return 0;
 }