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r600g: implement MSAA for r700
[mesa.git] / src / gallium / drivers / r600 / evergreen_hw_context.c
diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c b/src/gallium/drivers/r600/evergreen_hw_context.c
index 901cdbe6bad3f96428349462882fa2440f6f4472..d2f09498566f5bfe028be3751782278853d6913e 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_hw_context.c
+++ b/src/gallium/drivers/r600/evergreen_hw_context.c
@@ -199,8 +199,19 @@ static const struct r600_reg evergreen_context_reg_list[] = {
        {R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET, 0, 0},
        {R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE, 0, 0},
        {R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET, 0, 0},
+       {R_028C00_PA_SC_LINE_CNTL, 0, 0},
+       {R_028C04_PA_SC_AA_CONFIG, 0, 0},
        {R_028C08_PA_SU_VTX_CNTL, 0, 0},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
+       {R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, 0, 0},
+       {R_028C20_PA_SC_AA_SAMPLE_LOCS_1, 0, 0},
+       {R_028C24_PA_SC_AA_SAMPLE_LOCS_2, 0, 0},
+       {R_028C28_PA_SC_AA_SAMPLE_LOCS_3, 0, 0},
+       {R_028C2C_PA_SC_AA_SAMPLE_LOCS_4, 0, 0},
+       {R_028C30_PA_SC_AA_SAMPLE_LOCS_5, 0, 0},
+       {R_028C34_PA_SC_AA_SAMPLE_LOCS_6, 0, 0},
+       {R_028C38_PA_SC_AA_SAMPLE_LOCS_7, 0, 0},
+       {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028C60_CB_COLOR0_BASE, REG_FLAG_NEED_BO, 0},
        {R_028C64_CB_COLOR0_PITCH, 0, 0},
        {R_028C68_CB_COLOR0_SLICE, 0, 0},
@@ -208,6 +219,14 @@ static const struct r600_reg evergreen_context_reg_list[] = {
        {R_028C70_CB_COLOR0_INFO, REG_FLAG_NEED_BO, 0},
        {R_028C74_CB_COLOR0_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028C78_CB_COLOR0_DIM, 0, 0},
+       {R_028C7C_CB_COLOR0_CMASK, REG_FLAG_NEED_BO},
+       {R_028C80_CB_COLOR0_CMASK_SLICE},
+       {R_028C84_CB_COLOR0_FMASK, REG_FLAG_NEED_BO},
+       {R_028C88_CB_COLOR0_FMASK_SLICE},
+       {R_028C8C_CB_COLOR0_CLEAR_WORD0},
+       {R_028C90_CB_COLOR0_CLEAR_WORD1},
+       {R_028C94_CB_COLOR0_CLEAR_WORD2},
+       {R_028C98_CB_COLOR0_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028C9C_CB_COLOR1_BASE, REG_FLAG_NEED_BO, 0},
        {R_028CA0_CB_COLOR1_PITCH, 0, 0},
@@ -216,6 +235,14 @@ static const struct r600_reg evergreen_context_reg_list[] = {
        {R_028CAC_CB_COLOR1_INFO, REG_FLAG_NEED_BO, 0},
        {R_028CB0_CB_COLOR1_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028CB4_CB_COLOR1_DIM, 0, 0},
+       {R_028CB8_CB_COLOR1_CMASK, REG_FLAG_NEED_BO, 0},
+       {R_028CBC_CB_COLOR1_CMASK_SLICE, 0, 0},
+       {R_028CC0_CB_COLOR1_FMASK, REG_FLAG_NEED_BO, 0},
+       {R_028CC4_CB_COLOR1_FMASK_SLICE, 0, 0},
+       {R_028CC8_CB_COLOR1_CLEAR_WORD0},
+       {R_028CCC_CB_COLOR1_CLEAR_WORD1},
+       {R_028CD0_CB_COLOR1_CLEAR_WORD2},
+       {R_028CD4_CB_COLOR1_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028CD8_CB_COLOR2_BASE, REG_FLAG_NEED_BO, 0},
        {R_028CDC_CB_COLOR2_PITCH, 0, 0},
@@ -224,6 +251,14 @@ static const struct r600_reg evergreen_context_reg_list[] = {
        {R_028CE8_CB_COLOR2_INFO, REG_FLAG_NEED_BO, 0},
        {R_028CEC_CB_COLOR2_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028CF0_CB_COLOR2_DIM, 0, 0},
+       {R_028CF4_CB_COLOR2_CMASK, REG_FLAG_NEED_BO, 0},
+       {R_028CF8_CB_COLOR2_CMASK_SLICE, 0, 0},
+       {R_028CFC_CB_COLOR2_FMASK, REG_FLAG_NEED_BO, 0},
+       {R_028D00_CB_COLOR2_FMASK_SLICE, 0, 0},
+       {R_028D04_CB_COLOR2_CLEAR_WORD0},
+       {R_028D08_CB_COLOR2_CLEAR_WORD1},
+       {R_028D0C_CB_COLOR2_CLEAR_WORD2},
+       {R_028D10_CB_COLOR2_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028D14_CB_COLOR3_BASE, REG_FLAG_NEED_BO, 0},
        {R_028D18_CB_COLOR3_PITCH, 0, 0},
@@ -232,6 +267,14 @@ static const struct r600_reg evergreen_context_reg_list[] = {
        {R_028D24_CB_COLOR3_INFO, REG_FLAG_NEED_BO, 0},
        {R_028D28_CB_COLOR3_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028D2C_CB_COLOR3_DIM, 0, 0},
+       {R_028D30_CB_COLOR3_CMASK, REG_FLAG_NEED_BO},
+       {R_028D34_CB_COLOR3_CMASK_SLICE},
+       {R_028D38_CB_COLOR3_FMASK, REG_FLAG_NEED_BO},
+       {R_028D3C_CB_COLOR3_FMASK_SLICE},
+       {R_028D40_CB_COLOR3_CLEAR_WORD0},
+       {R_028D44_CB_COLOR3_CLEAR_WORD1},
+       {R_028D48_CB_COLOR3_CLEAR_WORD2},
+       {R_028D4C_CB_COLOR3_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028D50_CB_COLOR4_BASE, REG_FLAG_NEED_BO, 0},
        {R_028D54_CB_COLOR4_PITCH, 0, 0},
@@ -240,6 +283,14 @@ static const struct r600_reg evergreen_context_reg_list[] = {
        {R_028D60_CB_COLOR4_INFO, REG_FLAG_NEED_BO, 0},
        {R_028D64_CB_COLOR4_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028D68_CB_COLOR4_DIM, 0, 0},
+       {R_028D6C_CB_COLOR4_CMASK, REG_FLAG_NEED_BO},
+       {R_028D70_CB_COLOR4_CMASK_SLICE},
+       {R_028D74_CB_COLOR4_FMASK, REG_FLAG_NEED_BO},
+       {R_028D78_CB_COLOR4_FMASK_SLICE},
+       {R_028D7C_CB_COLOR4_CLEAR_WORD0},
+       {R_028D80_CB_COLOR4_CLEAR_WORD1},
+       {R_028D84_CB_COLOR4_CLEAR_WORD2},
+       {R_028D88_CB_COLOR4_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028D8C_CB_COLOR5_BASE, REG_FLAG_NEED_BO, 0},
        {R_028D90_CB_COLOR5_PITCH, 0, 0},
@@ -248,6 +299,14 @@ static const struct r600_reg evergreen_context_reg_list[] = {
        {R_028D9C_CB_COLOR5_INFO, REG_FLAG_NEED_BO, 0},
        {R_028DA0_CB_COLOR5_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028DA4_CB_COLOR5_DIM, 0, 0},
+       {R_028DA8_CB_COLOR5_CMASK, REG_FLAG_NEED_BO},
+       {R_028DAC_CB_COLOR5_CMASK_SLICE},
+       {R_028DB0_CB_COLOR5_FMASK, REG_FLAG_NEED_BO},
+       {R_028DB4_CB_COLOR5_FMASK_SLICE},
+       {R_028DB8_CB_COLOR5_CLEAR_WORD0},
+       {R_028DBC_CB_COLOR5_CLEAR_WORD1},
+       {R_028DC0_CB_COLOR5_CLEAR_WORD2},
+       {R_028DC4_CB_COLOR5_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028DC8_CB_COLOR6_BASE, REG_FLAG_NEED_BO, 0},
        {R_028DCC_CB_COLOR6_PITCH, 0, 0},
@@ -256,6 +315,14 @@ static const struct r600_reg evergreen_context_reg_list[] = {
        {R_028DD8_CB_COLOR6_INFO, REG_FLAG_NEED_BO, 0},
        {R_028DDC_CB_COLOR6_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028DE0_CB_COLOR6_DIM, 0, 0},
+       {R_028DE4_CB_COLOR6_CMASK, REG_FLAG_NEED_BO},
+       {R_028DE8_CB_COLOR6_CMASK_SLICE},
+       {R_028DEC_CB_COLOR6_FMASK, REG_FLAG_NEED_BO},
+       {R_028DF0_CB_COLOR6_FMASK_SLICE},
+       {R_028DF4_CB_COLOR6_CLEAR_WORD0},
+       {R_028DF8_CB_COLOR6_CLEAR_WORD1},
+       {R_028DFC_CB_COLOR6_CLEAR_WORD2},
+       {R_028E00_CB_COLOR6_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028E04_CB_COLOR7_BASE, REG_FLAG_NEED_BO, 0},
        {R_028E08_CB_COLOR7_PITCH, 0, 0},
@@ -264,6 +331,14 @@ static const struct r600_reg evergreen_context_reg_list[] = {
        {R_028E14_CB_COLOR7_INFO, REG_FLAG_NEED_BO, 0},
        {R_028E18_CB_COLOR7_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028E1C_CB_COLOR7_DIM, 0, 0},
+       {R_028E20_CB_COLOR7_CMASK, REG_FLAG_NEED_BO},
+       {R_028E24_CB_COLOR7_CMASK_SLICE},
+       {R_028E28_CB_COLOR7_FMASK, REG_FLAG_NEED_BO},
+       {R_028E2C_CB_COLOR7_FMASK_SLICE},
+       {R_028E30_CB_COLOR7_CLEAR_WORD0},
+       {R_028E34_CB_COLOR7_CLEAR_WORD1},
+       {R_028E38_CB_COLOR7_CLEAR_WORD2},
+       {R_028E3C_CB_COLOR7_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028E40_CB_COLOR8_BASE, REG_FLAG_NEED_BO, 0},
        {R_028E44_CB_COLOR8_PITCH, 0, 0},
@@ -462,6 +537,8 @@ static const struct r600_reg cayman_context_reg_list[] = {
        {R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET, 0, 0},
        {R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE, 0, 0},
        {R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET, 0, 0},
+       {CM_R_028BDC_PA_SC_LINE_CNTL, 0, 0},
+       {CM_R_028BE0_PA_SC_AA_CONFIG, 0, 0},
        {CM_R_028BE4_PA_SU_VTX_CNTL, 0, 0},
        {CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0, 0},
        {CM_R_028BFC_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1, 0, 0},
@@ -487,6 +564,14 @@ static const struct r600_reg cayman_context_reg_list[] = {
        {R_028C70_CB_COLOR0_INFO, REG_FLAG_NEED_BO, 0},
        {R_028C74_CB_COLOR0_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028C78_CB_COLOR0_DIM, 0, 0},
+       {R_028C7C_CB_COLOR0_CMASK, REG_FLAG_NEED_BO},
+       {R_028C80_CB_COLOR0_CMASK_SLICE},
+       {R_028C84_CB_COLOR0_FMASK, REG_FLAG_NEED_BO},
+       {R_028C88_CB_COLOR0_FMASK_SLICE},
+       {R_028C8C_CB_COLOR0_CLEAR_WORD0},
+       {R_028C90_CB_COLOR0_CLEAR_WORD1},
+       {R_028C94_CB_COLOR0_CLEAR_WORD2},
+       {R_028C98_CB_COLOR0_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028C9C_CB_COLOR1_BASE, REG_FLAG_NEED_BO, 0},
        {R_028CA0_CB_COLOR1_PITCH, 0, 0},
@@ -495,6 +580,14 @@ static const struct r600_reg cayman_context_reg_list[] = {
        {R_028CAC_CB_COLOR1_INFO, REG_FLAG_NEED_BO, 0},
        {R_028CB0_CB_COLOR1_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028CB4_CB_COLOR1_DIM, 0, 0},
+       {R_028CB8_CB_COLOR1_CMASK, REG_FLAG_NEED_BO, 0},
+       {R_028CBC_CB_COLOR1_CMASK_SLICE, 0, 0},
+       {R_028CC0_CB_COLOR1_FMASK, REG_FLAG_NEED_BO, 0},
+       {R_028CC4_CB_COLOR1_FMASK_SLICE, 0, 0},
+       {R_028CC8_CB_COLOR1_CLEAR_WORD0},
+       {R_028CCC_CB_COLOR1_CLEAR_WORD1},
+       {R_028CD0_CB_COLOR1_CLEAR_WORD2},
+       {R_028CD4_CB_COLOR1_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028CD8_CB_COLOR2_BASE, REG_FLAG_NEED_BO, 0},
        {R_028CDC_CB_COLOR2_PITCH, 0, 0},
@@ -503,6 +596,14 @@ static const struct r600_reg cayman_context_reg_list[] = {
        {R_028CE8_CB_COLOR2_INFO, REG_FLAG_NEED_BO, 0},
        {R_028CEC_CB_COLOR2_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028CF0_CB_COLOR2_DIM, 0, 0},
+       {R_028CF4_CB_COLOR2_CMASK, REG_FLAG_NEED_BO, 0},
+       {R_028CF8_CB_COLOR2_CMASK_SLICE, 0, 0},
+       {R_028CFC_CB_COLOR2_FMASK, REG_FLAG_NEED_BO, 0},
+       {R_028D00_CB_COLOR2_FMASK_SLICE, 0, 0},
+       {R_028D04_CB_COLOR2_CLEAR_WORD0},
+       {R_028D08_CB_COLOR2_CLEAR_WORD1},
+       {R_028D0C_CB_COLOR2_CLEAR_WORD2},
+       {R_028D10_CB_COLOR2_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028D14_CB_COLOR3_BASE, REG_FLAG_NEED_BO, 0},
        {R_028D18_CB_COLOR3_PITCH, 0, 0},
@@ -511,6 +612,14 @@ static const struct r600_reg cayman_context_reg_list[] = {
        {R_028D24_CB_COLOR3_INFO, REG_FLAG_NEED_BO, 0},
        {R_028D28_CB_COLOR3_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028D2C_CB_COLOR3_DIM, 0, 0},
+       {R_028D30_CB_COLOR3_CMASK, REG_FLAG_NEED_BO},
+       {R_028D34_CB_COLOR3_CMASK_SLICE},
+       {R_028D38_CB_COLOR3_FMASK, REG_FLAG_NEED_BO},
+       {R_028D3C_CB_COLOR3_FMASK_SLICE},
+       {R_028D40_CB_COLOR3_CLEAR_WORD0},
+       {R_028D44_CB_COLOR3_CLEAR_WORD1},
+       {R_028D48_CB_COLOR3_CLEAR_WORD2},
+       {R_028D4C_CB_COLOR3_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028D50_CB_COLOR4_BASE, REG_FLAG_NEED_BO, 0},
        {R_028D54_CB_COLOR4_PITCH, 0, 0},
@@ -519,6 +628,14 @@ static const struct r600_reg cayman_context_reg_list[] = {
        {R_028D60_CB_COLOR4_INFO, REG_FLAG_NEED_BO, 0},
        {R_028D64_CB_COLOR4_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028D68_CB_COLOR4_DIM, 0, 0},
+       {R_028D6C_CB_COLOR4_CMASK, REG_FLAG_NEED_BO},
+       {R_028D70_CB_COLOR4_CMASK_SLICE},
+       {R_028D74_CB_COLOR4_FMASK, REG_FLAG_NEED_BO},
+       {R_028D78_CB_COLOR4_FMASK_SLICE},
+       {R_028D7C_CB_COLOR4_CLEAR_WORD0},
+       {R_028D80_CB_COLOR4_CLEAR_WORD1},
+       {R_028D84_CB_COLOR4_CLEAR_WORD2},
+       {R_028D88_CB_COLOR4_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028D8C_CB_COLOR5_BASE, REG_FLAG_NEED_BO, 0},
        {R_028D90_CB_COLOR5_PITCH, 0, 0},
@@ -527,6 +644,14 @@ static const struct r600_reg cayman_context_reg_list[] = {
        {R_028D9C_CB_COLOR5_INFO, REG_FLAG_NEED_BO, 0},
        {R_028DA0_CB_COLOR5_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028DA4_CB_COLOR5_DIM, 0, 0},
+       {R_028DA8_CB_COLOR5_CMASK, REG_FLAG_NEED_BO},
+       {R_028DAC_CB_COLOR5_CMASK_SLICE},
+       {R_028DB0_CB_COLOR5_FMASK, REG_FLAG_NEED_BO},
+       {R_028DB4_CB_COLOR5_FMASK_SLICE},
+       {R_028DB8_CB_COLOR5_CLEAR_WORD0},
+       {R_028DBC_CB_COLOR5_CLEAR_WORD1},
+       {R_028DC0_CB_COLOR5_CLEAR_WORD2},
+       {R_028DC4_CB_COLOR5_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028DC8_CB_COLOR6_BASE, REG_FLAG_NEED_BO, 0},
        {R_028DCC_CB_COLOR6_PITCH, 0, 0},
@@ -535,6 +660,14 @@ static const struct r600_reg cayman_context_reg_list[] = {
        {R_028DD8_CB_COLOR6_INFO, REG_FLAG_NEED_BO, 0},
        {R_028DDC_CB_COLOR6_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028DE0_CB_COLOR6_DIM, 0, 0},
+       {R_028DE4_CB_COLOR6_CMASK, REG_FLAG_NEED_BO},
+       {R_028DE8_CB_COLOR6_CMASK_SLICE},
+       {R_028DEC_CB_COLOR6_FMASK, REG_FLAG_NEED_BO},
+       {R_028DF0_CB_COLOR6_FMASK_SLICE},
+       {R_028DF4_CB_COLOR6_CLEAR_WORD0},
+       {R_028DF8_CB_COLOR6_CLEAR_WORD1},
+       {R_028DFC_CB_COLOR6_CLEAR_WORD2},
+       {R_028E00_CB_COLOR6_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028E04_CB_COLOR7_BASE, REG_FLAG_NEED_BO, 0},
        {R_028E08_CB_COLOR7_PITCH, 0, 0},
@@ -543,6 +676,14 @@ static const struct r600_reg cayman_context_reg_list[] = {
        {R_028E14_CB_COLOR7_INFO, REG_FLAG_NEED_BO, 0},
        {R_028E18_CB_COLOR7_ATTRIB, REG_FLAG_NEED_BO, 0},
        {R_028E1C_CB_COLOR7_DIM, 0, 0},
+       {R_028E20_CB_COLOR7_CMASK, REG_FLAG_NEED_BO},
+       {R_028E24_CB_COLOR7_CMASK_SLICE},
+       {R_028E28_CB_COLOR7_FMASK, REG_FLAG_NEED_BO},
+       {R_028E2C_CB_COLOR7_FMASK_SLICE},
+       {R_028E30_CB_COLOR7_CLEAR_WORD0},
+       {R_028E34_CB_COLOR7_CLEAR_WORD1},
+       {R_028E38_CB_COLOR7_CLEAR_WORD2},
+       {R_028E3C_CB_COLOR7_CLEAR_WORD3},
        {GROUP_FORCE_NEW_BLOCK, 0, 0},
        {R_028E40_CB_COLOR8_BASE, REG_FLAG_NEED_BO, 0},
        {R_028E44_CB_COLOR8_PITCH, 0, 0},