r600g: revert unintentional commit
[mesa.git] / src / gallium / drivers / r600 / evergreen_state.c
index 7fb64d2b6583587df1fc18fbc506c2cf1f8d8b87..4206b4a201d8ba890dd64d9b78fa0ec4666b92e4 100644 (file)
@@ -103,7 +103,7 @@ static void *evergreen_create_blend_state(struct pipe_context *ctx,
        }
        blend->cb_target_mask = target_mask;
        r600_pipe_state_add_reg(rstate, R_028808_CB_COLOR_CONTROL,
-                               color_control, 0xFFFFFFFF, NULL);
+                               color_control, 0xFFFFFFFD, NULL);
        r600_pipe_state_add_reg(rstate, R_028C3C_PA_SC_AA_MASK, 0xFFFFFFFF, 0xFFFFFFFF, NULL);
 
        for (int i = 0; i < 8; i++) {
@@ -305,11 +305,16 @@ static void *evergreen_create_sampler_state(struct pipe_context *ctx,
 {
        struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
        union util_color uc;
+       uint32_t coord_trunc = 0;
 
        if (rstate == NULL) {
                return NULL;
        }
 
+       if ((state->mag_img_filter == PIPE_TEX_FILTER_NEAREST) ||
+           (state->min_img_filter == PIPE_TEX_FILTER_NEAREST))
+               coord_trunc = 1;
+
        rstate->id = R600_PIPE_STATE_SAMPLER;
        util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
        r600_pipe_state_add_reg(rstate, R_03C000_SQ_TEX_SAMPLER_WORD0_0,
@@ -328,6 +333,7 @@ static void *evergreen_create_sampler_state(struct pipe_context *ctx,
                        0xFFFFFFFF, NULL);
        r600_pipe_state_add_reg(rstate, R_03C008_SQ_TEX_SAMPLER_WORD2_0,
                                S_03C008_LOD_BIAS(S_FIXED(CLAMP(state->lod_bias, -16, 16), 8)) |
+                               S_03C008_MC_COORD_TRUNCATE(coord_trunc) |
                                S_03C008_TYPE(1),
                                0xFFFFFFFF, NULL);
 
@@ -351,7 +357,7 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
        struct r600_resource *rbuffer;
        unsigned format;
        uint32_t word4 = 0, yuv_format = 0, pitch = 0;
-       unsigned char swizzle[4];
+       unsigned char swizzle[4], array_mode = 0, tile_type = 0;
        struct r600_bo *bo[2];
 
        if (resource == NULL)
@@ -370,7 +376,7 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
        swizzle[1] = state->swizzle_g;
        swizzle[2] = state->swizzle_b;
        swizzle[3] = state->swizzle_a;
-       format = r600_translate_texformat(state->format,
+       format = r600_translate_texformat(ctx->screen, state->format,
                                          swizzle,
                                          &word4, &yuv_format);
        if (format == ~0) {
@@ -380,35 +386,42 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
        if (desc == NULL) {
                R600_ERR("unknow format %d\n", state->format);
        }
-       tmp = (struct r600_resource_texture*)texture;
+       tmp = (struct r600_resource_texture *)texture;
+       if (tmp->depth && !tmp->is_flushing_texture) {
+               r600_texture_depth_flush(ctx, texture, TRUE);
+               tmp = tmp->flushed_depth_texture;
+       }
+
+       if (tmp->force_int_type) {
+               word4 &= C_030010_NUM_FORMAT_ALL;
+               word4 |= S_030010_NUM_FORMAT_ALL(V_030010_SQ_NUM_FORMAT_INT);
+       }
+
        rbuffer = &tmp->resource;
        bo[0] = rbuffer->bo;
        bo[1] = rbuffer->bo;
-       /* FIXME depth texture decompression */
-       if (tmp->depth) {
-               r600_texture_depth_flush(ctx, texture);
-               tmp = (struct r600_resource_texture*)texture;
-               rbuffer = &tmp->flushed_depth_texture->resource;
-               bo[0] = rbuffer->bo;
-               bo[1] = rbuffer->bo;
-       }
-       pitch = align(tmp->pitch_in_pixels[0], 8);
+
+       pitch = align(tmp->pitch_in_blocks[0] * util_format_get_blockwidth(state->format), 8);
+       array_mode = tmp->array_mode[0];
+       tile_type = tmp->tile_type;
 
        /* FIXME properly handle first level != 0 */
        r600_pipe_state_add_reg(rstate, R_030000_RESOURCE0_WORD0,
                                S_030000_DIM(r600_tex_dim(texture->target)) |
                                S_030000_PITCH((pitch / 8) - 1) |
+                               S_030000_NON_DISP_TILING_ORDER(tile_type) |
                                S_030000_TEX_WIDTH(texture->width0 - 1), 0xFFFFFFFF, NULL);
        r600_pipe_state_add_reg(rstate, R_030004_RESOURCE0_WORD1,
                                S_030004_TEX_HEIGHT(texture->height0 - 1) |
-                               S_030004_TEX_DEPTH(texture->depth0 - 1),
+                               S_030004_TEX_DEPTH(texture->depth0 - 1) |
+                               S_030004_ARRAY_MODE(array_mode),
                                0xFFFFFFFF, NULL);
        r600_pipe_state_add_reg(rstate, R_030008_RESOURCE0_WORD2,
                                (tmp->offset[0] + r600_bo_offset(bo[0])) >> 8, 0xFFFFFFFF, bo[0]);
        r600_pipe_state_add_reg(rstate, R_03000C_RESOURCE0_WORD3,
                                (tmp->offset[1] + r600_bo_offset(bo[1])) >> 8, 0xFFFFFFFF, bo[1]);
        r600_pipe_state_add_reg(rstate, R_030010_RESOURCE0_WORD4,
-                               word4 | S_030010_NUM_FORMAT_ALL(V_030010_SQ_NUM_FORMAT_NORM) |
+                               word4 |
                                S_030010_SRF_MODE_ALL(V_030010_SRF_MODE_NO_ZERO) |
                                S_030010_BASE_LEVEL(state->u.tex.first_level), 0xFFFFFFFF, NULL);
        r600_pipe_state_add_reg(rstate, R_030014_RESOURCE0_WORD5,
@@ -431,7 +444,8 @@ static void evergreen_set_vs_sampler_view(struct pipe_context *ctx, unsigned cou
 
        for (int i = 0; i < count; i++) {
                if (resource[i]) {
-                       evergreen_context_pipe_state_set_vs_resource(&rctx->ctx, &resource[i]->state, i);
+                       evergreen_context_pipe_state_set_vs_resource(&rctx->ctx, &resource[i]->state,
+                                                                    i + R600_MAX_CONST_BUFFERS);
                }
        }
 }
@@ -446,9 +460,11 @@ static void evergreen_set_ps_sampler_view(struct pipe_context *ctx, unsigned cou
        for (i = 0; i < count; i++) {
                if (&rctx->ps_samplers.views[i]->base != views[i]) {
                        if (resource[i])
-                               evergreen_context_pipe_state_set_ps_resource(&rctx->ctx, &resource[i]->state, i);
+                               evergreen_context_pipe_state_set_ps_resource(&rctx->ctx, &resource[i]->state,
+                                                                            i + R600_MAX_CONST_BUFFERS);
                        else
-                               evergreen_context_pipe_state_set_ps_resource(&rctx->ctx, NULL, i);
+                               evergreen_context_pipe_state_set_ps_resource(&rctx->ctx, NULL,
+                                                                            i + R600_MAX_CONST_BUFFERS);
 
                        pipe_sampler_view_reference(
                                (struct pipe_sampler_view **)&rctx->ps_samplers.views[i],
@@ -457,7 +473,8 @@ static void evergreen_set_ps_sampler_view(struct pipe_context *ctx, unsigned cou
        }
        for (i = count; i < NUM_TEX_UNITS; i++) {
                if (rctx->ps_samplers.views[i]) {
-                       evergreen_context_pipe_state_set_ps_resource(&rctx->ctx, NULL, i);
+                       evergreen_context_pipe_state_set_ps_resource(&rctx->ctx, NULL,
+                                                                    i + R600_MAX_CONST_BUFFERS);
                        pipe_sampler_view_reference((struct pipe_sampler_view **)&rctx->ps_samplers.views[i], NULL);
                }
        }
@@ -638,11 +655,19 @@ static void evergreen_cb(struct r600_pipe_context *rctx, struct r600_pipe_state
        unsigned color_info;
        unsigned format, swap, ntype;
        unsigned offset;
+       unsigned tile_type;
        const struct util_format_description *desc;
        struct r600_bo *bo[3];
+       int i;
 
        surf = (struct r600_surface *)state->cbufs[cb];
        rtex = (struct r600_resource_texture*)state->cbufs[cb]->texture;
+
+       if (rtex->depth && !rtex->is_flushing_texture) {
+               r600_texture_depth_flush(&rctx->context, state->cbufs[cb]->texture, TRUE);
+               rtex = rtex->flushed_depth_texture;
+       }
+
        rbuffer = &rtex->resource;
        bo[0] = rbuffer->bo;
        bo[1] = rbuffer->bo;
@@ -651,21 +676,43 @@ static void evergreen_cb(struct r600_pipe_context *rctx, struct r600_pipe_state
        /* XXX quite sure for dx10+ hw don't need any offset hacks */
        offset = r600_texture_get_offset((struct r600_resource_texture *)state->cbufs[cb]->texture,
                                         level, state->cbufs[cb]->u.tex.first_layer);
-       pitch = rtex->pitch_in_pixels[level] / 8 - 1;
-       slice = rtex->pitch_in_pixels[level] * surf->aligned_height / 64 - 1;
+       pitch = rtex->pitch_in_blocks[level] / 8 - 1;
+       slice = rtex->pitch_in_blocks[level] * surf->aligned_height / 64 - 1;
        ntype = 0;
-       desc = util_format_description(rtex->resource.base.b.format);
+       desc = util_format_description(surf->base.format);
        if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB)
                ntype = V_028C70_NUMBER_SRGB;
 
-       format = r600_translate_colorformat(rtex->resource.base.b.format);
-       swap = r600_translate_colorswap(rtex->resource.base.b.format);
+       format = r600_translate_colorformat(surf->base.format);
+       swap = r600_translate_colorswap(surf->base.format);
+
+       /* disable when gallium grows int textures */
+       if ((format == FMT_32_32_32_32 || format == FMT_16_16_16_16) && rtex->force_int_type)
+               ntype = 4;
+
        color_info = S_028C70_FORMAT(format) |
                S_028C70_COMP_SWAP(swap) |
+               S_028C70_ARRAY_MODE(rtex->array_mode[level]) |
                S_028C70_BLEND_CLAMP(1) |
                S_028C70_NUMBER_TYPE(ntype);
-       if (desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
-               color_info |= S_028C70_SOURCE_FORMAT(1);
+
+       for (i = 0; i < 4; i++) {
+               if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
+                       break;
+               }
+       }
+
+       /* we can only set the export size if any thing is snorm/unorm component is > 11 bits,
+          if we aren't a float, sint or uint */
+       if (desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS &&
+           desc->channel[i].size < 12 && desc->channel[i].type != UTIL_FORMAT_TYPE_FLOAT &&
+           ntype != 4 && ntype != 5)
+               color_info |= S_028C70_SOURCE_FORMAT(V_028C70_EXPORT_4C_16BPC);
+
+       if (rtex->array_mode[level] > V_028C70_ARRAY_LINEAR_ALIGNED) {
+               tile_type = rtex->tile_type;
+       } else /* workaround for linear buffers */
+               tile_type = 1;
 
        /* FIXME handle enabling of CB beyond BASE8 which has different offset */
        r600_pipe_state_add_reg(rstate,
@@ -690,7 +737,7 @@ static void evergreen_cb(struct r600_pipe_context *rctx, struct r600_pipe_state
                                0x00000000, 0xFFFFFFFF, NULL);
        r600_pipe_state_add_reg(rstate,
                                R_028C74_CB_COLOR0_ATTRIB + cb * 0x3C,
-                               S_028C74_NON_DISP_TILING_ORDER(1),
+                               S_028C74_NON_DISP_TILING_ORDER(tile_type),
                                0xFFFFFFFF, bo[0]);
 }
 
@@ -711,17 +758,14 @@ static void evergreen_db(struct r600_pipe_context *rctx, struct r600_pipe_state
 
        surf = (struct r600_surface *)state->zsbuf;
        rtex = (struct r600_resource_texture*)state->zsbuf->texture;
-       rtex->tiled = 1;
-       rtex->array_mode[level] = 2;
-       rtex->tile_type = 1;
-       rtex->depth = 1;
+
        rbuffer = &rtex->resource;
 
        /* XXX quite sure for dx10+ hw don't need any offset hacks */
        offset = r600_texture_get_offset((struct r600_resource_texture *)state->zsbuf->texture,
                                         level, state->zsbuf->u.tex.first_layer);
-       pitch = rtex->pitch_in_pixels[level] / 8 - 1;
-       slice = rtex->pitch_in_pixels[level] * surf->aligned_height / 64 - 1;
+       pitch = rtex->pitch_in_blocks[level] / 8 - 1;
+       slice = rtex->pitch_in_blocks[level] * surf->aligned_height / 64 - 1;
        format = r600_translate_dbformat(state->zsbuf->texture->format);
        stencil_format = r600_translate_stencilformat(state->zsbuf->texture->format);
 
@@ -837,54 +881,6 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
        }
 }
 
-static void evergreen_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
-                                       struct pipe_resource *buffer)
-{
-       struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
-       struct r600_resource_buffer *rbuffer = r600_buffer(buffer);
-       uint32_t offset;
-
-       /* Note that the state tracker can unbind constant buffers by
-        * passing NULL here.
-        */
-       if (buffer == NULL) {
-               return;
-       }
-
-       r600_upload_const_buffer(rctx, &rbuffer, &offset);
-
-       switch (shader) {
-       case PIPE_SHADER_VERTEX:
-               rctx->vs_const_buffer.nregs = 0;
-               r600_pipe_state_add_reg(&rctx->vs_const_buffer,
-                                       R_028180_ALU_CONST_BUFFER_SIZE_VS_0,
-                                       ALIGN_DIVUP(buffer->width0 >> 4, 16),
-                                       0xFFFFFFFF, NULL);
-               r600_pipe_state_add_reg(&rctx->vs_const_buffer,
-                                       R_028980_ALU_CONST_CACHE_VS_0,
-                                       (r600_bo_offset(rbuffer->r.bo) + offset) >> 8, 0xFFFFFFFF, rbuffer->r.bo);
-               r600_context_pipe_state_set(&rctx->ctx, &rctx->vs_const_buffer);
-               break;
-       case PIPE_SHADER_FRAGMENT:
-               rctx->ps_const_buffer.nregs = 0;
-               r600_pipe_state_add_reg(&rctx->ps_const_buffer,
-                                       R_028140_ALU_CONST_BUFFER_SIZE_PS_0,
-                                       ALIGN_DIVUP(buffer->width0 >> 4, 16),
-                                       0xFFFFFFFF, NULL);
-               r600_pipe_state_add_reg(&rctx->ps_const_buffer,
-                                       R_028940_ALU_CONST_CACHE_PS_0,
-                                       (r600_bo_offset(rbuffer->r.bo) + offset) >> 8, 0xFFFFFFFF, rbuffer->r.bo);
-               r600_context_pipe_state_set(&rctx->ctx, &rctx->ps_const_buffer);
-               break;
-       default:
-               R600_ERR("unsupported %d\n", shader);
-               return;
-       }
-
-       if (!rbuffer->user_buffer)
-               pipe_resource_reference((struct pipe_resource**)&rbuffer, NULL);
-}
-
 void evergreen_init_state_functions(struct r600_pipe_context *rctx)
 {
        rctx->context.create_blend_state = evergreen_create_blend_state;
@@ -912,7 +908,7 @@ void evergreen_init_state_functions(struct r600_pipe_context *rctx)
        rctx->context.delete_vs_state = r600_delete_vs_shader;
        rctx->context.set_blend_color = evergreen_set_blend_color;
        rctx->context.set_clip_state = evergreen_set_clip_state;
-       rctx->context.set_constant_buffer = evergreen_set_constant_buffer;
+       rctx->context.set_constant_buffer = r600_set_constant_buffer;
        rctx->context.set_fragment_sampler_views = evergreen_set_ps_sampler_view;
        rctx->context.set_framebuffer_state = evergreen_set_framebuffer_state;
        rctx->context.set_polygon_stipple = evergreen_set_polygon_stipple;
@@ -924,6 +920,7 @@ void evergreen_init_state_functions(struct r600_pipe_context *rctx)
        rctx->context.set_vertex_sampler_views = evergreen_set_vs_sampler_view;
        rctx->context.set_viewport_state = evergreen_set_viewport_state;
        rctx->context.sampler_view_destroy = r600_sampler_view_destroy;
+       rctx->context.redefine_user_buffer = u_default_redefine_user_buffer;
 }
 
 void evergreen_init_config(struct r600_pipe_context *rctx)
@@ -1328,207 +1325,6 @@ void evergreen_polygon_offset_update(struct r600_pipe_context *rctx)
        }
 }
 
-static void evergreen_spi_update(struct r600_pipe_context *rctx)
-{
-       struct r600_pipe_shader *shader = rctx->ps_shader;
-       struct r600_pipe_state rstate;
-       struct r600_shader *rshader = &shader->shader;
-       unsigned i, tmp;
-
-       rstate.nregs = 0;
-       for (i = 0; i < rshader->ninput; i++) {
-               tmp = S_028644_SEMANTIC(r600_find_vs_semantic_index(&rctx->vs_shader->shader, rshader, i));
-               if (rshader->input[i].name == TGSI_SEMANTIC_COLOR ||
-                               rshader->input[i].name == TGSI_SEMANTIC_BCOLOR ||
-                               rshader->input[i].name == TGSI_SEMANTIC_POSITION) {
-                       tmp |= S_028644_FLAT_SHADE(rctx->flatshade);
-               }
-               if (rshader->input[i].name == TGSI_SEMANTIC_GENERIC &&
-                       rctx->sprite_coord_enable & (1 << rshader->input[i].sid)) {
-                       tmp |= S_028644_PT_SPRITE_TEX(1);
-               }
-               r600_pipe_state_add_reg(&rstate, R_028644_SPI_PS_INPUT_CNTL_0 + i * 4, tmp, 0xFFFFFFFF, NULL);
-       }
-       r600_context_pipe_state_set(&rctx->ctx, &rstate);
-}
-
-void evergreen_vertex_buffer_update(struct r600_pipe_context *rctx)
-{
-       struct r600_pipe_state *rstate;
-       struct r600_resource *rbuffer;
-       struct pipe_vertex_buffer *vertex_buffer;
-       unsigned i, offset;
-
-       /* we don't update until we know vertex elements */
-       if (rctx->vertex_elements == NULL || !rctx->nvertex_buffer)
-               return;
-
-       if (rctx->vertex_elements->incompatible_layout) {
-               /* translate rebind new vertex elements so
-                * return once translated
-                */
-               r600_begin_vertex_translate(rctx);
-               return;
-       }
-
-       if (rctx->any_user_vbs) {
-               r600_upload_user_buffers(rctx);
-               rctx->any_user_vbs = FALSE;
-       }
-
-       if (rctx->vertex_elements->vbuffer_need_offset) {
-               /* one resource per vertex elements */
-               rctx->nvs_resource = rctx->vertex_elements->count;
-       } else {
-               /* bind vertex buffer once */
-               rctx->nvs_resource = rctx->nvertex_buffer;
-       }
-
-       for (i = 0 ; i < rctx->nvs_resource; i++) {
-               rstate = &rctx->vs_resource[i];
-               rstate->id = R600_PIPE_STATE_RESOURCE;
-               rstate->nregs = 0;
-
-               if (rctx->vertex_elements->vbuffer_need_offset) {
-                       /* one resource per vertex elements */
-                       unsigned vbuffer_index;
-                       vbuffer_index = rctx->vertex_elements->elements[i].vertex_buffer_index;
-                       vertex_buffer = &rctx->vertex_buffer[vbuffer_index];
-                       rbuffer = (struct r600_resource*)vertex_buffer->buffer;
-                       offset = rctx->vertex_elements->vbuffer_offset[i];
-               } else {
-                       /* bind vertex buffer once */
-                       vertex_buffer = &rctx->vertex_buffer[i];
-                       rbuffer = (struct r600_resource*)vertex_buffer->buffer;
-                       offset = 0;
-               }
-               if (vertex_buffer == NULL || rbuffer == NULL)
-                       continue;
-               offset += vertex_buffer->buffer_offset + r600_bo_offset(rbuffer->bo);
-
-               r600_pipe_state_add_reg(rstate, R_030000_RESOURCE0_WORD0,
-                                       offset, 0xFFFFFFFF, rbuffer->bo);
-               r600_pipe_state_add_reg(rstate, R_030004_RESOURCE0_WORD1,
-                                       rbuffer->bo_size - offset - 1, 0xFFFFFFFF, NULL);
-               r600_pipe_state_add_reg(rstate, R_030008_RESOURCE0_WORD2,
-                                       S_030008_STRIDE(vertex_buffer->stride),
-                                       0xFFFFFFFF, NULL);
-               r600_pipe_state_add_reg(rstate, R_03000C_RESOURCE0_WORD3,
-                                       S_03000C_DST_SEL_X(V_03000C_SQ_SEL_X) |
-                                       S_03000C_DST_SEL_Y(V_03000C_SQ_SEL_Y) |
-                                       S_03000C_DST_SEL_Z(V_03000C_SQ_SEL_Z) |
-                                       S_03000C_DST_SEL_W(V_03000C_SQ_SEL_W),
-                                       0xFFFFFFFF, NULL);
-               r600_pipe_state_add_reg(rstate, R_030010_RESOURCE0_WORD4,
-                                       0x00000000, 0xFFFFFFFF, NULL);
-               r600_pipe_state_add_reg(rstate, R_030014_RESOURCE0_WORD5,
-                                       0x00000000, 0xFFFFFFFF, NULL);
-               r600_pipe_state_add_reg(rstate, R_030018_RESOURCE0_WORD6,
-                                       0x00000000, 0xFFFFFFFF, NULL);
-               r600_pipe_state_add_reg(rstate, R_03001C_RESOURCE0_WORD7,
-                                       0xC0000000, 0xFFFFFFFF, NULL);
-               evergreen_context_pipe_state_set_fs_resource(&rctx->ctx, rstate, i);
-       }
-}
-
-int r600_conv_pipe_prim(unsigned pprim, unsigned *prim);
-
-void evergreen_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
-{
-       struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
-       struct r600_resource *rbuffer;
-       u32 vgt_dma_index_type, vgt_draw_initiator, mask;
-       struct r600_draw rdraw;
-       struct r600_pipe_state vgt;
-       struct r600_drawl draw = {};
-       unsigned prim;
-
-       draw.info = *info;
-       draw.ctx = ctx;
-       if (info->indexed && rctx->index_buffer.buffer) {
-               draw.info.start += rctx->index_buffer.offset / rctx->index_buffer.index_size;
-
-               r600_translate_index_buffer(rctx, &rctx->index_buffer.buffer,
-                                           &rctx->index_buffer.index_size,
-                                           &draw.info.start,
-                                           info->count);
-
-               draw.index_size = rctx->index_buffer.index_size;
-               pipe_resource_reference(&draw.index_buffer, rctx->index_buffer.buffer);
-               draw.index_buffer_offset = draw.info.start * draw.index_size;
-               draw.info.start = 0;
-               r600_upload_index_buffer(rctx, &draw);
-       } else {
-               draw.info.index_bias = info->start;
-       }
-
-       switch (draw.index_size) {
-       case 2:
-               vgt_draw_initiator = 0;
-               vgt_dma_index_type = 0;
-               break;
-       case 4:
-               vgt_draw_initiator = 0;
-               vgt_dma_index_type = 1;
-               break;
-       case 0:
-               vgt_draw_initiator = 2;
-               vgt_dma_index_type = 0;
-               break;
-       default:
-               R600_ERR("unsupported index size %d\n", draw.index_size);
-               return;
-       }
-       if (r600_conv_pipe_prim(draw.info.mode, &prim))
-               return;
-       if (unlikely(rctx->ps_shader == NULL)) {
-               R600_ERR("missing vertex shader\n");
-               return;
-       }
-       if (unlikely(rctx->vs_shader == NULL)) {
-               R600_ERR("missing vertex shader\n");
-               return;
-       }
-       /* there should be enough input */
-       if (rctx->vertex_elements->count < rctx->vs_shader->shader.bc.nresource) {
-               R600_ERR("%d resources provided, expecting %d\n",
-                       rctx->vertex_elements->count, rctx->vs_shader->shader.bc.nresource);
-               return;
-       }
-
-       evergreen_spi_update(rctx);
-
-       mask = 0;
-       for (int i = 0; i < rctx->framebuffer.nr_cbufs; i++) {
-               mask |= (0xF << (i * 4));
-       }
-
-       vgt.id = R600_PIPE_STATE_VGT;
-       vgt.nregs = 0;
-       r600_pipe_state_add_reg(&vgt, R_008958_VGT_PRIMITIVE_TYPE, prim, 0xFFFFFFFF, NULL);
-       r600_pipe_state_add_reg(&vgt, R_028408_VGT_INDX_OFFSET, draw.info.index_bias, 0xFFFFFFFF, NULL);
-       r600_pipe_state_add_reg(&vgt, R_028238_CB_TARGET_MASK, rctx->cb_target_mask & mask, 0xFFFFFFFF, NULL);
-       r600_pipe_state_add_reg(&vgt, R_028400_VGT_MAX_VTX_INDX, draw.info.max_index, 0xFFFFFFFF, NULL);
-       r600_pipe_state_add_reg(&vgt, R_028404_VGT_MIN_VTX_INDX, draw.info.min_index, 0xFFFFFFFF, NULL);
-       r600_pipe_state_add_reg(&vgt, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0xFFFFFFFF, NULL);
-       r600_pipe_state_add_reg(&vgt, R_03CFF4_SQ_VTX_START_INST_LOC, 0, 0xFFFFFFFF, NULL);
-       r600_context_pipe_state_set(&rctx->ctx, &vgt);
-
-       rdraw.vgt_num_indices = draw.info.count;
-       rdraw.vgt_num_instances = 1;
-       rdraw.vgt_index_type = vgt_dma_index_type;
-       rdraw.vgt_draw_initiator = vgt_draw_initiator;
-       rdraw.indices = NULL;
-       if (draw.index_buffer) {
-               rbuffer = (struct r600_resource*)draw.index_buffer;
-               rdraw.indices = rbuffer->bo;
-               rdraw.indices_bo_offset = draw.index_buffer_offset;
-       }
-       evergreen_context_draw(&rctx->ctx, &rdraw);
-
-       pipe_resource_reference(&draw.index_buffer, NULL);
-}
-
 void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader)
 {
        struct r600_pipe_state *rstate = &shader->rstate;
@@ -1727,3 +1523,31 @@ void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx)
                                S_028000_COPY_CENTROID(1), NULL);
        return rstate;
 }
+
+void evergreen_pipe_set_buffer_resource(struct r600_pipe_context *rctx,
+                                       struct r600_pipe_state *rstate,
+                                       struct r600_resource *rbuffer,
+                                       unsigned offset, unsigned stride)
+{
+       r600_pipe_state_add_reg(rstate, R_030000_RESOURCE0_WORD0,
+                               offset, 0xFFFFFFFF, rbuffer->bo);
+       r600_pipe_state_add_reg(rstate, R_030004_RESOURCE0_WORD1,
+                               rbuffer->bo_size - offset - 1, 0xFFFFFFFF, NULL);
+       r600_pipe_state_add_reg(rstate, R_030008_RESOURCE0_WORD2,
+                               S_030008_STRIDE(stride),
+                               0xFFFFFFFF, NULL);
+       r600_pipe_state_add_reg(rstate, R_03000C_RESOURCE0_WORD3,
+                               S_03000C_DST_SEL_X(V_03000C_SQ_SEL_X) |
+                               S_03000C_DST_SEL_Y(V_03000C_SQ_SEL_Y) |
+                               S_03000C_DST_SEL_Z(V_03000C_SQ_SEL_Z) |
+                               S_03000C_DST_SEL_W(V_03000C_SQ_SEL_W),
+                               0xFFFFFFFF, NULL);
+       r600_pipe_state_add_reg(rstate, R_030010_RESOURCE0_WORD4,
+                               0x00000000, 0xFFFFFFFF, NULL);
+       r600_pipe_state_add_reg(rstate, R_030014_RESOURCE0_WORD5,
+                               0x00000000, 0xFFFFFFFF, NULL);
+       r600_pipe_state_add_reg(rstate, R_030018_RESOURCE0_WORD6,
+                               0x00000000, 0xFFFFFFFF, NULL);
+       r600_pipe_state_add_reg(rstate, R_03001C_RESOURCE0_WORD7,
+                               0xC0000000, 0xFFFFFFFF, NULL);
+}