r600g: revert unintentional commit

[mesa.git] / src / gallium / drivers / r600 / evergreen_state.c

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 88dcc9ba54491d01d5a9790a315fa4046e7e2b67..4206b4a201d8ba890dd64d9b78fa0ec4666b92e4 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -305,11 +305,16 @@ static void *evergreen_create_sampler_state(struct pipe_context *ctx,
 {
        struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
        union util_color uc;
+       uint32_t coord_trunc = 0;
 
        if (rstate == NULL) {
                return NULL;
        }
 
+       if ((state->mag_img_filter == PIPE_TEX_FILTER_NEAREST) ||
+           (state->min_img_filter == PIPE_TEX_FILTER_NEAREST))
+               coord_trunc = 1;
+
        rstate->id = R600_PIPE_STATE_SAMPLER;
        util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
        r600_pipe_state_add_reg(rstate, R_03C000_SQ_TEX_SAMPLER_WORD0_0,
@@ -328,6 +333,7 @@ static void *evergreen_create_sampler_state(struct pipe_context *ctx,
                        0xFFFFFFFF, NULL);
        r600_pipe_state_add_reg(rstate, R_03C008_SQ_TEX_SAMPLER_WORD2_0,
                                S_03C008_LOD_BIAS(S_FIXED(CLAMP(state->lod_bias, -16, 16), 8)) |
+                               S_03C008_MC_COORD_TRUNCATE(coord_trunc) |
                                S_03C008_TYPE(1),
                                0xFFFFFFFF, NULL);
 
@@ -370,7 +376,7 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
        swizzle[1] = state->swizzle_g;
        swizzle[2] = state->swizzle_b;
        swizzle[3] = state->swizzle_a;
-       format = r600_translate_texformat(state->format,
+       format = r600_translate_texformat(ctx->screen, state->format,
                                          swizzle,
                                          &word4, &yuv_format);
        if (format == ~0) {
@@ -385,15 +391,19 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
                r600_texture_depth_flush(ctx, texture, TRUE);
                tmp = tmp->flushed_depth_texture;
        }
+
+       if (tmp->force_int_type) {
+               word4 &= C_030010_NUM_FORMAT_ALL;
+               word4 |= S_030010_NUM_FORMAT_ALL(V_030010_SQ_NUM_FORMAT_INT);
+       }
+
        rbuffer = &tmp->resource;
        bo[0] = rbuffer->bo;
        bo[1] = rbuffer->bo;
 
-       pitch = align(tmp->pitch_in_pixels[0], 8);
-       if (tmp->tiled) {
-               array_mode = tmp->array_mode[0];
-               tile_type = tmp->tile_type;
-       }
+       pitch = align(tmp->pitch_in_blocks[0] * util_format_get_blockwidth(state->format), 8);
+       array_mode = tmp->array_mode[0];
+       tile_type = tmp->tile_type;
 
        /* FIXME properly handle first level != 0 */
        r600_pipe_state_add_reg(rstate, R_030000_RESOURCE0_WORD0,
@@ -666,8 +676,8 @@ static void evergreen_cb(struct r600_pipe_context *rctx, struct r600_pipe_state
        /* XXX quite sure for dx10+ hw don't need any offset hacks */
        offset = r600_texture_get_offset((struct r600_resource_texture *)state->cbufs[cb]->texture,
                                         level, state->cbufs[cb]->u.tex.first_layer);
-       pitch = rtex->pitch_in_pixels[level] / 8 - 1;
-       slice = rtex->pitch_in_pixels[level] * surf->aligned_height / 64 - 1;
+       pitch = rtex->pitch_in_blocks[level] / 8 - 1;
+       slice = rtex->pitch_in_blocks[level] * surf->aligned_height / 64 - 1;
        ntype = 0;
        desc = util_format_description(surf->base.format);
        if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB)
@@ -675,6 +685,11 @@ static void evergreen_cb(struct r600_pipe_context *rctx, struct r600_pipe_state
 
        format = r600_translate_colorformat(surf->base.format);
        swap = r600_translate_colorswap(surf->base.format);
+
+       /* disable when gallium grows int textures */
+       if ((format == FMT_32_32_32_32 || format == FMT_16_16_16_16) && rtex->force_int_type)
+               ntype = 4;
+
        color_info = S_028C70_FORMAT(format) |
                S_028C70_COMP_SWAP(swap) |
                S_028C70_ARRAY_MODE(rtex->array_mode[level]) |
@@ -694,7 +709,7 @@ static void evergreen_cb(struct r600_pipe_context *rctx, struct r600_pipe_state
            ntype != 4 && ntype != 5)
                color_info |= S_028C70_SOURCE_FORMAT(V_028C70_EXPORT_4C_16BPC);
 
-       if (rtex->tiled) {
+       if (rtex->array_mode[level] > V_028C70_ARRAY_LINEAR_ALIGNED) {
                tile_type = rtex->tile_type;
        } else /* workaround for linear buffers */
                tile_type = 1;
@@ -749,8 +764,8 @@ static void evergreen_db(struct r600_pipe_context *rctx, struct r600_pipe_state
        /* XXX quite sure for dx10+ hw don't need any offset hacks */
        offset = r600_texture_get_offset((struct r600_resource_texture *)state->zsbuf->texture,
                                         level, state->zsbuf->u.tex.first_layer);
-       pitch = rtex->pitch_in_pixels[level] / 8 - 1;
-       slice = rtex->pitch_in_pixels[level] * surf->aligned_height / 64 - 1;
+       pitch = rtex->pitch_in_blocks[level] / 8 - 1;
+       slice = rtex->pitch_in_blocks[level] * surf->aligned_height / 64 - 1;
        format = r600_translate_dbformat(state->zsbuf->texture->format);
        stencil_format = r600_translate_stencilformat(state->zsbuf->texture->format);
 
@@ -905,6 +920,7 @@ void evergreen_init_state_functions(struct r600_pipe_context *rctx)
        rctx->context.set_vertex_sampler_views = evergreen_set_vs_sampler_view;
        rctx->context.set_viewport_state = evergreen_set_viewport_state;
        rctx->context.sampler_view_destroy = r600_sampler_view_destroy;
+       rctx->context.redefine_user_buffer = u_default_redefine_user_buffer;
 }
 
 void evergreen_init_config(struct r600_pipe_context *rctx)