r600g: fix up vs export handling

[mesa.git] / src / gallium / drivers / r600 / evergreen_state.c

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index acc591f2d6ebb11216782b4fe2040d2da88f8bf7..bc6039dd40c72d99d61b5a90eaf928f994bc3c5b 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -265,9 +265,6 @@ static uint32_t r600_translate_dbformat(enum pipe_format format)
                return V_028040_Z_24;
        case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
                return V_028040_Z_24;
-       case PIPE_FORMAT_Z32_FLOAT:
-       case PIPE_FORMAT_Z32_FLOAT_S8X24_USCALED:
-               return V_028040_Z_32_FLOAT;
        default:
                return ~0U;
        }
@@ -275,8 +272,7 @@ static uint32_t r600_translate_dbformat(enum pipe_format format)
 
 static uint32_t r600_translate_stencilformat(enum pipe_format format)
 {
-       if (format == PIPE_FORMAT_Z24_UNORM_S8_USCALED ||
-           format == PIPE_FORMAT_Z32_FLOAT_S8X24_USCALED)
+       if (format == PIPE_FORMAT_Z24_UNORM_S8_USCALED)
                return 1;
        else
                return 0;
@@ -364,7 +360,6 @@ static uint32_t r600_translate_colorswap(enum pipe_format format)
 
        case PIPE_FORMAT_R11G11B10_FLOAT:
        case PIPE_FORMAT_R32_FLOAT:
-       case PIPE_FORMAT_Z32_FLOAT:
        case PIPE_FORMAT_R16G16_FLOAT:
        case PIPE_FORMAT_R16G16_UNORM:
                return V_028C70_SWAP_STD;
@@ -374,7 +369,6 @@ static uint32_t r600_translate_colorswap(enum pipe_format format)
        case PIPE_FORMAT_R16G16B16A16_UNORM:
        case PIPE_FORMAT_R16G16B16A16_SNORM:
        case PIPE_FORMAT_R16G16B16A16_FLOAT:
-       case PIPE_FORMAT_Z32_FLOAT_S8X24_USCALED:
 
        /* 128-bit buffers. */
        case PIPE_FORMAT_R32G32B32A32_FLOAT:
@@ -459,11 +453,7 @@ static uint32_t r600_translate_colorformat(enum pipe_format format)
        case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
                return V_028C70_COLOR_24_8;
 
-       case PIPE_FORMAT_Z32_FLOAT_S8X24_USCALED:
-               return V_028C70_COLOR_X24_8_32_FLOAT;
-
        case PIPE_FORMAT_R32_FLOAT:
-       case PIPE_FORMAT_Z32_FLOAT:
                return V_028C70_COLOR_32_FLOAT;
 
        case PIPE_FORMAT_R16G16_FLOAT:
@@ -551,7 +541,6 @@ static uint32_t r600_colorformat_endian_swap(uint32_t colorformat)
 
                case V_028C70_COLOR_32_32_FLOAT:
                case V_028C70_COLOR_32_32:
-               case V_028C70_COLOR_X24_8_32_FLOAT:
                        return ENDIAN_8IN32;
 
                /* 96-bit buffers. */
@@ -2037,6 +2026,11 @@ void evergreen_init_config(struct r600_pipe_context *rctx)
        tmp |= S_008C28_NUM_LS_STACK_ENTRIES(num_ls_stack_entries);
        r600_pipe_state_add_reg(rstate, R_008C28_SQ_STACK_RESOURCE_MGMT_3, tmp, 0xFFFFFFFF, NULL);
 
+       tmp = 0;
+       tmp |= S_008E2C_NUM_PS_LDS(0x1000);
+       tmp |= S_008E2C_NUM_LS_LDS(0x1000);
+       r600_pipe_state_add_reg(rstate, R_008E2C_SQ_LDS_RESOURCE_MGMT, tmp, 0xFFFFFFFF, NULL);
+
        r600_pipe_state_add_reg(rstate, R_009100_SPI_CONFIG_CNTL, 0x0, 0xFFFFFFFF, NULL);
        r600_pipe_state_add_reg(rstate, R_00913C_SPI_CONFIG_CNTL_1, S_00913C_VTX_DONE_DELAY(4), 0xFFFFFFFF, NULL);
 
@@ -2134,7 +2128,6 @@ void evergreen_polygon_offset_update(struct r600_pipe_context *rctx)
                        offset_units *= 2.0f;
                        break;
                case PIPE_FORMAT_Z32_FLOAT:
-               case PIPE_FORMAT_Z32_FLOAT_S8X24_USCALED:
                        depth = -23;
                        offset_units *= 1.0f;
                        offset_db_fmt_cntl |= S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(1);
@@ -2305,7 +2298,7 @@ void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader
        struct r600_pipe_state *rstate = &shader->rstate;
        struct r600_shader *rshader = &shader->shader;
        unsigned spi_vs_out_id[10];
-       unsigned i, tmp;
+       unsigned i, tmp, nparams;
 
        /* clear previous register */
        rstate->nregs = 0;
@@ -2324,9 +2317,17 @@ void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader
                                        spi_vs_out_id[i], 0xFFFFFFFF, NULL);
        }
 
+       /* Certain attributes (position, psize, etc.) don't count as params.
+        * VS is required to export at least one param and r600_shader_from_tgsi()
+        * takes care of adding a dummy export.
+        */
+       nparams = rshader->noutput - rshader->npos;
+       if (nparams < 1)
+               nparams = 1;
+
        r600_pipe_state_add_reg(rstate,
                        R_0286C4_SPI_VS_OUT_CONFIG,
-                       S_0286C4_VS_EXPORT_COUNT(rshader->noutput - 2),
+                       S_0286C4_VS_EXPORT_COUNT(nparams - 1),
                        0xFFFFFFFF, NULL);
        r600_pipe_state_add_reg(rstate,
                        R_028860_SQ_PGM_RESOURCES_VS,