r600g: Make sure to initialize DB_DEPTH_CONTROL register for compute
[mesa.git] / src / gallium / drivers / r600 / evergreen_state.c
index 405d1b03eeb97f0c530abb0009e5cc8f3e999851..f244e8a5cadc275ece78ab25b2053c7c9552b21c 100644 (file)
@@ -643,13 +643,6 @@ boolean evergreen_is_format_supported(struct pipe_screen *screen,
                default:
                        return FALSE;
                }
-
-               /* require render-target support for multisample resources */
-               if (util_format_is_depth_or_stencil(format)) {
-                       usage |= PIPE_BIND_DEPTH_STENCIL;
-               } else {
-                       usage |= PIPE_BIND_RENDER_TARGET;
-               }
        }
 
        if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
@@ -921,7 +914,7 @@ static void *evergreen_create_rs_state(struct pipe_context *ctx,
        } else {
                r600_pipe_state_add_reg(rstate, R_028C08_PA_SU_VTX_CNTL,
                                        S_028C08_PIX_CENTER_HALF(state->gl_rasterization_rules) |
-                                       S_028C08_QUANT_MODE(V_028C08_X_1_4096TH));
+                                       S_028C08_QUANT_MODE(V_028C08_X_1_256TH));
        }
        r600_pipe_state_add_reg(rstate, R_028B7C_PA_SU_POLY_OFFSET_CLAMP, fui(state->offset_clamp));
        r600_pipe_state_add_reg(rstate, R_028814_PA_SU_SC_MODE_CNTL,
@@ -1122,55 +1115,13 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
        return &view->base;
 }
 
-static void evergreen_set_vs_sampler_views(struct pipe_context *ctx, unsigned count,
-                                          struct pipe_sampler_view **views)
-{
-       r600_set_sampler_views(ctx, PIPE_SHADER_VERTEX, 0, count, views);
-}
-
-static void evergreen_set_ps_sampler_views(struct pipe_context *ctx, unsigned count,
-                                          struct pipe_sampler_view **views)
-{
-       r600_set_sampler_views(ctx, PIPE_SHADER_FRAGMENT, 0, count, views);
-}
-
-static void evergreen_set_clip_state(struct pipe_context *ctx,
-                               const struct pipe_clip_state *state)
+static void evergreen_emit_clip_state(struct r600_context *rctx, struct r600_atom *atom)
 {
-       struct r600_context *rctx = (struct r600_context *)ctx;
-       struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
-       struct pipe_constant_buffer cb;
-
-       if (rstate == NULL)
-               return;
-
-       rctx->clip = *state;
-       rstate->id = R600_PIPE_STATE_CLIP;
-       for (int i = 0; i < 6; i++) {
-               r600_pipe_state_add_reg(rstate,
-                                       R_0285BC_PA_CL_UCP0_X + i * 16,
-                                       fui(state->ucp[i][0]));
-               r600_pipe_state_add_reg(rstate,
-                                       R_0285C0_PA_CL_UCP0_Y + i * 16,
-                                       fui(state->ucp[i][1]) );
-               r600_pipe_state_add_reg(rstate,
-                                       R_0285C4_PA_CL_UCP0_Z + i * 16,
-                                       fui(state->ucp[i][2]));
-               r600_pipe_state_add_reg(rstate,
-                                       R_0285C8_PA_CL_UCP0_W + i * 16,
-                                       fui(state->ucp[i][3]));
-       }
-
-       free(rctx->states[R600_PIPE_STATE_CLIP]);
-       rctx->states[R600_PIPE_STATE_CLIP] = rstate;
-       r600_context_pipe_state_set(rctx, rstate);
+       struct radeon_winsys_cs *cs = rctx->cs;
+       struct pipe_clip_state *state = &rctx->clip_state.state;
 
-       cb.buffer = NULL;
-       cb.user_buffer = state->ucp;
-       cb.buffer_offset = 0;
-       cb.buffer_size = 4*4*8;
-       r600_set_constant_buffer(ctx, PIPE_SHADER_VERTEX, 1, &cb);
-       pipe_resource_reference(&cb.buffer, NULL);
+       r600_write_context_reg_seq(cs, R_0285BC_PA_CL_UCP0_X, 6*4);
+       r600_write_array(cs, 6*4, (unsigned*)state);
 }
 
 static void evergreen_set_polygon_stipple(struct pipe_context *ctx,
@@ -1219,29 +1170,6 @@ static void evergreen_set_scissor_state(struct pipe_context *ctx,
        r600_context_pipe_state_set(rctx, rstate);
 }
 
-static void evergreen_set_viewport_state(struct pipe_context *ctx,
-                                       const struct pipe_viewport_state *state)
-{
-       struct r600_context *rctx = (struct r600_context *)ctx;
-       struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
-
-       if (rstate == NULL)
-               return;
-
-       rctx->viewport = *state;
-       rstate->id = R600_PIPE_STATE_VIEWPORT;
-       r600_pipe_state_add_reg(rstate, R_02843C_PA_CL_VPORT_XSCALE_0, fui(state->scale[0]));
-       r600_pipe_state_add_reg(rstate, R_028444_PA_CL_VPORT_YSCALE_0, fui(state->scale[1]));
-       r600_pipe_state_add_reg(rstate, R_02844C_PA_CL_VPORT_ZSCALE_0, fui(state->scale[2]));
-       r600_pipe_state_add_reg(rstate, R_028440_PA_CL_VPORT_XOFFSET_0, fui(state->translate[0]));
-       r600_pipe_state_add_reg(rstate, R_028448_PA_CL_VPORT_YOFFSET_0, fui(state->translate[1]));
-       r600_pipe_state_add_reg(rstate, R_028450_PA_CL_VPORT_ZOFFSET_0, fui(state->translate[2]));
-
-       free(rctx->states[R600_PIPE_STATE_VIEWPORT]);
-       rctx->states[R600_PIPE_STATE_VIEWPORT] = rstate;
-       r600_context_pipe_state_set(rctx, rstate);
-}
-
 void evergreen_init_color_surface(struct r600_context *rctx,
                                  struct r600_surface *surf)
 {
@@ -1697,7 +1625,12 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
        if (rstate == NULL)
                return;
 
-       r600_flush_framebuffer(rctx, false);
+       if (rctx->framebuffer.nr_cbufs) {
+               rctx->flags |= R600_CONTEXT_CB_FLUSH;
+       }
+       if (rctx->framebuffer.zsbuf) {
+               rctx->flags |= R600_CONTEXT_DB_FLUSH;
+       }
 
        /* unreference old buffer and reference new one */
        rstate->id = R600_PIPE_STATE_FRAMEBUFFER;
@@ -2052,14 +1985,21 @@ static void evergreen_emit_constant_buffers(struct r600_context *rctx,
 
 static void evergreen_emit_vs_constant_buffers(struct r600_context *rctx, struct r600_atom *atom)
 {
-       evergreen_emit_constant_buffers(rctx, &rctx->vs_constbuf_state, 176,
+       evergreen_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_VERTEX], 176,
                                        R_028180_ALU_CONST_BUFFER_SIZE_VS_0,
                                        R_028980_ALU_CONST_CACHE_VS_0);
 }
 
+static void evergreen_emit_gs_constant_buffers(struct r600_context *rctx, struct r600_atom *atom)
+{
+       evergreen_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_GEOMETRY], 336,
+                                       R_0281C0_ALU_CONST_BUFFER_SIZE_GS_0,
+                                       R_0289C0_ALU_CONST_CACHE_GS_0);
+}
+
 static void evergreen_emit_ps_constant_buffers(struct r600_context *rctx, struct r600_atom *atom)
 {
-       evergreen_emit_constant_buffers(rctx, &rctx->ps_constbuf_state, 0,
+       evergreen_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_FRAGMENT], 0,
                                       R_028140_ALU_CONST_BUFFER_SIZE_PS_0,
                                       R_028940_ALU_CONST_CACHE_PS_0);
 }
@@ -2096,47 +2036,60 @@ static void evergreen_emit_sampler_views(struct r600_context *rctx,
 
 static void evergreen_emit_vs_sampler_views(struct r600_context *rctx, struct r600_atom *atom)
 {
-       evergreen_emit_sampler_views(rctx, &rctx->vs_samplers.views, 176 + R600_MAX_CONST_BUFFERS);
+       evergreen_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].views, 176 + R600_MAX_CONST_BUFFERS);
+}
+
+static void evergreen_emit_gs_sampler_views(struct r600_context *rctx, struct r600_atom *atom)
+{
+       evergreen_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].views, 336 + R600_MAX_CONST_BUFFERS);
 }
 
 static void evergreen_emit_ps_sampler_views(struct r600_context *rctx, struct r600_atom *atom)
 {
-       evergreen_emit_sampler_views(rctx, &rctx->ps_samplers.views, R600_MAX_CONST_BUFFERS);
+       evergreen_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].views, R600_MAX_CONST_BUFFERS);
 }
 
-static void evergreen_emit_sampler(struct r600_context *rctx,
+static void evergreen_emit_sampler_states(struct r600_context *rctx,
                                struct r600_textures_info *texinfo,
                                unsigned resource_id_base,
                                unsigned border_index_reg)
 {
        struct radeon_winsys_cs *cs = rctx->cs;
-       unsigned i;
+       uint32_t dirty_mask = texinfo->states.dirty_mask;
 
-       for (i = 0; i < texinfo->n_samplers; i++) {
+       while (dirty_mask) {
+               struct r600_pipe_sampler_state *rstate;
+               unsigned i = u_bit_scan(&dirty_mask);
+
+               rstate = texinfo->states.states[i];
+               assert(rstate);
 
-               if (texinfo->samplers[i] == NULL) {
-                       continue;
-               }
                r600_write_value(cs, PKT3(PKT3_SET_SAMPLER, 3, 0));
                r600_write_value(cs, (resource_id_base + i) * 3);
-               r600_write_array(cs, 3, texinfo->samplers[i]->tex_sampler_words);
+               r600_write_array(cs, 3, rstate->tex_sampler_words);
 
-               if (texinfo->samplers[i]->border_color_use) {
+               if (rstate->border_color_use) {
                        r600_write_config_reg_seq(cs, border_index_reg, 5);
                        r600_write_value(cs, i);
-                       r600_write_array(cs, 4, texinfo->samplers[i]->border_color);
+                       r600_write_array(cs, 4, rstate->border_color);
                }
        }
+       texinfo->states.dirty_mask = 0;
+}
+
+static void evergreen_emit_vs_sampler_states(struct r600_context *rctx, struct r600_atom *atom)
+{
+       evergreen_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_VERTEX], 18, R_00A414_TD_VS_SAMPLER0_BORDER_INDEX);
 }
 
-static void evergreen_emit_vs_sampler(struct r600_context *rctx, struct r600_atom *atom)
+static void evergreen_emit_gs_sampler_states(struct r600_context *rctx, struct r600_atom *atom)
 {
-       evergreen_emit_sampler(rctx, &rctx->vs_samplers, 18, R_00A414_TD_VS_SAMPLER0_BORDER_INDEX);
+       evergreen_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY], 36, R_00A428_TD_GS_SAMPLER0_BORDER_INDEX);
 }
 
-static void evergreen_emit_ps_sampler(struct r600_context *rctx, struct r600_atom *atom)
+static void evergreen_emit_ps_sampler_states(struct r600_context *rctx, struct r600_atom *atom)
 {
-       evergreen_emit_sampler(rctx, &rctx->ps_samplers, 0, R_00A400_TD_PS_SAMPLER0_BORDER_INDEX);
+       evergreen_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT], 0, R_00A400_TD_PS_SAMPLER0_BORDER_INDEX);
 }
 
 static void evergreen_emit_sample_mask(struct r600_context *rctx, struct r600_atom *a)
@@ -2174,18 +2127,24 @@ void evergreen_init_state_functions(struct r600_context *rctx)
         */
 
        /* shader const */
-       r600_init_atom(rctx, &rctx->vs_constbuf_state.atom, id++, evergreen_emit_vs_constant_buffers, 0);
-       r600_init_atom(rctx, &rctx->ps_constbuf_state.atom, id++, evergreen_emit_ps_constant_buffers, 0);
+       r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_VERTEX].atom, id++, evergreen_emit_vs_constant_buffers, 0);
+       r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_GEOMETRY].atom, id++, evergreen_emit_gs_constant_buffers, 0);
+       r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_FRAGMENT].atom, id++, evergreen_emit_ps_constant_buffers, 0);
        /* shader program */
        r600_init_atom(rctx, &rctx->cs_shader_state.atom, id++, evergreen_emit_cs_shader, 0);
        /* sampler */
-       r600_init_atom(rctx, &rctx->vs_samplers.atom_sampler, id++, evergreen_emit_vs_sampler, 0);
-       r600_init_atom(rctx, &rctx->ps_samplers.atom_sampler, id++, evergreen_emit_ps_sampler, 0);
+       r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].states.atom, id++, evergreen_emit_vs_sampler_states, 0);
+       r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].states.atom, id++, evergreen_emit_gs_sampler_states, 0);
+       r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].states.atom, id++, evergreen_emit_ps_sampler_states, 0);
        /* resources */
        r600_init_atom(rctx, &rctx->vertex_buffer_state.atom, id++, evergreen_fs_emit_vertex_buffers, 0);
        r600_init_atom(rctx, &rctx->cs_vertex_buffer_state.atom, id++, evergreen_cs_emit_vertex_buffers, 0);
-       r600_init_atom(rctx, &rctx->vs_samplers.views.atom, id++, evergreen_emit_vs_sampler_views, 0);
-       r600_init_atom(rctx, &rctx->ps_samplers.views.atom, id++, evergreen_emit_ps_sampler_views, 0);
+       r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].views.atom, id++, evergreen_emit_vs_sampler_views, 0);
+       r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].views.atom, id++, evergreen_emit_gs_sampler_views, 0);
+       r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].views.atom, id++, evergreen_emit_ps_sampler_views, 0);
+
+       r600_init_atom(rctx, &rctx->vgt_state.atom, id++, r600_emit_vgt_state, 6);
+       r600_init_atom(rctx, &rctx->vgt2_state.atom, id++, r600_emit_vgt2_state, 3);
 
        if (rctx->chip_class == EVERGREEN) {
                r600_init_atom(rctx, &rctx->sample_mask.atom, id++, evergreen_emit_sample_mask, 3);
@@ -2193,59 +2152,24 @@ void evergreen_init_state_functions(struct r600_context *rctx)
                r600_init_atom(rctx, &rctx->sample_mask.atom, id++, cayman_emit_sample_mask, 4);
        }
        rctx->sample_mask.sample_mask = ~0;
-       r600_atom_dirty(rctx, &rctx->sample_mask.atom);
-
-       r600_init_atom(rctx, &rctx->cb_misc_state.atom, id++, evergreen_emit_cb_misc_state, 0);
-       r600_atom_dirty(rctx, &rctx->cb_misc_state.atom);
 
        r600_init_atom(rctx, &rctx->alphatest_state.atom, id++, r600_emit_alphatest_state, 6);
-       r600_atom_dirty(rctx, &rctx->alphatest_state.atom);
-
+       r600_init_atom(rctx, &rctx->blend_color.atom, id++, r600_emit_blend_color, 6);
+       r600_init_atom(rctx, &rctx->cb_misc_state.atom, id++, evergreen_emit_cb_misc_state, 4);
+       r600_init_atom(rctx, &rctx->clip_misc_state.atom, id++, r600_emit_clip_misc_state, 6);
+       r600_init_atom(rctx, &rctx->clip_state.atom, id++, evergreen_emit_clip_state, 26);
        r600_init_atom(rctx, &rctx->db_misc_state.atom, id++, evergreen_emit_db_misc_state, 7);
-       r600_atom_dirty(rctx, &rctx->db_misc_state.atom);
-
+       r600_init_atom(rctx, &rctx->stencil_ref.atom, id++, r600_emit_stencil_ref, 4);
+       r600_init_atom(rctx, &rctx->viewport.atom, id++, r600_emit_viewport_state, 8);
 
        rctx->context.create_blend_state = evergreen_create_blend_state;
        rctx->context.create_depth_stencil_alpha_state = evergreen_create_dsa_state;
-       rctx->context.create_fs_state = r600_create_shader_state_ps;
        rctx->context.create_rasterizer_state = evergreen_create_rs_state;
        rctx->context.create_sampler_state = evergreen_create_sampler_state;
        rctx->context.create_sampler_view = evergreen_create_sampler_view;
-       rctx->context.create_vertex_elements_state = r600_create_vertex_elements;
-       rctx->context.create_vs_state = r600_create_shader_state_vs;
-       rctx->context.bind_blend_state = r600_bind_blend_state;
-       rctx->context.bind_depth_stencil_alpha_state = r600_bind_dsa_state;
-       rctx->context.bind_fragment_sampler_states = r600_bind_ps_samplers;
-       rctx->context.bind_fs_state = r600_bind_ps_shader;
-       rctx->context.bind_rasterizer_state = r600_bind_rs_state;
-       rctx->context.bind_vertex_elements_state = r600_bind_vertex_elements;
-       rctx->context.bind_vertex_sampler_states = r600_bind_vs_samplers;
-       rctx->context.bind_vs_state = r600_bind_vs_shader;
-       rctx->context.delete_blend_state = r600_delete_state;
-       rctx->context.delete_depth_stencil_alpha_state = r600_delete_state;
-       rctx->context.delete_fs_state = r600_delete_ps_shader;
-       rctx->context.delete_rasterizer_state = r600_delete_rs_state;
-       rctx->context.delete_sampler_state = r600_delete_sampler;
-       rctx->context.delete_vertex_elements_state = r600_delete_vertex_element;
-       rctx->context.delete_vs_state = r600_delete_vs_shader;
-       rctx->context.set_blend_color = r600_set_blend_color;
-       rctx->context.set_clip_state = evergreen_set_clip_state;
-       rctx->context.set_constant_buffer = r600_set_constant_buffer;
-       rctx->context.set_fragment_sampler_views = evergreen_set_ps_sampler_views;
        rctx->context.set_framebuffer_state = evergreen_set_framebuffer_state;
        rctx->context.set_polygon_stipple = evergreen_set_polygon_stipple;
-       rctx->context.set_sample_mask = r600_set_sample_mask;
        rctx->context.set_scissor_state = evergreen_set_scissor_state;
-       rctx->context.set_stencil_ref = r600_set_pipe_stencil_ref;
-       rctx->context.set_vertex_buffers = r600_set_vertex_buffers;
-       rctx->context.set_index_buffer = r600_set_index_buffer;
-       rctx->context.set_vertex_sampler_views = evergreen_set_vs_sampler_views;
-       rctx->context.set_viewport_state = evergreen_set_viewport_state;
-       rctx->context.sampler_view_destroy = r600_sampler_view_destroy;
-       rctx->context.texture_barrier = r600_texture_barrier;
-       rctx->context.create_stream_output_target = r600_create_so_target;
-       rctx->context.stream_output_target_destroy = r600_so_target_destroy;
-       rctx->context.set_stream_output_targets = r600_set_so_targets;
        evergreen_init_compute_state_functions(rctx);
 }
 
@@ -2599,6 +2523,9 @@ void evergreen_init_common_regs(struct r600_command_buffer *cb,
        r600_store_value(cb, 0); /* R_028AC4_DB_SRESULTS_COMPARE_STATE1 */
        r600_store_value(cb, 0); /* R_028AC8_DB_PRELOAD_CONTROL */
 
+       /* The cs checker requires this register to be set. */
+       r600_store_context_reg(cb, R_028800_DB_DEPTH_CONTROL, 0);
+
        r600_store_context_reg(cb, R_028848_SQ_PGM_RESOURCES_2_PS, S_028848_SINGLE_ROUND(V_SQ_ROUND_NEAREST_EVEN));
        r600_store_context_reg(cb, R_028864_SQ_PGM_RESOURCES_2_VS, S_028864_SINGLE_ROUND(V_SQ_ROUND_NEAREST_EVEN));
 
@@ -2939,7 +2866,6 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx)
 
        r600_store_context_reg(cb, R_0288A8_SQ_PGM_RESOURCES_FS, 0);
 
-       r600_store_context_reg(cb, R_028800_DB_DEPTH_CONTROL, 0);
        if (rctx->screen->has_streamout) {
                r600_store_context_reg(cb, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
        }