r600g: disable handling of DISCARD_RANGE

[mesa.git] / src / gallium / drivers / r600 / r600_asm.c

diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index ccb8bc067938b12ea6cb6dc8e64af875e1a3f853..2341bec44126cfacc1739aa5d9ead67694c7074d 100644 (file)
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -54,6 +54,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL:
+               case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_IEEE:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT:
@@ -79,6 +80,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT:
+               case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE:
@@ -94,6 +96,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT:
+               case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE:
@@ -101,6 +104,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE:
+               case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED:
                case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE:
@@ -132,6 +136,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL:
+               case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_IEEE:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT:
@@ -153,6 +158,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE:
+               case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE:
@@ -171,6 +177,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT:
+               case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC:
                case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE:
@@ -1602,6 +1609,10 @@ int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_v
        bc->ndw += 4;
        if ((bc->cf_last->ndw / 4) >= r600_bytecode_num_tex_and_vtx_instructions(bc))
                bc->force_add_cf = 1;
+
+       bc->ngpr = MAX2(bc->ngpr, vtx->src_gpr + 1);
+       bc->ngpr = MAX2(bc->ngpr, vtx->dst_gpr + 1);
+
        return 0;
 }
 
@@ -2483,7 +2494,8 @@ void r600_bytecode_dump(struct r600_bytecode *bc)
                        if (alu->last) {
                                for (i = 0; i < nliteral; i++, id++) {
                                        float *f = (float*)(bc->bytecode + id);
-                                       fprintf(stderr, "%04d %08X\t%f\n", id, bc->bytecode[id], *f);
+                                       fprintf(stderr, "%04d %08X\t%f (%d)\n", id, bc->bytecode[id], *f,
+                                                       *(bc->bytecode + id));
                                }
                                id += nliteral & 1;
                                nliteral = 0;