*/
#include <stdio.h>
#include <errno.h>
+#include <byteswap.h>
#include "util/u_format.h"
#include "util/u_memory.h"
#include "pipe/p_shader_tokens.h"
#define NUM_OF_CYCLES 3
#define NUM_OF_COMPONENTS 4
-#define PREV_ALU(alu) LIST_ENTRY(struct r600_bc_alu, alu->list.prev, list)
-#define NEXT_ALU(alu) LIST_ENTRY(struct r600_bc_alu, alu->list.next, list)
-
static inline unsigned int r600_bc_get_num_operands(struct r600_bc *bc, struct r600_bc_alu *alu)
{
if(alu->is_op3)
return 3;
- switch (bc->chiprev) {
- case CHIPREV_R600:
- case CHIPREV_R700:
+ switch (bc->chip_class) {
+ case R600:
+ case R700:
switch (alu->inst) {
case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP:
return 0;
case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE:
case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE:
case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL:
+ case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT:
case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX:
case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN:
case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE:
"Need instruction operand number for 0x%x.\n", alu->inst);
}
break;
- case CHIPREV_EVERGREEN:
+ case EVERGREEN:
+ case CAYMAN:
switch (alu->inst) {
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP:
return 0;
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL:
+ case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN:
case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE:
LIST_INITHEAD(&cf->alu);
LIST_INITHEAD(&cf->vtx);
LIST_INITHEAD(&cf->tex);
- cf->barrier = 1;
return cf;
}
return tex;
}
-int r600_bc_init(struct r600_bc *bc, enum radeon_family family)
+void r600_bc_init(struct r600_bc *bc, enum chip_class chip_class)
{
LIST_INITHEAD(&bc->cf);
- bc->family = family;
- switch (bc->family) {
- case CHIP_R600:
- case CHIP_RV610:
- case CHIP_RV630:
- case CHIP_RV670:
- case CHIP_RV620:
- case CHIP_RV635:
- case CHIP_RS780:
- case CHIP_RS880:
- bc->chiprev = CHIPREV_R600;
- break;
- case CHIP_RV770:
- case CHIP_RV730:
- case CHIP_RV710:
- case CHIP_RV740:
- bc->chiprev = CHIPREV_R700;
- break;
- case CHIP_CEDAR:
- case CHIP_REDWOOD:
- case CHIP_JUNIPER:
- case CHIP_CYPRESS:
- case CHIP_HEMLOCK:
- case CHIP_PALM:
- case CHIP_BARTS:
- case CHIP_TURKS:
- case CHIP_CAICOS:
- bc->chiprev = CHIPREV_EVERGREEN;
- break;
- default:
- R600_ERR("unknown family %d\n", bc->family);
- return -EINVAL;
- }
- return 0;
+ bc->chip_class = chip_class;
}
static int r600_bc_add_cf(struct r600_bc *bc)
return 0;
}
-static void r600_bc_remove_cf(struct r600_bc *bc, struct r600_bc_cf *cf)
-{
- struct r600_bc_cf *other;
- LIST_FOR_EACH_ENTRY(other, &bc->cf, list) {
- if (other->id > cf->id)
- other->id -= 2;
- if (other->cf_addr > cf->id)
- other->cf_addr -= 2;
- }
- LIST_DEL(&cf->list);
- free(cf);
-}
-
-static void r600_bc_move_cf(struct r600_bc *bc, struct r600_bc_cf *cf, struct r600_bc_cf *next)
-{
- struct r600_bc_cf *prev = LIST_ENTRY(struct r600_bc_cf, next->list.prev, list);
- unsigned old_id = cf->id;
- unsigned new_id = next->list.prev == &bc->cf ? 0 : prev->id + 2;
- struct r600_bc_cf *other;
-
- if (prev == cf || next == cf)
- return; /* position hasn't changed */
-
- LIST_DEL(&cf->list);
- LIST_FOR_EACH_ENTRY(other, &bc->cf, list) {
- if (other->id > old_id)
- other->id -= 2;
- if (other->id >= new_id)
- other->id += 2;
- if (other->cf_addr > old_id)
- other->cf_addr -= 2;
- if (other->cf_addr > new_id)
- other->cf_addr += 2;
- }
- cf->id = new_id;
- LIST_ADD(&cf->list, &prev->list);
-}
-
int r600_bc_add_output(struct r600_bc *bc, const struct r600_bc_output *output)
{
int r;
- if (bc->cf_last && bc->cf_last->inst == BC_INST(bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT) &&
+ if (bc->cf_last && (bc->cf_last->inst == output->inst ||
+ (bc->cf_last->inst == BC_INST(bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT) &&
+ output->inst == BC_INST(bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE))) &&
output->type == bc->cf_last->output.type &&
output->elem_size == bc->cf_last->output.elem_size &&
output->swizzle_x == bc->cf_last->output.swizzle_x &&
if ((output->gpr + output->burst_count) == bc->cf_last->output.gpr &&
(output->array_base + output->burst_count) == bc->cf_last->output.array_base) {
+ bc->cf_last->output.end_of_program |= output->end_of_program;
+ bc->cf_last->output.inst = output->inst;
bc->cf_last->output.gpr = output->gpr;
bc->cf_last->output.array_base = output->array_base;
bc->cf_last->output.burst_count += output->burst_count;
} else if (output->gpr == (bc->cf_last->output.gpr + bc->cf_last->output.burst_count) &&
output->array_base == (bc->cf_last->output.array_base + bc->cf_last->output.burst_count)) {
+ bc->cf_last->output.end_of_program |= output->end_of_program;
+ bc->cf_last->output.inst = output->inst;
bc->cf_last->output.burst_count += output->burst_count;
return 0;
}
r = r600_bc_add_cf(bc);
if (r)
return r;
- bc->cf_last->inst = BC_INST(bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
+ bc->cf_last->inst = output->inst;
memcpy(&bc->cf_last->output, output, sizeof(struct r600_bc_output));
- bc->cf_last->output.burst_count = 1;
return 0;
}
-/* alu predicate instructions */
-static int is_alu_pred_inst(struct r600_bc *bc, struct r600_bc_alu *alu)
+/* alu instructions that can ony exits once per group */
+static int is_alu_once_inst(struct r600_bc *bc, struct r600_bc_alu *alu)
{
- switch (bc->chiprev) {
- case CHIPREV_R600:
- case CHIPREV_R700:
+ switch (bc->chip_class) {
+ case R600:
+ case R700:
return !alu->is_op3 && (
+ alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE ||
+ alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT ||
+ alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE ||
+ alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE ||
+ alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT ||
+ alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT ||
+ alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT ||
+ alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT ||
+ alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT ||
+ alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT ||
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT ||
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT ||
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE ||
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH_INT ||
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLT_PUSH_INT ||
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLE_PUSH_INT);
- case CHIPREV_EVERGREEN:
+ case EVERGREEN:
+ case CAYMAN:
default:
return !alu->is_op3 && (
+ alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE ||
+ alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT ||
+ alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE ||
+ alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE ||
+ alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT ||
+ alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT ||
+ alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT ||
+ alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT ||
+ alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT ||
+ alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT ||
alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT ||
alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT ||
alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE ||
}
}
-/* alu kill instructions */
-static int is_alu_kill_inst(struct r600_bc *bc, struct r600_bc_alu *alu)
-{
- switch (bc->chiprev) {
- case CHIPREV_R600:
- case CHIPREV_R700:
- return !alu->is_op3 && (
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT);
- case CHIPREV_EVERGREEN:
- default:
- return !alu->is_op3 && (
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT);
- }
-}
-
-/* alu instructions that can ony exits once per group */
-static int is_alu_once_inst(struct r600_bc *bc, struct r600_bc_alu *alu)
-{
- return is_alu_kill_inst(bc, alu) ||
- is_alu_pred_inst(bc, alu);
-}
-
static int is_alu_reduction_inst(struct r600_bc *bc, struct r600_bc_alu *alu)
{
- switch (bc->chiprev) {
- case CHIPREV_R600:
- case CHIPREV_R700:
+ switch (bc->chip_class) {
+ case R600:
+ case R700:
return !alu->is_op3 && (
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE ||
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4 ||
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE ||
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4);
- case CHIPREV_EVERGREEN:
+ case EVERGREEN:
+ case CAYMAN:
default:
return !alu->is_op3 && (
alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE ||
static int is_alu_cube_inst(struct r600_bc *bc, struct r600_bc_alu *alu)
{
- switch (bc->chiprev) {
- case CHIPREV_R600:
- case CHIPREV_R700:
+ switch (bc->chip_class) {
+ case R600:
+ case R700:
return !alu->is_op3 &&
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE;
- case CHIPREV_EVERGREEN:
+ case EVERGREEN:
+ case CAYMAN:
default:
return !alu->is_op3 &&
alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE;
static int is_alu_mova_inst(struct r600_bc *bc, struct r600_bc_alu *alu)
{
- switch (bc->chiprev) {
- case CHIPREV_R600:
- case CHIPREV_R700:
+ switch (bc->chip_class) {
+ case R600:
+ case R700:
return !alu->is_op3 && (
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA ||
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR ||
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT);
- case CHIPREV_EVERGREEN:
+ case EVERGREEN:
+ case CAYMAN:
default:
return !alu->is_op3 && (
alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT);
static int is_alu_vec_unit_inst(struct r600_bc *bc, struct r600_bc_alu *alu)
{
return is_alu_reduction_inst(bc, alu) ||
- is_alu_mova_inst(bc, alu);
+ is_alu_mova_inst(bc, alu) ||
+ (bc->chip_class == EVERGREEN &&
+ alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR);
}
/* alu instructions that can only execute on the trans unit */
static int is_alu_trans_unit_inst(struct r600_bc *bc, struct r600_bc_alu *alu)
{
- switch (bc->chiprev) {
- case CHIPREV_R600:
- case CHIPREV_R700:
+ switch (bc->chip_class) {
+ case R600:
+ case R700:
if (!alu->is_op3)
return alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT ||
alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT ||
alu->inst == V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_D2 ||
alu->inst == V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M2 ||
alu->inst == V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M4;
- case CHIPREV_EVERGREEN:
+ case EVERGREEN:
+ case CAYMAN:
default:
if (!alu->is_op3)
- /* Note that FLT_TO_INT* instructions are vector instructions
- * on Evergreen, despite what the documentation says. */
+ /* Note that FLT_TO_INT_* instructions are vector-only instructions
+ * on Evergreen, despite what the documentation says. FLT_TO_INT
+ * can do both vector and scalar. */
return alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT ||
alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT ||
alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT ||
{
struct r600_bc_alu *alu;
unsigned i, chan, trans;
+ int max_slots = bc->chip_class == CAYMAN ? 4 : 5;
- for (i = 0; i < 5; i++)
+ for (i = 0; i < max_slots; i++)
assignment[i] = NULL;
for (alu = alu_first; alu; alu = LIST_ENTRY(struct r600_bc_alu, alu->list.next, list)) {
chan = alu->dst.chan;
- if (is_alu_trans_unit_inst(bc, alu))
+ if (max_slots == 4)
+ trans = 0;
+ else if (is_alu_trans_unit_inst(bc, alu))
trans = 1;
else if (is_alu_vec_unit_inst(bc, alu))
trans = 0;
else if (assignment[chan])
- trans = 1; // assume ALU_INST_PREFER_VECTOR
+ trans = 1; /* Assume ALU_INST_PREFER_VECTOR. */
else
trans = 0;
if (trans) {
if (assignment[4]) {
- assert(0); //ALU.Trans has already been allocated
+ assert(0); /* ALU.Trans has already been allocated. */
return -1;
}
assignment[4] = alu;
} else {
if (assignment[chan]) {
- assert(0); //ALU.chan has already been allocated
+ assert(0); /* ALU.chan has already been allocated. */
return -1;
}
assignment[chan] = alu;
if (bs->hw_gpr[cycle][chan] == -1)
bs->hw_gpr[cycle][chan] = sel;
else if (bs->hw_gpr[cycle][chan] != (int)sel) {
- // Another scalar operation has already used GPR read port for channel
+ /* Another scalar operation has already used the GPR read port for the channel. */
return -1;
}
return 0;
static int reserve_cfile(struct r600_bc *bc, struct alu_bank_swizzle *bs, unsigned sel, unsigned chan)
{
int res, num_res = 4;
- if (bc->chiprev >= CHIPREV_R700) {
+ if (bc->chip_class >= R700) {
num_res = 2;
chan /= 2;
}
return 0;
} else if (bs->hw_cfile_addr[res] == sel &&
bs->hw_cfile_elem[res] == chan)
- return 0; // Read for this scalar element already reserved, nothing to do here.
+ return 0; /* Read for this scalar element already reserved, nothing to do here. */
}
- // All cfile read ports are used, cannot reference vector element
+ /* All cfile read ports are used, cannot reference vector element. */
return -1;
}
static int is_cfile(unsigned sel)
{
return (sel > 255 && sel < 512) ||
- (sel > 511 && sel < 4607) || // Kcache before translate
- (sel > 127 && sel < 192); // Kcache after translate
+ (sel > 511 && sel < 4607) || /* Kcache before translation. */
+ (sel > 127 && sel < 192); /* Kcache after translation. */
}
static int is_const(int sel)
if (is_gpr(sel)) {
cycle = cycle_for_bank_swizzle_vec[bank_swizzle][src];
if (src == 1 && sel == alu->src[0].sel && elem == alu->src[0].chan)
- // Nothing to do; special-case optimization,
- // second source uses first source’s reservation
+ /* Nothing to do; special-case optimization,
+ * second source uses first source’s reservation. */
continue;
else {
r = reserve_gpr(bs, sel, elem, cycle);
if (r)
return r;
}
- // No restrictions on PV, PS, literal or special constants
+ /* No restrictions on PV, PS, literal or special constants. */
}
return 0;
}
for (const_count = 0, src = 0; src < num_src; ++src) {
sel = alu->src[src].sel;
elem = alu->src[src].chan;
- if (is_const(sel)) { // Any constant, including literal and inline constants
+ if (is_const(sel)) { /* Any constant, including literal and inline constants. */
if (const_count >= 2)
- // More than two references to a constant in
- // transcendental operation.
+ /* More than two references to a constant in
+ * transcendental operation. */
return -1;
else
const_count++;
if (is_gpr(sel)) {
cycle = cycle_for_bank_swizzle_scl[bank_swizzle][src];
if (cycle < const_count)
- // Cycle for GPR load conflicts with
- // constant load in transcendental operation.
+ /* Cycle for GPR load conflicts with
+ * constant load in transcendental operation. */
return -1;
r = reserve_gpr(bs, sel, elem, cycle);
if (r)
return r;
}
- // Constants already processed
- // No restrictions on PV, PS
+ /* PV PS restrictions */
+ if (const_count && (sel == 254 || sel == 255)) {
+ cycle = cycle_for_bank_swizzle_scl[bank_swizzle][src];
+ if (cycle < const_count)
+ return -1;
+ }
}
return 0;
}
struct alu_bank_swizzle bs;
int bank_swizzle[5];
int i, r = 0, forced = 0;
+ boolean scalar_only = bc->chip_class == CAYMAN ? false : true;
+ int max_slots = bc->chip_class == CAYMAN ? 4 : 5;
- for (i = 0; i < 5; i++)
+ for (i = 0; i < max_slots; i++) {
if (slots[i] && slots[i]->bank_swizzle_force) {
slots[i]->bank_swizzle = slots[i]->bank_swizzle_force;
forced = 1;
}
-
+ if (i < 4 && slots[i])
+ scalar_only = false;
+ }
if (forced)
return 0;
- // just check every possible combination of bank swizzle
- // not very efficent, but works on the first try in most of the cases
+ /* Just check every possible combination of bank swizzle.
+ * Not very efficent, but works on the first try in most of the cases. */
for (i = 0; i < 4; i++)
bank_swizzle[i] = SQ_ALU_VEC_012;
bank_swizzle[4] = SQ_ALU_SCL_210;
while(bank_swizzle[4] <= SQ_ALU_SCL_221) {
- init_bank_swizzle(&bs);
- for (i = 0; i < 4; i++) {
- if (slots[i]) {
- r = check_vector(bc, slots[i], &bs, bank_swizzle[i]);
- if (r)
- break;
+
+ if (max_slots == 4) {
+ for (i = 0; i < max_slots; i++) {
+ if (bank_swizzle[i] == SQ_ALU_VEC_210)
+ return -1;
}
}
- if (!r && slots[4]) {
+ init_bank_swizzle(&bs);
+ if (scalar_only == false) {
+ for (i = 0; i < 4; i++) {
+ if (slots[i]) {
+ r = check_vector(bc, slots[i], &bs, bank_swizzle[i]);
+ if (r)
+ break;
+ }
+ }
+ } else
+ r = 0;
+
+ if (!r && slots[4] && max_slots == 5) {
r = check_scalar(bc, slots[4], &bs, bank_swizzle[4]);
}
if (!r) {
- for (i = 0; i < 5; i++) {
+ for (i = 0; i < max_slots; i++) {
if (slots[i])
slots[i]->bank_swizzle = bank_swizzle[i];
}
return 0;
}
- for (i = 0; i < 5; i++) {
- bank_swizzle[i]++;
- if (bank_swizzle[i] <= SQ_ALU_VEC_210)
- break;
- else
- bank_swizzle[i] = SQ_ALU_VEC_012;
+ if (scalar_only) {
+ bank_swizzle[4]++;
+ } else {
+ for (i = 0; i < max_slots; i++) {
+ bank_swizzle[i]++;
+ if (bank_swizzle[i] <= SQ_ALU_VEC_210)
+ break;
+ else
+ bank_swizzle[i] = SQ_ALU_VEC_012;
+ }
}
}
- // couldn't find a working swizzle
+ /* Couldn't find a working swizzle. */
return -1;
}
struct r600_bc_alu *prev[5];
int gpr[5], chan[5];
int i, j, r, src, num_src;
+ int max_slots = bc->chip_class == CAYMAN ? 4 : 5;
r = assign_alu_units(bc, alu_prev, prev);
if (r)
return r;
- for (i = 0; i < 5; ++i) {
+ for (i = 0; i < max_slots; ++i) {
if(prev[i] && prev[i]->dst.write && !prev[i]->dst.rel) {
gpr[i] = prev[i]->dst.sel;
/* cube writes more than PV.X */
gpr[i] = -1;
}
- for (i = 0; i < 5; ++i) {
+ for (i = 0; i < max_slots; ++i) {
struct r600_bc_alu *alu = slots[i];
if(!alu)
continue;
if (!is_gpr(alu->src[src].sel) || alu->src[src].rel)
continue;
- if (alu->src[src].sel == gpr[4] &&
- alu->src[src].chan == chan[4]) {
- alu->src[src].sel = V_SQ_ALU_SRC_PS;
- alu->src[src].chan = 0;
- continue;
+ if (bc->chip_class < CAYMAN) {
+ if (alu->src[src].sel == gpr[4] &&
+ alu->src[src].chan == chan[4]) {
+ alu->src[src].sel = V_SQ_ALU_SRC_PS;
+ alu->src[src].chan = 0;
+ continue;
+ }
}
for (j = 0; j < 4; ++j) {
case -1:
*sel = V_SQ_ALU_SRC_M_1_INT;
break;
- case 0x3F800000: // 1.0f
+ case 0x3F800000: /* 1.0f */
*sel = V_SQ_ALU_SRC_1;
break;
- case 0x3F000000: // 0.5f
+ case 0x3F000000: /* 0.5f */
*sel = V_SQ_ALU_SRC_0_5;
break;
- case 0xBF800000: // -1.0f
+ case 0xBF800000: /* -1.0f */
*sel = V_SQ_ALU_SRC_1;
*neg ^= 1;
break;
- case 0xBF000000: // -0.5f
+ case 0xBF000000: /* -0.5f */
*sel = V_SQ_ALU_SRC_0_5;
*neg ^= 1;
break;
int i, j, r, src, num_src;
int num_once_inst = 0;
int have_mova = 0, have_rel = 0;
+ int max_slots = bc->chip_class == CAYMAN ? 4 : 5;
r = assign_alu_units(bc, alu_prev, prev);
if (r)
return r;
- for (i = 0; i < 5; ++i) {
+ for (i = 0; i < max_slots; ++i) {
struct r600_bc_alu *alu;
/* check number of literals */
if (slots[i] && r600_bc_alu_nliterals(bc, slots[i], literal, &nliteral))
return 0;
- // let's check used slots
+ /* Let's check used slots. */
if (prev[i] && !slots[i]) {
result[i] = prev[i];
continue;
} else if (prev[i] && slots[i]) {
- if (result[4] == NULL && prev[4] == NULL && slots[4] == NULL) {
- // trans unit is still free try to use it
+ if (max_slots == 5 && result[4] == NULL && prev[4] == NULL && slots[4] == NULL) {
+ /* Trans unit is still free try to use it. */
if (is_alu_any_unit_inst(bc, slots[i])) {
result[i] = prev[i];
result[4] = slots[i];
} else
result[i] = slots[i];
- // let's check source gprs
alu = slots[i];
num_once_inst += is_alu_once_inst(bc, alu);
+ /* Let's check dst gpr. */
+ if (alu->dst.rel) {
+ if (have_mova)
+ return 0;
+ have_rel = 1;
+ }
+
+ /* Let's check source gprs */
num_src = r600_bc_get_num_operands(bc, alu);
for (src = 0; src < num_src; ++src) {
if (alu->src[src].rel) {
have_rel = 1;
}
- // constants doesn't matter
+ /* Constants don't matter. */
if (!is_gpr(alu->src[src].sel))
continue;
- for (j = 0; j < 5; ++j) {
+ for (j = 0; j < max_slots; ++j) {
if (!prev[j] || !prev[j]->dst.write)
continue;
- // if it's relative then we can't determin which gpr is really used
+ /* If it's relative then we can't determin which gpr is really used. */
if (prev[j]->dst.chan == alu->src[src].chan &&
(prev[j]->dst.sel == alu->src[src].sel ||
prev[j]->dst.rel || alu->src[src].rel))
bc->cf_last->ndw -= align(prev_nliteral, 2);
/* sort instructions */
- for (i = 0; i < 5; ++i) {
+ for (i = 0; i < max_slots; ++i) {
slots[i] = result[i];
if (result[i]) {
LIST_DEL(&result[i]->list);
LIST_ENTRY(struct r600_bc_alu, bc->cf_last->alu.prev, list)->last = 1;
/* determine new first instruction */
- for (i = 0; i < 5; ++i) {
+ for (i = 0; i < max_slots; ++i) {
if (result[i]) {
bc->cf_last->curr_bs_head = result[i];
break;
/* Collect required cache lines. */
for (i = 0; i < 3; ++i) {
- bool found = false;
+ boolean found = false;
unsigned int line;
if (alu->src[i].sel < 512)
/* Setup the kcache lines. */
for (i = 0; i < count; ++i) {
- bool found = false;
+ boolean found = false;
for (j = 0; j < 2; ++j) {
if (kcache[j].mode == V_SQ_CF_KCACHE_LOCK_2 &&
uint32_t literal[4];
unsigned nliteral;
struct r600_bc_alu *slots[5];
+ int max_slots = bc->chip_class == CAYMAN ? 4 : 5;
r = assign_alu_units(bc, bc->cf_last->curr_bs_head, slots);
if (r)
return r;
if (r)
return r;
- for (i = 0, nliteral = 0; i < 5; i++) {
+ for (i = 0, nliteral = 0; i < max_slots; i++) {
if (slots[i]) {
r = r600_bc_alu_nliterals(bc, slots[i], literal, &nliteral);
if (r)
return r600_bc_add_alu_type(bc, alu, BC_INST(bc, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU));
}
-static void r600_bc_remove_alu(struct r600_bc_cf *cf, struct r600_bc_alu *alu)
+static unsigned r600_bc_num_tex_and_vtx_instructions(const struct r600_bc *bc)
{
- if (alu->last && alu->list.prev != &cf->alu) {
- PREV_ALU(alu)->last = 1;
+ switch (bc->chip_class) {
+ case R600:
+ return 8;
+
+ case R700:
+ return 16;
+
+ case EVERGREEN:
+ case CAYMAN:
+ return 64;
+
+ default:
+ R600_ERR("Unknown chip class %d.\n", bc->chip_class);
+ return 8;
}
- LIST_DEL(&alu->list);
- free(alu);
- cf->ndw -= 2;
+}
+
+static inline boolean last_inst_was_vtx_fetch(struct r600_bc *bc)
+{
+ if (bc->chip_class == CAYMAN) {
+ if (bc->cf_last->inst != CM_V_SQ_CF_WORD1_SQ_CF_INST_TC)
+ return TRUE;
+ } else {
+ if (bc->cf_last->inst != V_SQ_CF_WORD1_SQ_CF_INST_VTX &&
+ bc->cf_last->inst != V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC)
+ return TRUE;
+ }
+ return FALSE;
}
int r600_bc_add_vtx(struct r600_bc *bc, const struct r600_bc_vtx *vtx)
/* cf can contains only alu or only vtx or only tex */
if (bc->cf_last == NULL ||
- (bc->cf_last->inst != V_SQ_CF_WORD1_SQ_CF_INST_VTX &&
- bc->cf_last->inst != V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC) ||
- bc->force_add_cf) {
+ last_inst_was_vtx_fetch(bc) ||
+ bc->force_add_cf) {
r = r600_bc_add_cf(bc);
if (r) {
free(nvtx);
return r;
}
- bc->cf_last->inst = V_SQ_CF_WORD1_SQ_CF_INST_VTX;
+ if (bc->chip_class == CAYMAN)
+ bc->cf_last->inst = CM_V_SQ_CF_WORD1_SQ_CF_INST_TC;
+ else
+ bc->cf_last->inst = V_SQ_CF_WORD1_SQ_CF_INST_VTX;
}
LIST_ADDTAIL(&nvtx->list, &bc->cf_last->vtx);
/* each fetch use 4 dwords */
bc->cf_last->ndw += 4;
bc->ndw += 4;
- if ((bc->cf_last->ndw / 4) > 7)
+ if ((bc->cf_last->ndw / 4) >= r600_bc_num_tex_and_vtx_instructions(bc))
bc->force_add_cf = 1;
return 0;
}
break;
}
}
+ /* slight hack to make gradients always go into same cf */
+ if (ntex->inst == SQ_TEX_INST_SET_GRADIENTS_H)
+ bc->force_add_cf = 1;
}
/* cf can contains only alu or only vtx or only tex */
/* each texture fetch use 4 dwords */
bc->cf_last->ndw += 4;
bc->ndw += 4;
- if ((bc->cf_last->ndw / 4) > 7)
+ if ((bc->cf_last->ndw / 4) >= r600_bc_num_tex_and_vtx_instructions(bc))
bc->force_add_cf = 1;
return 0;
}
return 0;
}
+int cm_bc_add_cf_end(struct r600_bc *bc)
+{
+ return r600_bc_add_cfinst(bc, CM_V_SQ_CF_WORD1_SQ_CF_INST_END);
+}
+
/* common to all 3 families */
static int r600_bc_vtx_build(struct r600_bc *bc, struct r600_bc_vtx *vtx, unsigned id)
{
- unsigned fetch_resource_start = 0;
-
- /* check if we are fetch shader */
- /* fetch shader can also access vertex resource,
- * first fetch shader resource is at 160
- */
- if (bc->type == -1) {
- switch (bc->chiprev) {
- /* r600 */
- case CHIPREV_R600:
- /* r700 */
- case CHIPREV_R700:
- fetch_resource_start = 160;
- break;
- /* evergreen */
- case CHIPREV_EVERGREEN:
- fetch_resource_start = 0;
- break;
- default:
- fprintf(stderr, "%s:%s:%d unknown chiprev %d\n",
- __FILE__, __func__, __LINE__, bc->chiprev);
- break;
- }
- }
- bc->bytecode[id++] = S_SQ_VTX_WORD0_BUFFER_ID(vtx->buffer_id + fetch_resource_start) |
+ bc->bytecode[id] = S_SQ_VTX_WORD0_BUFFER_ID(vtx->buffer_id) |
S_SQ_VTX_WORD0_FETCH_TYPE(vtx->fetch_type) |
S_SQ_VTX_WORD0_SRC_GPR(vtx->src_gpr) |
- S_SQ_VTX_WORD0_SRC_SEL_X(vtx->src_sel_x) |
- S_SQ_VTX_WORD0_MEGA_FETCH_COUNT(vtx->mega_fetch_count);
+ S_SQ_VTX_WORD0_SRC_SEL_X(vtx->src_sel_x);
+ if (bc->chip_class < CAYMAN)
+ bc->bytecode[id] |= S_SQ_VTX_WORD0_MEGA_FETCH_COUNT(vtx->mega_fetch_count);
+ id++;
bc->bytecode[id++] = S_SQ_VTX_WORD1_DST_SEL_X(vtx->dst_sel_x) |
S_SQ_VTX_WORD1_DST_SEL_Y(vtx->dst_sel_y) |
S_SQ_VTX_WORD1_DST_SEL_Z(vtx->dst_sel_z) |
S_SQ_VTX_WORD1_FORMAT_COMP_ALL(vtx->format_comp_all) |
S_SQ_VTX_WORD1_SRF_MODE_ALL(vtx->srf_mode_all) |
S_SQ_VTX_WORD1_GPR_DST_GPR(vtx->dst_gpr);
- bc->bytecode[id++] = S_SQ_VTX_WORD2_OFFSET(vtx->offset) |
- S_SQ_VTX_WORD2_MEGA_FETCH(1);
+ bc->bytecode[id] = S_SQ_VTX_WORD2_OFFSET(vtx->offset)|
+ S_SQ_VTX_WORD2_ENDIAN_SWAP(vtx->endian);
+ if (bc->chip_class < CAYMAN)
+ bc->bytecode[id] |= S_SQ_VTX_WORD2_MEGA_FETCH(1);
+ id++;
bc->bytecode[id++] = 0;
return 0;
}
return 0;
}
-enum cf_class
-{
- CF_CLASS_ALU,
- CF_CLASS_TEXTURE,
- CF_CLASS_VERTEX,
- CF_CLASS_EXPORT,
- CF_CLASS_OTHER
-};
-
-static enum cf_class r600_bc_cf_class(struct r600_bc_cf *cf)
+static void r600_bc_cf_vtx_build(uint32_t *bytecode, const struct r600_bc_cf *cf)
{
- switch (cf->inst) {
- case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
- case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3):
- case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3):
- case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
- return CF_CLASS_ALU;
-
- case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
- return CF_CLASS_TEXTURE;
-
- case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
- case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC:
- return CF_CLASS_VERTEX;
-
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
- return CF_CLASS_EXPORT;
-
- case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
- case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
- case V_SQ_CF_WORD1_SQ_CF_INST_POP:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
- case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
- case V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
- case V_SQ_CF_WORD1_SQ_CF_INST_NOP:
- return CF_CLASS_OTHER;
-
- default:
- R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
- return -EINVAL;
- }
+ *bytecode++ = S_SQ_CF_WORD0_ADDR(cf->addr >> 1);
+ *bytecode++ = S_SQ_CF_WORD1_CF_INST(cf->inst) |
+ S_SQ_CF_WORD1_BARRIER(1) |
+ S_SQ_CF_WORD1_COUNT((cf->ndw / 4) - 1);
}
/* common for r600/r700 - eg in eg_asm.c */
static int r600_bc_cf_build(struct r600_bc *bc, struct r600_bc_cf *cf)
{
unsigned id = cf->id;
- unsigned end_of_program = bc->cf.prev == &cf->list;
- switch (r600_bc_cf_class(cf)) {
- case CF_CLASS_ALU:
- assert(!end_of_program);
+ switch (cf->inst) {
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3):
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3):
bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) |
S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache[1].mode) |
S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache[0].addr) |
S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache[1].addr) |
- S_SQ_CF_ALU_WORD1_BARRIER(cf->barrier) |
- S_SQ_CF_ALU_WORD1_USES_WATERFALL(bc->chiprev == CHIPREV_R600 ? cf->r6xx_uses_waterfall : 0) |
- S_SQ_CF_ALU_WORD1_COUNT((cf->ndw / 2) - 1);
+ S_SQ_CF_ALU_WORD1_BARRIER(1) |
+ S_SQ_CF_ALU_WORD1_USES_WATERFALL(bc->chip_class == R600 ? cf->r6xx_uses_waterfall : 0) |
+ S_SQ_CF_ALU_WORD1_COUNT((cf->ndw / 2) - 1);
break;
- case CF_CLASS_TEXTURE:
- case CF_CLASS_VERTEX:
- bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->addr >> 1);
- bc->bytecode[id++] = S_SQ_CF_WORD1_CF_INST(cf->inst) |
- S_SQ_CF_WORD1_BARRIER(cf->barrier) |
- S_SQ_CF_WORD1_COUNT((cf->ndw / 4) - 1) |
- S_SQ_CF_WORD1_END_OF_PROGRAM(end_of_program);
+ case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
+ case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
+ case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC:
+ if (bc->chip_class == R700)
+ r700_bc_cf_vtx_build(&bc->bytecode[id], cf);
+ else
+ r600_bc_cf_vtx_build(&bc->bytecode[id], cf);
break;
- case CF_CLASS_EXPORT:
+ case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
+ case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(cf->output.swizzle_y) |
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(cf->output.swizzle_z) |
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(cf->output.swizzle_w) |
- S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) |
- S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->inst) |
- S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(end_of_program);
+ S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->output.barrier) |
+ S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->output.inst) |
+ S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->output.end_of_program);
break;
- case CF_CLASS_OTHER:
+ case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
+ case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
+ case V_SQ_CF_WORD1_SQ_CF_INST_POP:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
+ case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
+ case V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->cf_addr >> 1);
bc->bytecode[id++] = S_SQ_CF_WORD1_CF_INST(cf->inst) |
- S_SQ_CF_WORD1_BARRIER(cf->barrier) |
- S_SQ_CF_WORD1_COND(cf->cond) |
- S_SQ_CF_WORD1_POP_COUNT(cf->pop_count) |
- S_SQ_CF_WORD1_END_OF_PROGRAM(end_of_program);
+ S_SQ_CF_WORD1_BARRIER(1) |
+ S_SQ_CF_WORD1_COND(cf->cond) |
+ S_SQ_CF_WORD1_POP_COUNT(cf->pop_count);
break;
default:
return 0;
}
-struct gpr_usage_range {
- int replacement;
- int rel_block;
- int start;
- int end;
-};
-
-struct gpr_usage {
- unsigned channels:4;
- int first_write;
- int last_write[4];
- unsigned nranges;
- struct gpr_usage_range *ranges;
-};
-
-static struct gpr_usage_range* last_gpr_usage_range(struct gpr_usage *usage)
-{
- if (usage->nranges)
- return usage->ranges + usage->nranges - 1;
- else
- return NULL;
-}
-
-static struct gpr_usage_range* add_gpr_usage_range(struct gpr_usage *usage)
-{
- struct gpr_usage_range *range;
-
- usage->nranges++;
- usage->ranges = realloc(usage->ranges, usage->nranges * sizeof(struct gpr_usage_range));
- if (!usage->ranges)
- return NULL;
-
- range = last_gpr_usage_range(usage);
- range->replacement = -1; /* no prefered replacement */
- range->rel_block = -1;
- range->start = -1;
- range->end = -1;
-
- return range;
-}
-
-static void notice_gpr_read(struct gpr_usage *usage, int id, unsigned chan)
-{
- struct gpr_usage_range* range;
-
- usage->channels |= 1 << chan;
- usage->first_write = -1;
- if (!usage->nranges) {
- range = add_gpr_usage_range(usage);
- } else
- range = last_gpr_usage_range(usage);
-
- if (range && range->end < id)
- range->end = id;
-}
-
-static void notice_gpr_rel_read(struct r600_bc *bc, struct gpr_usage usage[128],
- int id, unsigned gpr, unsigned chan)
-{
- unsigned i;
- for (i = gpr; i < bc->ngpr; ++i)
- notice_gpr_read(&usage[i], id, chan);
-
- last_gpr_usage_range(&usage[gpr])->rel_block = bc->ngpr - gpr;
-}
-
-static void notice_gpr_last_write(struct gpr_usage *usage, int id, unsigned chan)
-{
- usage->last_write[chan] = id;
-}
-
-static void notice_gpr_write(struct gpr_usage *usage, int id, unsigned chan,
- int predicate, int prefered_replacement)
-{
- struct gpr_usage_range* last_range = last_gpr_usage_range(usage);
- int start = usage->first_write != -1 ? usage->first_write : id;
- usage->channels &= ~(1 << chan);
- if (usage->channels) {
- if (usage->first_write == -1)
- usage->first_write = id;
- } else if (!last_range || (last_range->start != start && !predicate)) {
- usage->first_write = start;
- struct gpr_usage_range* range = add_gpr_usage_range(usage);
- range->replacement = prefered_replacement;
- range->start = start;
- } else if (last_range->start == start && prefered_replacement != -1) {
- last_range->replacement = prefered_replacement;
- }
- notice_gpr_last_write(usage, id, chan);
-}
-
-static void notice_gpr_rel_last_write(struct gpr_usage usage[128], int id, unsigned chan)
-{
- unsigned i;
- for (i = 0; i < 128; ++i)
- notice_gpr_last_write(&usage[i], id, chan);
-}
-
-static void notice_gpr_rel_write(struct gpr_usage usage[128], int id, unsigned chan)
-{
- unsigned i;
- for (i = 0; i < 128; ++i)
- notice_gpr_write(&usage[i], id, chan, 1, -1);
-}
-
-static void notice_alu_src_gprs(struct r600_bc *bc, struct r600_bc_alu *alu,
- struct gpr_usage usage[128], int id)
-{
- unsigned src, num_src;
-
- num_src = r600_bc_get_num_operands(bc, alu);
- for (src = 0; src < num_src; ++src) {
- // constants doesn't matter
- if (!is_gpr(alu->src[src].sel))
- continue;
-
- if (alu->src[src].rel)
- notice_gpr_rel_read(bc, usage, id, alu->src[src].sel, alu->src[src].chan);
- else
- notice_gpr_read(&usage[alu->src[src].sel], id, alu->src[src].chan);
- }
-}
-
-static void notice_alu_dst_gprs(struct r600_bc_alu *alu_first, struct gpr_usage usage[128],
- int id, int predicate)
-{
- struct r600_bc_alu *alu;
- for (alu = alu_first; alu; alu = LIST_ENTRY(struct r600_bc_alu, alu->list.next, list)) {
- if (alu->dst.write) {
- if (alu->dst.rel)
- notice_gpr_rel_write(usage, id, alu->dst.chan);
- else if (alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV && is_gpr(alu->src[0].sel))
- notice_gpr_write(&usage[alu->dst.sel], id, alu->dst.chan,
- predicate, alu->src[0].sel);
- else
- notice_gpr_write(&usage[alu->dst.sel], id, alu->dst.chan, predicate, -1);
- }
-
- if (alu->last)
- break;
- }
-}
-
-static void notice_tex_gprs(struct r600_bc *bc, struct r600_bc_tex *tex,
- struct gpr_usage usage[128],
- int id, int predicate)
-{
- if (tex->src_rel) {
- if (tex->src_sel_x < 4)
- notice_gpr_rel_read(bc, usage, id, tex->src_gpr, tex->src_sel_x);
- if (tex->src_sel_y < 4)
- notice_gpr_rel_read(bc, usage, id, tex->src_gpr, tex->src_sel_y);
- if (tex->src_sel_z < 4)
- notice_gpr_rel_read(bc, usage, id, tex->src_gpr, tex->src_sel_z);
- if (tex->src_sel_w < 4)
- notice_gpr_rel_read(bc, usage, id, tex->src_gpr, tex->src_sel_w);
- } else {
- if (tex->src_sel_x < 4)
- notice_gpr_read(&usage[tex->src_gpr], id, tex->src_sel_x);
- if (tex->src_sel_y < 4)
- notice_gpr_read(&usage[tex->src_gpr], id, tex->src_sel_y);
- if (tex->src_sel_z < 4)
- notice_gpr_read(&usage[tex->src_gpr], id, tex->src_sel_z);
- if (tex->src_sel_w < 4)
- notice_gpr_read(&usage[tex->src_gpr], id, tex->src_sel_w);
- }
- if (tex->dst_rel) {
- if (tex->dst_sel_x != 7)
- notice_gpr_rel_write(usage, id, 0);
- if (tex->dst_sel_y != 7)
- notice_gpr_rel_write(usage, id, 1);
- if (tex->dst_sel_z != 7)
- notice_gpr_rel_write(usage, id, 2);
- if (tex->dst_sel_w != 7)
- notice_gpr_rel_write(usage, id, 3);
- } else {
- if (tex->dst_sel_x != 7)
- notice_gpr_write(&usage[tex->dst_gpr], id, 0, predicate, -1);
- if (tex->dst_sel_y != 7)
- notice_gpr_write(&usage[tex->dst_gpr], id, 1, predicate, -1);
- if (tex->dst_sel_z != 7)
- notice_gpr_write(&usage[tex->dst_gpr], id, 2, predicate, -1);
- if (tex->dst_sel_w != 7)
- notice_gpr_write(&usage[tex->dst_gpr], id, 3, predicate, -1);
- }
-}
-
-static void notice_vtx_gprs(struct r600_bc_vtx *vtx, struct gpr_usage usage[128],
- int id, int predicate)
-{
- notice_gpr_read(&usage[vtx->src_gpr], id, vtx->src_sel_x);
-
- if (vtx->dst_sel_x != 7)
- notice_gpr_write(&usage[vtx->dst_gpr], id, 0, predicate, -1);
- if (vtx->dst_sel_y != 7)
- notice_gpr_write(&usage[vtx->dst_gpr], id, 1, predicate, -1);
- if (vtx->dst_sel_z != 7)
- notice_gpr_write(&usage[vtx->dst_gpr], id, 2, predicate, -1);
- if (vtx->dst_sel_w != 7)
- notice_gpr_write(&usage[vtx->dst_gpr], id, 3, predicate, -1);
-}
-
-static void notice_export_gprs(struct r600_bc_cf *cf, struct gpr_usage usage[128],
- struct r600_bc_cf *export_cf[128], int export_remap[128])
-{
- //TODO handle other memory operations
- struct gpr_usage *output = &usage[cf->output.gpr];
- int id = MAX4(output->last_write[0], output->last_write[1],
- output->last_write[2], output->last_write[3]);
- id += 0x100;
- id &= ~0xFF;
-
- export_cf[cf->output.gpr] = cf;
- export_remap[cf->output.gpr] = id;
- if (cf->output.swizzle_x < 4)
- notice_gpr_read(output, id, cf->output.swizzle_x);
- if (cf->output.swizzle_y < 4)
- notice_gpr_read(output, id, cf->output.swizzle_y);
- if (cf->output.swizzle_z < 4)
- notice_gpr_read(output, id, cf->output.swizzle_z);
- if (cf->output.swizzle_w < 4)
- notice_gpr_read(output, id, cf->output.swizzle_w);
-}
-
-static struct gpr_usage_range *find_src_range(struct gpr_usage *usage, int id)
-{
- unsigned i;
- for (i = 0; i < usage->nranges; ++i) {
- struct gpr_usage_range* range = &usage->ranges[i];
-
- if (range->start < id && id <= range->end)
- return range;
- }
- return NULL;
-}
-
-static struct gpr_usage_range *find_dst_range(struct gpr_usage *usage, int id)
-{
- unsigned i;
- for (i = 0; i < usage->nranges; ++i) {
- struct gpr_usage_range* range = &usage->ranges[i];
- int end = range->end;
-
- if (range->start <= id && (id < end || end == -1))
- return range;
- }
- return NULL;
-}
-
-static int is_barrier_needed(struct gpr_usage *usage, int id, unsigned chan, int last_barrier)
-{
- if (usage->last_write[chan] != (id & ~0xFF))
- return usage->last_write[chan] >= last_barrier;
- else
- return 0;
-}
-
-static int is_intersection(struct gpr_usage_range* a, struct gpr_usage_range* b)
-{
- return a->start <= b->end && b->start < a->end;
-}
-
-static int rate_replacement(struct gpr_usage usage[128], unsigned current, unsigned gpr,
- struct gpr_usage_range* range)
-{
- int max_gpr = gpr + MAX2(range->rel_block, 1);
- int best_start = 0x3FFFFFFF, best_end = 0x3FFFFFFF;
- unsigned i;
-
- for (; gpr < max_gpr; ++gpr) {
-
- if (gpr >= 128) /* relative gpr block won't fit into clause temporaries */
- return -1; /* forget it */
-
- if (gpr == current) /* ignore ranges of to be replaced register */
- continue;
-
- for (i = 0; i < usage[gpr].nranges; ++i) {
- if (usage[gpr].ranges[i].replacement < gpr)
- continue; /* ignore already remapped ranges */
-
- if (is_intersection(&usage[gpr].ranges[i], range))
- return -1; /* forget it if usages overlap */
-
- if (range->start >= usage[gpr].ranges[i].end)
- best_start = MIN2(best_start, range->start - usage[gpr].ranges[i].end);
-
- if (range->end != -1 && range->end <= usage[gpr].ranges[i].start)
- best_end = MIN2(best_end, usage[gpr].ranges[i].start - range->end);
- }
- }
- return best_start + best_end;
-}
-
-static void find_replacement(struct gpr_usage usage[128], unsigned current,
- struct gpr_usage_range *range)
-{
- unsigned i, j;
- int best_gpr = -1, best_rate = 0x7FFFFFFF;
-
- if (range->replacement == current)
- return; /* register prefers to be not remapped */
-
- if (range->replacement != -1 && range->replacement <= current) {
- struct gpr_usage_range *other = find_src_range(&usage[range->replacement], range->start);
- if (other && other->replacement != -1)
- range->replacement = other->replacement;
- }
-
- if (range->replacement != -1 && range->replacement < current) {
- int rate = rate_replacement(usage, current, range->replacement, range);
-
- /* check if prefered replacement can be used */
- if (rate != -1) {
- best_rate = rate;
- best_gpr = range->replacement;
- }
- }
-
- if (best_gpr == -1 && (range->start & ~0xFF) == (range->end & ~0xFF)) {
- /* register is just used inside one ALU clause */
- /* try to use clause temporaries for it */
- for (i = 127; i > 123; --i) {
- int rate = rate_replacement(usage, current, i, range);
-
- if (rate == -1) /* can't be used because ranges overlap */
- continue;
-
- if (rate < best_rate) {
- best_rate = rate;
- best_gpr = i;
-
- /* can't get better than this */
- if (rate == 0)
- break;
- }
- }
- }
-
- if (best_gpr == -1) {
- for (i = 0; i < current; ++i) {
- int rate = rate_replacement(usage, current, i, range);
-
- if (rate == -1) /* can't be used because ranges overlap */
- continue;
-
- if (rate < best_rate) {
- best_rate = rate;
- best_gpr = i;
-
- /* can't get better than this */
- if (rate == 0)
- break;
- }
- }
- }
-
- if (best_gpr != -1) {
- struct gpr_usage_range *reservation = add_gpr_usage_range(&usage[best_gpr]);
- reservation->replacement = best_gpr;
- reservation->rel_block = -1;
- reservation->start = range->start;
- reservation->end = range->end;
- } else
- best_gpr = current;
-
- range->replacement = best_gpr;
- if (range->rel_block == -1)
- return; /* no relative block to handle we are done here */
-
- /* set prefered register for the whole relative register block */
- for (i = current + 1, ++best_gpr; i < current + range->rel_block; ++i, ++best_gpr) {
- for (j = 0; j < usage[i].nranges; ++j) {
- if (is_intersection(&usage[i].ranges[j], range))
- usage[i].ranges[j].replacement = best_gpr;
- }
- }
-}
-
-static void replace_alu_gprs(struct r600_bc *bc, struct r600_bc_alu *alu, struct gpr_usage usage[128],
- int id, int last_barrier, unsigned *barrier)
-{
- struct gpr_usage *cur_usage;
- struct gpr_usage_range *range;
- unsigned src, num_src;
-
- num_src = r600_bc_get_num_operands(bc, alu);
- for (src = 0; src < num_src; ++src) {
- // constants doesn't matter
- if (!is_gpr(alu->src[src].sel))
- continue;
-
- cur_usage = &usage[alu->src[src].sel];
- range = find_src_range(cur_usage, id);
- alu->src[src].sel = range->replacement;
-
- *barrier |= is_barrier_needed(cur_usage, id, alu->src[src].chan, last_barrier);
- }
-
- if (alu->dst.write) {
- cur_usage = &usage[alu->dst.sel];
- range = find_dst_range(cur_usage, id);
- if (!range || range->replacement == -1) {
- if (!alu->is_op3)
- alu->dst.write = 0;
- else
- /*TODO: really check that register 123 is useable */
- alu->dst.sel = 123;
- } else {
- alu->dst.sel = range->replacement;
- *barrier |= is_barrier_needed(cur_usage, id, alu->dst.chan, last_barrier);
- }
- }
- if (alu->dst.write) {
- if (alu->dst.rel)
- notice_gpr_rel_last_write(usage, id, alu->dst.chan);
- else
- notice_gpr_last_write(cur_usage, id, alu->dst.chan);
- }
-}
-
-static void replace_tex_gprs(struct r600_bc_tex *tex, struct gpr_usage usage[128],
- int id, int last_barrier, unsigned *barrier)
-{
- struct gpr_usage *cur_usage = &usage[tex->src_gpr];
- struct gpr_usage_range *range = find_src_range(cur_usage, id);
-
- if (tex->src_rel) {
- *barrier = 1;
- } else {
- if (tex->src_sel_x < 4)
- *barrier |= is_barrier_needed(cur_usage, id, tex->src_sel_x, last_barrier);
- if (tex->src_sel_y < 4)
- *barrier |= is_barrier_needed(cur_usage, id, tex->src_sel_y, last_barrier);
- if (tex->src_sel_z < 4)
- *barrier |= is_barrier_needed(cur_usage, id, tex->src_sel_z, last_barrier);
- if (tex->src_sel_w < 4)
- *barrier |= is_barrier_needed(cur_usage, id, tex->src_sel_w, last_barrier);
- }
- tex->src_gpr = range->replacement;
-
- cur_usage = &usage[tex->dst_gpr];
-
- range = find_dst_range(cur_usage, id);
- if (range) {
- tex->dst_gpr = range->replacement;
-
- if (tex->dst_rel) {
- if (tex->dst_sel_x != 7)
- notice_gpr_rel_last_write(usage, id, tex->dst_sel_x);
- if (tex->dst_sel_y != 7)
- notice_gpr_rel_last_write(usage, id, tex->dst_sel_y);
- if (tex->dst_sel_z != 7)
- notice_gpr_rel_last_write(usage, id, tex->dst_sel_z);
- if (tex->dst_sel_w != 7)
- notice_gpr_rel_last_write(usage, id, tex->dst_sel_w);
- } else {
- if (tex->dst_sel_x != 7)
- notice_gpr_last_write(cur_usage, id, tex->dst_sel_x);
- if (tex->dst_sel_y != 7)
- notice_gpr_last_write(cur_usage, id, tex->dst_sel_y);
- if (tex->dst_sel_z != 7)
- notice_gpr_last_write(cur_usage, id, tex->dst_sel_z);
- if (tex->dst_sel_w != 7)
- notice_gpr_last_write(cur_usage, id, tex->dst_sel_w);
- }
- } else {
- tex->dst_gpr = 123;
- }
-}
-
-static void replace_vtx_gprs(struct r600_bc_vtx *vtx, struct gpr_usage usage[128],
- int id, int last_barrier, unsigned *barrier)
-{
- struct gpr_usage *cur_usage = &usage[vtx->src_gpr];
- struct gpr_usage_range *range = find_src_range(cur_usage, id);
-
- *barrier |= is_barrier_needed(cur_usage, id, vtx->src_sel_x, last_barrier);
-
- vtx->src_gpr = range->replacement;
-
- cur_usage = &usage[vtx->dst_gpr];
- range = find_dst_range(cur_usage, id);
- if (range) {
- vtx->dst_gpr = range->replacement;
-
- if (vtx->dst_sel_x != 7)
- notice_gpr_last_write(cur_usage, id, vtx->dst_sel_x);
- if (vtx->dst_sel_y != 7)
- notice_gpr_last_write(cur_usage, id, vtx->dst_sel_y);
- if (vtx->dst_sel_z != 7)
- notice_gpr_last_write(cur_usage, id, vtx->dst_sel_z);
- if (vtx->dst_sel_w != 7)
- notice_gpr_last_write(cur_usage, id, vtx->dst_sel_w);
- } else {
- vtx->dst_gpr = 123;
- }
-}
-
-static void replace_export_gprs(struct r600_bc_cf *cf, struct gpr_usage usage[128],
- int id, int last_barrier)
-{
- //TODO handle other memory operations
- struct gpr_usage *cur_usage = &usage[cf->output.gpr];
- struct gpr_usage_range *range = find_src_range(cur_usage, id);
-
- cf->barrier = 0;
- if (cf->output.swizzle_x < 4)
- cf->barrier |= is_barrier_needed(cur_usage, -1, cf->output.swizzle_x, last_barrier);
- if (cf->output.swizzle_y < 4)
- cf->barrier |= is_barrier_needed(cur_usage, -1, cf->output.swizzle_y, last_barrier);
- if (cf->output.swizzle_z < 4)
- cf->barrier |= is_barrier_needed(cur_usage, -1, cf->output.swizzle_z, last_barrier);
- if (cf->output.swizzle_w < 4)
- cf->barrier |= is_barrier_needed(cur_usage, -1, cf->output.swizzle_w, last_barrier);
-
- cf->output.gpr = range->replacement;
-}
-
-static void optimize_alu_inst(struct r600_bc *bc, struct r600_bc_cf *cf, struct r600_bc_alu *alu)
-{
- struct r600_bc_alu *alu_next;
- unsigned chan;
- unsigned src, num_src;
-
- /* check if a MOV could be optimized away */
- if (alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV) {
-
- /* destination equals source? */
- if (alu->dst.sel != alu->src[0].sel ||
- alu->dst.chan != alu->src[0].chan)
- return;
-
- /* any special handling for the source? */
- if (alu->src[0].rel || alu->src[0].neg || alu->src[0].abs)
- return;
-
- /* any special handling for destination? */
- if (alu->dst.rel || alu->dst.clamp)
- return;
-
- /* ok find next instruction group and check if ps/pv is used */
- for (alu_next = alu; !alu_next->last; alu_next = NEXT_ALU(alu_next));
-
- if (alu_next->list.next != &cf->alu) {
- chan = is_alu_reduction_inst(bc, alu) ? 0 : alu->dst.chan;
- for (alu_next = NEXT_ALU(alu_next); alu_next; alu_next = NEXT_ALU(alu_next)) {
- num_src = r600_bc_get_num_operands(bc, alu_next);
- for (src = 0; src < num_src; ++src) {
- if (alu_next->src[src].sel == V_SQ_ALU_SRC_PV &&
- alu_next->src[src].chan == chan)
- return;
-
- if (alu_next->src[src].sel == V_SQ_ALU_SRC_PS)
- return;
- }
-
- if (alu_next->last)
- break;
- }
- }
-
- r600_bc_remove_alu(cf, alu);
- }
-}
-
-static void optimize_export_inst(struct r600_bc *bc, struct r600_bc_cf *cf)
-{
- struct r600_bc_cf *prev = LIST_ENTRY(struct r600_bc_cf, cf->list.prev, list);
- if (&prev->list == &bc->cf ||
- prev->inst != cf->inst ||
- prev->output.type != cf->output.type ||
- prev->output.elem_size != cf->output.elem_size ||
- prev->output.swizzle_x != cf->output.swizzle_x ||
- prev->output.swizzle_y != cf->output.swizzle_y ||
- prev->output.swizzle_z != cf->output.swizzle_z ||
- prev->output.swizzle_w != cf->output.swizzle_w)
- return;
-
- if ((prev->output.burst_count + cf->output.burst_count) > 16)
- return;
-
- if ((prev->output.gpr + prev->output.burst_count) == cf->output.gpr &&
- (prev->output.array_base + prev->output.burst_count) == cf->output.array_base) {
-
- prev->output.burst_count += cf->output.burst_count;
- r600_bc_remove_cf(bc, cf);
-
- } else if (prev->output.gpr == (cf->output.gpr + cf->output.burst_count) &&
- prev->output.array_base == (cf->output.array_base + cf->output.burst_count)) {
-
- cf->output.burst_count += prev->output.burst_count;
- r600_bc_remove_cf(bc, prev);
- }
-}
-
-static void r600_bc_optimize(struct r600_bc *bc)
-{
- struct r600_bc_cf *cf, *next_cf;
- struct r600_bc_alu *first, *next_alu;
- struct r600_bc_alu *alu;
- struct r600_bc_vtx *vtx;
- struct r600_bc_tex *tex;
- struct gpr_usage usage[128];
-
- /* assume that each gpr is exported only once */
- struct r600_bc_cf *export_cf[128] = { NULL };
- int export_remap[128];
-
- int id, cond_start, barrier[bc->nstack];
- unsigned i, j, stack, predicate, old_stack;
-
- memset(&usage, 0, sizeof(usage));
- for (i = 0; i < 128; ++i) {
- usage[i].first_write = -1;
- usage[i].last_write[0] = -1;
- usage[i].last_write[1] = -1;
- usage[i].last_write[2] = -1;
- usage[i].last_write[3] = -1;
- }
-
- /* first gather some informations about the gpr usage */
- id = 0; stack = 0;
- LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
- old_stack = stack;
- if (stack == 0)
- cond_start = stack;
-
- switch (r600_bc_cf_class(cf)) {
- case CF_CLASS_ALU:
- predicate = 0;
- first = NULL;
- LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) {
- if (!first)
- first = alu;
- notice_alu_src_gprs(bc, alu, usage, id);
- if (alu->last) {
- notice_alu_dst_gprs(first, usage, id, predicate || stack > 0);
- first = NULL;
- ++id;
- }
- if (is_alu_pred_inst(bc, alu))
- predicate++;
- }
- if (cf->inst == V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3)
- stack += predicate;
- else if (cf->inst == V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3)
- stack -= 1;
- else if (cf->inst == V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3)
- stack -= 2;
- break;
- case CF_CLASS_TEXTURE:
- LIST_FOR_EACH_ENTRY(tex, &cf->tex, list) {
- notice_tex_gprs(bc, tex, usage, id++, stack > 0);
- }
- break;
- case CF_CLASS_VERTEX:
- LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) {
- notice_vtx_gprs(vtx, usage, id++, stack > 0);
- }
- break;
- case CF_CLASS_EXPORT:
- notice_export_gprs(cf, usage, export_cf, export_remap);
- continue; // don't increment id
- case CF_CLASS_OTHER:
- switch (cf->inst) {
- case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
- case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
- case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
- break;
-
- case V_SQ_CF_WORD1_SQ_CF_INST_POP:
- stack -= cf->pop_count;
- break;
-
- default:
- // TODO implement loop handling
- goto out;
- }
- }
-
- /* extend last_write after conditional block */
- if (stack == 0 && old_stack != 0)
- for (i = 0; i < 128; ++i)
- for (j = 0; j < 4; ++j)
- if (usage[i].last_write[j] >= cond_start)
- usage[i].last_write[j] = id;
-
- id += 0x100;
- id &= ~0xFF;
- }
- assert(stack == 0);
-
- /* try to optimize gpr usage */
- for (i = 0; i < 124; ++i) {
- for (j = 0; j < usage[i].nranges; ++j) {
- struct gpr_usage_range *range = &usage[i].ranges[j];
- if (range->start == -1)
- /* can't rearange shader inputs */
- range->replacement = i;
- else if (range->end == -1)
- /* gpr isn't used any more after this instruction */
- range->replacement = -1;
- else
- find_replacement(usage, i, range);
-
- if (range->replacement == i)
- bc->ngpr = i;
- else if (range->replacement < i && range->replacement > bc->ngpr)
- bc->ngpr = range->replacement;
- }
- }
- bc->ngpr++;
-
- /* apply the changes */
- for (i = 0; i < 128; ++i) {
- usage[i].last_write[0] = -1;
- usage[i].last_write[1] = -1;
- usage[i].last_write[2] = -1;
- usage[i].last_write[3] = -1;
- }
- barrier[0] = 0;
- id = 0; stack = 0;
- LIST_FOR_EACH_ENTRY_SAFE(cf, next_cf, &bc->cf, list) {
- old_stack = stack;
- switch (r600_bc_cf_class(cf)) {
- case CF_CLASS_ALU:
- predicate = 0;
- first = NULL;
- cf->barrier = 0;
- LIST_FOR_EACH_ENTRY_SAFE(alu, next_alu, &cf->alu, list) {
- replace_alu_gprs(bc, alu, usage, id, barrier[stack], &cf->barrier);
- if (alu->last)
- ++id;
-
- if (is_alu_pred_inst(bc, alu))
- predicate++;
-
- if (cf->inst == V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3)
- optimize_alu_inst(bc, cf, alu);
- }
- if (cf->inst == V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3)
- stack += predicate;
- else if (cf->inst == V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3)
- stack -= 1;
- else if (cf->inst == V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3)
- stack -= 2;
- if (LIST_IS_EMPTY(&cf->alu)) {
- r600_bc_remove_cf(bc, cf);
- cf = NULL;
- }
- break;
- case CF_CLASS_TEXTURE:
- cf->barrier = 0;
- LIST_FOR_EACH_ENTRY(tex, &cf->tex, list) {
- replace_tex_gprs(tex, usage, id++, barrier[stack], &cf->barrier);
- }
- break;
- case CF_CLASS_VERTEX:
- cf->barrier = 0;
- LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) {
- replace_vtx_gprs(vtx, usage, id++, barrier[stack], &cf->barrier);
- }
- break;
- case CF_CLASS_EXPORT:
- continue; // don't increment id
- case CF_CLASS_OTHER:
- if (cf->inst == V_SQ_CF_WORD1_SQ_CF_INST_POP) {
- cf->barrier = 0;
- stack -= cf->pop_count;
- }
- break;
- }
-
- id &= ~0xFF;
- if (cf && cf->barrier)
- barrier[old_stack] = id;
-
- for (i = old_stack + 1; i <= stack; ++i)
- barrier[i] = barrier[old_stack];
-
- id += 0x100;
- if (stack != 0) /* ensure exports are placed outside of conditional blocks */
- continue;
-
- for (i = 0; i < 128; ++i) {
- if (!export_cf[i] || id < export_remap[i])
- continue;
-
- r600_bc_move_cf(bc, export_cf[i], next_cf);
- replace_export_gprs(export_cf[i], usage, export_remap[i], barrier[stack]);
- if (export_cf[i]->barrier)
- barrier[stack] = id - 1;
- next_cf = LIST_ENTRY(struct r600_bc_cf, export_cf[i]->list.next, list);
- optimize_export_inst(bc, export_cf[i]);
- export_cf[i] = NULL;
- }
- }
- assert(stack == 0);
-
-out:
- for (i = 0; i < 128; ++i) {
- free(usage[i].ranges);
- }
-}
-
int r600_bc_build(struct r600_bc *bc)
{
struct r600_bc_cf *cf;
struct r600_bc_alu *alu;
struct r600_bc_vtx *vtx;
struct r600_bc_tex *tex;
- struct r600_bc_cf *exports[4] = { NULL };
uint32_t literal[4];
unsigned nliteral;
unsigned addr;
bc->nstack = 1;
}
- //r600_bc_optimize(bc);
-
/* first path compute addr of each CF block */
/* addr start after all the CF instructions */
- addr = LIST_ENTRY(struct r600_bc_cf, bc->cf.prev, list)->id + 2;
+ addr = bc->cf_last->id + 2;
LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
- switch (r600_bc_cf_class(cf)) {
- case CF_CLASS_ALU:
+ switch (cf->inst) {
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3):
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3):
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
break;
- case CF_CLASS_TEXTURE:
- case CF_CLASS_VERTEX:
+ case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
+ case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
+ case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC:
/* fetch node need to be 16 bytes aligned*/
addr += 3;
addr &= 0xFFFFFFFCUL;
break;
- case CF_CLASS_EXPORT:
- if (cf->inst == BC_INST(bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT))
- exports[cf->output.type] = cf;
+ case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
+ case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
+ case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
+ case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
break;
- case CF_CLASS_OTHER:
+ case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
+ case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
+ case V_SQ_CF_WORD1_SQ_CF_INST_POP:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
+ case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
+ case V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
+ case CM_V_SQ_CF_WORD1_SQ_CF_INST_END:
break;
default:
R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
addr += cf->ndw;
bc->ndw = cf->addr + cf->ndw;
}
-
- /* set export done on last export of each type */
- for (i = 0; i < 4; ++i) {
- if (exports[i]) {
- exports[i]->inst = BC_INST(bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE);
- }
- }
-
free(bc->bytecode);
bc->bytecode = calloc(1, bc->ndw * 4);
if (bc->bytecode == NULL)
return -ENOMEM;
LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
addr = cf->addr;
- if (bc->chiprev == CHIPREV_EVERGREEN)
+ if (bc->chip_class >= EVERGREEN)
r = eg_bc_cf_build(bc, cf);
else
r = r600_bc_cf_build(bc, cf);
if (r)
return r;
- switch (r600_bc_cf_class(cf)) {
- case CF_CLASS_ALU:
+ switch (cf->inst) {
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3):
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3):
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
nliteral = 0;
memset(literal, 0, sizeof(literal));
LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) {
if (r)
return r;
r600_bc_alu_adjust_literals(bc, alu, literal, nliteral);
- switch(bc->chiprev) {
- case CHIPREV_R600:
+ switch(bc->chip_class) {
+ case R600:
r = r600_bc_alu_build(bc, alu, addr);
break;
- case CHIPREV_R700:
- case CHIPREV_EVERGREEN: /* eg alu is same encoding as r700 */
+ case R700:
+ case EVERGREEN: /* eg alu is same encoding as r700 */
+ case CAYMAN: /* eg alu is same encoding as r700 */
r = r700_bc_alu_build(bc, alu, addr);
break;
default:
- R600_ERR("unknown family %d\n", bc->family);
+ R600_ERR("unknown chip class %d.\n", bc->chip_class);
return -EINVAL;
}
if (r)
}
}
break;
- case CF_CLASS_VERTEX:
+ case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
+ case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC:
LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) {
r = r600_bc_vtx_build(bc, vtx, addr);
if (r)
addr += 4;
}
break;
- case CF_CLASS_TEXTURE:
+ case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
+ if (bc->chip_class == CAYMAN) {
+ LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) {
+ r = r600_bc_vtx_build(bc, vtx, addr);
+ if (r)
+ return r;
+ addr += 4;
+ }
+ }
LIST_FOR_EACH_ENTRY(tex, &cf->tex, list) {
r = r600_bc_tex_build(bc, tex, addr);
if (r)
addr += 4;
}
break;
- case CF_CLASS_EXPORT:
- case CF_CLASS_OTHER:
+ case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
+ case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
+ case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
+ case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
+ case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
+ case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
+ case V_SQ_CF_WORD1_SQ_CF_INST_POP:
+ case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
+ case V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
+ case CM_V_SQ_CF_WORD1_SQ_CF_INST_END:
break;
default:
R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
unsigned nliteral;
char chip = '6';
- switch (bc->chiprev) {
- case 1:
+ switch (bc->chip_class) {
+ case R700:
chip = '7';
break;
- case 2:
+ case EVERGREEN:
chip = 'E';
break;
- case 0:
+ case CAYMAN:
+ chip = 'C';
+ break;
+ case R600:
default:
chip = '6';
break;
LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
id = cf->id;
- switch (r600_bc_cf_class(cf)) {
- case CF_CLASS_ALU:
+ switch (cf->inst) {
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3):
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3):
+ case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
- fprintf(stderr, "ADDR:%04d ", cf->addr);
+ fprintf(stderr, "ADDR:%d ", cf->addr);
fprintf(stderr, "KCACHE_MODE0:%X ", cf->kcache[0].mode);
fprintf(stderr, "KCACHE_BANK0:%X ", cf->kcache[0].bank);
fprintf(stderr, "KCACHE_BANK1:%X\n", cf->kcache[1].bank);
fprintf(stderr, "KCACHE_MODE1:%X ", cf->kcache[1].mode);
fprintf(stderr, "KCACHE_ADDR0:%X ", cf->kcache[0].addr);
fprintf(stderr, "KCACHE_ADDR1:%X ", cf->kcache[1].addr);
- fprintf(stderr, "BARRIER:%d ", cf->barrier);
fprintf(stderr, "COUNT:%d\n", cf->ndw / 2);
break;
- case CF_CLASS_TEXTURE:
- case CF_CLASS_VERTEX:
+ case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
+ case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
+ case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC:
fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]);
- fprintf(stderr, "ADDR:%04d\n", cf->addr);
+ fprintf(stderr, "ADDR:%d\n", cf->addr);
id++;
fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]);
fprintf(stderr, "INST:%d ", cf->inst);
- fprintf(stderr, "BARRIER:%d ", cf->barrier);
fprintf(stderr, "COUNT:%d\n", cf->ndw / 4);
break;
- case CF_CLASS_EXPORT:
+ case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
+ case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
+ case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
+ case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]);
- fprintf(stderr, "GPR:%d ", cf->output.gpr);
+ fprintf(stderr, "GPR:%X ", cf->output.gpr);
fprintf(stderr, "ELEM_SIZE:%X ", cf->output.elem_size);
fprintf(stderr, "ARRAY_BASE:%X ", cf->output.array_base);
fprintf(stderr, "TYPE:%X\n", cf->output.type);
fprintf(stderr, "SWIZ_Y:%X ", cf->output.swizzle_y);
fprintf(stderr, "SWIZ_Z:%X ", cf->output.swizzle_z);
fprintf(stderr, "SWIZ_W:%X ", cf->output.swizzle_w);
- fprintf(stderr, "BARRIER:%d ", cf->barrier);
- fprintf(stderr, "INST:%d ", cf->inst);
- fprintf(stderr, "BURST_COUNT:%d\n", cf->output.burst_count);
+ fprintf(stderr, "BARRIER:%X ", cf->output.barrier);
+ fprintf(stderr, "INST:%d ", cf->output.inst);
+ fprintf(stderr, "BURST_COUNT:%d ", cf->output.burst_count);
+ fprintf(stderr, "EOP:%X\n", cf->output.end_of_program);
break;
- case CF_CLASS_OTHER:
+ case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
+ case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
+ case V_SQ_CF_WORD1_SQ_CF_INST_POP:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
+ case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
+ case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
+ case V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
+ case CM_V_SQ_CF_WORD1_SQ_CF_INST_END:
fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]);
- fprintf(stderr, "ADDR:%04d\n", cf->cf_addr);
+ fprintf(stderr, "ADDR:%d\n", cf->cf_addr);
id++;
fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]);
fprintf(stderr, "INST:%d ", cf->inst);
fprintf(stderr, "COND:%X ", cf->cond);
- fprintf(stderr, "BARRIER:%d ", cf->barrier);
fprintf(stderr, "POP_COUNT:%X\n", cf->pop_count);
break;
}
fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]);
fprintf(stderr, "SRC(GPR:%d ", vtx->src_gpr);
fprintf(stderr, "SEL_X:%d) ", vtx->src_sel_x);
- fprintf(stderr, "MEGA_FETCH_COUNT:%d ", vtx->mega_fetch_count);
+ if (bc->chip_class < CAYMAN)
+ fprintf(stderr, "MEGA_FETCH_COUNT:%d ", vtx->mega_fetch_count);
+ else
+ fprintf(stderr, "SEL_Y:%d) ", 0);
fprintf(stderr, "DST(GPR:%d ", vtx->dst_gpr);
fprintf(stderr, "SEL_X:%d ", vtx->dst_sel_x);
fprintf(stderr, "SEL_Y:%d ", vtx->dst_sel_y);
fprintf(stderr, "MODE:%d)\n", vtx->srf_mode_all);
id++;
fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]);
+ fprintf(stderr, "ENDIAN:%d ", vtx->endian);
fprintf(stderr, "OFFSET:%d\n", vtx->offset);
- //TODO
+ /* TODO */
id++;
fprintf(stderr, "%04d %08X \n", id, bc->bytecode[id]);
id++;
fprintf(stderr, "--------------------------------------\n");
}
-static void r600_cf_vtx(struct r600_vertex_element *ve)
-{
- struct r600_pipe_state *rstate;
-
- rstate = &ve->rstate;
- rstate->id = R600_PIPE_STATE_FETCH_SHADER;
- rstate->nregs = 0;
- r600_pipe_state_add_reg(rstate, R_0288A4_SQ_PGM_RESOURCES_FS,
- 0x00000000, 0xFFFFFFFF, NULL);
- r600_pipe_state_add_reg(rstate, R_0288DC_SQ_PGM_CF_OFFSET_FS,
- 0x00000000, 0xFFFFFFFF, NULL);
- r600_pipe_state_add_reg(rstate, R_028894_SQ_PGM_START_FS,
- r600_bo_offset(ve->fetch_shader) >> 8,
- 0xFFFFFFFF, ve->fetch_shader);
-}
-
static void r600_vertex_data_type(enum pipe_format pformat, unsigned *format,
- unsigned *num_format, unsigned *format_comp)
+ unsigned *num_format, unsigned *format_comp, unsigned *endian)
{
const struct util_format_description *desc;
unsigned i;
*format = 0;
*num_format = 0;
*format_comp = 0;
+ *endian = ENDIAN_NONE;
desc = util_format_description(pformat);
if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) {
}
}
+ *endian = r600_endian_swap(desc->channel[i].size);
+
switch (desc->channel[i].type) {
/* Half-floats, floats, ints */
case UTIL_FORMAT_TYPE_FLOAT:
struct r600_bc_vtx vtx;
struct pipe_vertex_element *elements = ve->elements;
const struct util_format_description *desc;
- unsigned fetch_resource_start = rctx->family >= CHIP_CEDAR ? 0 : 160;
- unsigned format, num_format, format_comp;
+ unsigned fetch_resource_start = rctx->chip_class >= EVERGREEN ? 0 : 160;
+ unsigned format, num_format, format_comp, endian;
u32 *bytecode;
int i, r;
- /* vertex elements offset need special handling, if offset is bigger
- + * than what we can put in fetch instruction then we need to alterate
- * the vertex resource offset. In such case in order to simplify code
- * we will bound one resource per elements. It's a worst case scenario.
- */
+ /* Vertex element offsets need special handling. If the offset is
+ * bigger than what we can put in the fetch instruction we need to
+ * alter the vertex resource offset. In order to simplify code we
+ * will bind one resource per element in such cases. It's a worst
+ * case scenario. */
for (i = 0; i < ve->count; i++) {
ve->vbuffer_offset[i] = C_SQ_VTX_WORD2_OFFSET & elements[i].src_offset;
if (ve->vbuffer_offset[i]) {
}
memset(&bc, 0, sizeof(bc));
- r = r600_bc_init(&bc, r600_get_family(rctx->radeon));
- if (r)
- return r;
+ r600_bc_init(&bc, rctx->chip_class);
for (i = 0; i < ve->count; i++) {
if (elements[i].instance_divisor > 1) {
struct r600_bc_alu alu;
memset(&alu, 0, sizeof(alu));
- alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT);
+ alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
alu.src[0].sel = 0;
alu.src[0].chan = 3;
- alu.dst.sel = i + 1;
- alu.dst.chan = 3;
- alu.dst.write = 1;
- alu.last = 1;
-
- if ((r = r600_bc_add_alu(&bc, &alu))) {
- r600_bc_clear(&bc);
- return r;
- }
-
- memset(&alu, 0, sizeof(alu));
- alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
- alu.src[0].sel = i + 1;
- alu.src[0].chan = 3;
-
alu.src[1].sel = V_SQ_ALU_SRC_LITERAL;
- alu.src[1].value = fui(1.0f / (float)elements[i].instance_divisor);
-
- alu.dst.sel = i + 1;
- alu.dst.chan = 3;
- alu.dst.write = 1;
- alu.last = 1;
-
- if ((r = r600_bc_add_alu(&bc, &alu))) {
- r600_bc_clear(&bc);
- return r;
- }
-
- memset(&alu, 0, sizeof(alu));
- alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC);
- alu.src[0].sel = i + 1;
- alu.src[0].chan = 3;
-
- alu.dst.sel = i + 1;
- alu.dst.chan = 3;
- alu.dst.write = 1;
- alu.last = 1;
-
- if ((r = r600_bc_add_alu(&bc, &alu))) {
- r600_bc_clear(&bc);
- return r;
- }
-
- memset(&alu, 0, sizeof(alu));
- alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT);
- alu.src[0].sel = i + 1;
- alu.src[0].chan = 3;
+ alu.src[1].value = (1ll << 32) / elements[i].instance_divisor + 1;
alu.dst.sel = i + 1;
alu.dst.chan = 3;
for (i = 0; i < ve->count; i++) {
unsigned vbuffer_index;
- r600_vertex_data_type(ve->elements[i].src_format, &format, &num_format, &format_comp);
+ r600_vertex_data_type(ve->elements[i].src_format, &format, &num_format, &format_comp, &endian);
desc = util_format_description(ve->elements[i].src_format);
if (desc == NULL) {
r600_bc_clear(&bc);
vtx.format_comp_all = format_comp;
vtx.srf_mode_all = 1;
vtx.offset = elements[i].src_offset;
+ vtx.endian = endian;
if ((r = r600_bc_add_vtx(&bc, &vtx))) {
r600_bc_clear(&bc);
}
r600_bc_add_cfinst(&bc, BC_INST(&bc, V_SQ_CF_WORD1_SQ_CF_INST_RETURN));
- r600_bc_add_cfinst(&bc, BC_INST(&bc, V_SQ_CF_WORD1_SQ_CF_INST_NOP));
-
- /* use PIPE_BIND_VERTEX_BUFFER so we use the cache buffer manager */
- ve->fetch_shader = r600_bo(rctx->radeon, bc.ndw*4, 256, PIPE_BIND_VERTEX_BUFFER, 0);
- if (ve->fetch_shader == NULL) {
- r600_bc_clear(&bc);
- return -ENOMEM;
- }
- ve->fs_size = bc.ndw*4;
if ((r = r600_bc_build(&bc))) {
r600_bc_clear(&bc);
return r;
fprintf(stderr, "______________________________________________________________\n");
}
+ ve->fs_size = bc.ndw*4;
+
+ /* use PIPE_BIND_VERTEX_BUFFER so we use the cache buffer manager */
+ ve->fetch_shader = r600_bo(rctx->radeon, ve->fs_size, 256, PIPE_BIND_VERTEX_BUFFER, PIPE_USAGE_IMMUTABLE);
+ if (ve->fetch_shader == NULL) {
+ r600_bc_clear(&bc);
+ return -ENOMEM;
+ }
+
bytecode = r600_bo_map(rctx->radeon, ve->fetch_shader, 0, NULL);
if (bytecode == NULL) {
r600_bc_clear(&bc);
return -ENOMEM;
}
- memcpy(bytecode, bc.bytecode, ve->fs_size);
+ if (R600_BIG_ENDIAN) {
+ for (i = 0; i < ve->fs_size / 4; ++i) {
+ bytecode[i] = bswap_32(bc.bytecode[i]);
+ }
+ } else {
+ memcpy(bytecode, bc.bytecode, ve->fs_size);
+ }
r600_bo_unmap(rctx->radeon, ve->fetch_shader);
r600_bc_clear(&bc);
- if (rctx->family >= CHIP_CEDAR)
- eg_cf_vtx(ve);
+ if (rctx->chip_class >= EVERGREEN)
+ evergreen_fetch_shader(&rctx->context, ve);
else
- r600_cf_vtx(ve);
+ r600_fetch_shader(&rctx->context, ve);
return 0;
}
projects / mesa.git / blobdiff