r600g: atomize clip state

[mesa.git] / src / gallium / drivers / r600 / r600_asm.h

diff --git a/src/gallium/drivers/r600/r600_asm.h b/src/gallium/drivers/r600/r600_asm.h
index 5790ead991f8d1e501453739c5d83f62472b8d2e..87e751adc78737080aae7de27059617a398e5a8e 100644 (file)
--- a/src/gallium/drivers/r600/r600_asm.h
+++ b/src/gallium/drivers/r600/r600_asm.h
@@ -53,7 +53,9 @@ struct r600_bytecode_alu {
        unsigned                        inst;
        unsigned                        last;
        unsigned                        is_op3;
-       unsigned                        predicate;
+       unsigned                        execute_mask;
+       unsigned                        update_pred;
+       unsigned                        pred_sel;
        unsigned                        bank_swizzle;
        unsigned                        bank_swizzle_force;
        unsigned                        omod;
@@ -135,6 +137,14 @@ struct r600_bytecode_kcache {
        unsigned                        addr;
 };
 
+/* A value of CF_NATIVE in r600_bytecode_cf::inst means that this instruction
+ * has already been encoded, and the encoding has been stored in
+ * r600_bytecode::isa.  This is used by the LLVM backend to emit CF instructions
+ * e.g. RAT_WRITE_* that can't be properly represented by struct
+ * r600_bytecode_cf.
+ */
+#define CF_NATIVE ~0
+
 struct r600_bytecode_cf {
        struct list_head                list;
 
@@ -157,6 +167,7 @@ struct r600_bytecode_cf {
        struct r600_bytecode_alu                *curr_bs_head;
        struct r600_bytecode_alu                *prev_bs_head;
        struct r600_bytecode_alu                *prev2_bs_head;
+       unsigned isa[2];
 };
 
 #define FC_NONE                                0