r600g: atomize clip state
[mesa.git] / src / gallium / drivers / r600 / r600_asm.h
index ac3ed3c8520b3b5f20d563151b55d2ae951ae1ef..87e751adc78737080aae7de27059617a398e5a8e 100644 (file)
 #ifndef R600_ASM_H
 #define R600_ASM_H
 
-#include "util/u_double_list.h"
-
-#define NUM_OF_CYCLES 3
-#define NUM_OF_COMPONENTS 4
+#include "r600.h"
 
 struct r600_vertex_element;
-struct r600_pipe_context;
+struct r600_context;
 
-struct r600_bc_alu_src {
+struct r600_bytecode_alu_src {
        unsigned                        sel;
        unsigned                        chan;
        unsigned                        neg;
        unsigned                        abs;
        unsigned                        rel;
+       unsigned                        kc_bank;
+       uint32_t                        value;
 };
 
-struct r600_bc_alu_dst {
+struct r600_bytecode_alu_dst {
        unsigned                        sel;
        unsigned                        chan;
        unsigned                        clamp;
@@ -47,25 +46,23 @@ struct r600_bc_alu_dst {
        unsigned                        rel;
 };
 
-struct r600_bc_alu {
+struct r600_bytecode_alu {
        struct list_head                list;
-       struct list_head                bs_list; /* bank swizzle list */
-       struct r600_bc_alu_src          src[3];
-       struct r600_bc_alu_dst          dst;
+       struct r600_bytecode_alu_src            src[3];
+       struct r600_bytecode_alu_dst            dst;
        unsigned                        inst;
        unsigned                        last;
        unsigned                        is_op3;
-       unsigned                        predicate;
-       unsigned                        nliteral;
-       unsigned                        literal_added;
+       unsigned                        execute_mask;
+       unsigned                        update_pred;
+       unsigned                        pred_sel;
        unsigned                        bank_swizzle;
        unsigned                        bank_swizzle_force;
-       u32                             value[4];
-       int                             hw_gpr[NUM_OF_CYCLES][NUM_OF_COMPONENTS];
        unsigned                        omod;
+       unsigned                        index_mode;
 };
 
-struct r600_bc_tex {
+struct r600_bytecode_tex {
        struct list_head                list;
        unsigned                        inst;
        unsigned                        resource_id;
@@ -92,7 +89,7 @@ struct r600_bc_tex {
        unsigned                        src_sel_w;
 };
 
-struct r600_bc_vtx {
+struct r600_bytecode_vtx {
        struct list_head                list;
        unsigned                        inst;
        unsigned                        fetch_type;
@@ -110,43 +107,67 @@ struct r600_bc_vtx {
        unsigned                        num_format_all;
        unsigned                        format_comp_all;
        unsigned                        srf_mode_all;
+       unsigned                        offset;
+       unsigned                        endian;
 };
 
-struct r600_bc_output {
+struct r600_bytecode_output {
        unsigned                        array_base;
+       unsigned                        array_size;
+       unsigned                        comp_mask;
        unsigned                        type;
        unsigned                        end_of_program;
+
+       /* CF_INST. This is already bit-shifted and only needs to be or'd for bytecode. */
        unsigned                        inst;
+
        unsigned                        elem_size;
        unsigned                        gpr;
        unsigned                        swizzle_x;
        unsigned                        swizzle_y;
        unsigned                        swizzle_z;
        unsigned                        swizzle_w;
+       unsigned                        burst_count;
        unsigned                        barrier;
 };
 
-struct r600_bc_cf {
+struct r600_bytecode_kcache {
+       unsigned                        bank;
+       unsigned                        mode;
+       unsigned                        addr;
+};
+
+/* A value of CF_NATIVE in r600_bytecode_cf::inst means that this instruction
+ * has already been encoded, and the encoding has been stored in
+ * r600_bytecode::isa.  This is used by the LLVM backend to emit CF instructions
+ * e.g. RAT_WRITE_* that can't be properly represented by struct
+ * r600_bytecode_cf.
+ */
+#define CF_NATIVE ~0
+
+struct r600_bytecode_cf {
        struct list_head                list;
+
+       /* CF_INST. This is already bit-shifted and only needs to be or'd for bytecode. */
        unsigned                        inst;
+
        unsigned                        addr;
        unsigned                        ndw;
        unsigned                        id;
        unsigned                        cond;
        unsigned                        pop_count;
        unsigned                        cf_addr; /* control flow addr */
-       unsigned                        kcache0_mode;
-       unsigned                        kcache1_mode;
-       unsigned                        kcache0_addr;
-       unsigned                        kcache1_addr;
-       unsigned                        kcache0_bank;
-       unsigned                        kcache1_bank;
+       struct r600_bytecode_kcache             kcache[4];
        unsigned                        r6xx_uses_waterfall;
+       unsigned                        eg_alu_extended;
        struct list_head                alu;
        struct list_head                tex;
        struct list_head                vtx;
-       struct r600_bc_output           output;
-       struct r600_bc_alu              *curr_bs_head;
+       struct r600_bytecode_output             output;
+       struct r600_bytecode_alu                *curr_bs_head;
+       struct r600_bytecode_alu                *prev_bs_head;
+       struct r600_bytecode_alu                *prev2_bs_head;
+       unsigned isa[2];
 };
 
 #define FC_NONE                                0
@@ -158,8 +179,8 @@ struct r600_bc_cf {
 
 struct r600_cf_stack_entry {
        int                             type;
-       struct r600_bc_cf               *start;
-       struct r600_bc_cf               **mid; /* used to store the else point */
+       struct r600_bytecode_cf         *start;
+       struct r600_bytecode_cf         **mid; /* used to store the else point */
        int                             num_mid;
 };
 
@@ -171,47 +192,54 @@ struct r600_cf_callstack {
        int                             max;
 };
 
-struct r600_bc {
-       enum radeon_family              family;
-       int                             chiprev; /* 0 - r600, 1 - r700, 2 - evergreen */
+#define AR_HANDLE_NORMAL 0
+#define AR_HANDLE_RV6XX 1 /* except RV670 */
+
+
+struct r600_bytecode {
+       enum chip_class                 chip_class;
        int                             type;
        struct list_head                cf;
-       struct r600_bc_cf               *cf_last;
+       struct r600_bytecode_cf         *cf_last;
        unsigned                        ndw;
        unsigned                        ncf;
        unsigned                        ngpr;
        unsigned                        nstack;
        unsigned                        nresource;
        unsigned                        force_add_cf;
-       u32                             *bytecode;
-       u32                             fc_sp;
+       uint32_t                        *bytecode;
+       uint32_t                        fc_sp;
        struct r600_cf_stack_entry      fc_stack[32];
        unsigned                        call_sp;
        struct r600_cf_callstack        callstack[SQ_MAX_CALL_DEPTH];
+       unsigned        ar_loaded;
+       unsigned        ar_reg;
+       unsigned        ar_handling;
+       unsigned        r6xx_nop_after_rel_dst;
 };
 
 /* eg_asm.c */
-int eg_bc_cf_build(struct r600_bc *bc, struct r600_bc_cf *cf);
-void eg_cf_vtx(struct r600_vertex_element *ve, u32 *bytecode, unsigned count);
+int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf);
 
 /* r600_asm.c */
-int r600_bc_init(struct r600_bc *bc, enum radeon_family family);
-void r600_bc_clear(struct r600_bc *bc);
-int r600_bc_add_alu(struct r600_bc *bc, const struct r600_bc_alu *alu);
-int r600_bc_add_literal(struct r600_bc *bc, const u32 *value);
-int r600_bc_add_vtx(struct r600_bc *bc, const struct r600_bc_vtx *vtx);
-int r600_bc_add_tex(struct r600_bc *bc, const struct r600_bc_tex *tex);
-int r600_bc_add_output(struct r600_bc *bc, const struct r600_bc_output *output);
-int r600_bc_build(struct r600_bc *bc);
-int r600_bc_add_cfinst(struct r600_bc *bc, int inst);
-int r600_bc_add_alu_type(struct r600_bc *bc, const struct r600_bc_alu *alu, int type);
-void r600_bc_dump(struct r600_bc *bc);
-void r600_cf_vtx(struct r600_vertex_element *ve, u32 *bytecode, unsigned count);
-void r600_cf_vtx_tc(struct r600_vertex_element *ve, u32 *bytecode, unsigned count);
-
-int r600_vertex_elements_build_fetch_shader(struct r600_pipe_context *rctx, struct r600_vertex_element *ve);
+void r600_bytecode_init(struct r600_bytecode *bc, enum chip_class chip_class, enum radeon_family family);
+void r600_bytecode_clear(struct r600_bytecode *bc);
+int r600_bytecode_add_alu(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu);
+int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx);
+int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_tex *tex);
+int r600_bytecode_add_output(struct r600_bytecode *bc, const struct r600_bytecode_output *output);
+int r600_bytecode_build(struct r600_bytecode *bc);
+int r600_bytecode_add_cfinst(struct r600_bytecode *bc, int inst);
+int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu, int type);
+void r600_bytecode_special_constants(uint32_t value, unsigned *sel, unsigned *neg);
+void r600_bytecode_dump(struct r600_bytecode *bc);
+
+int cm_bytecode_add_cf_end(struct r600_bytecode *bc);
+
+int r600_vertex_elements_build_fetch_shader(struct r600_context *rctx, struct r600_vertex_element *ve);
 
 /* r700_asm.c */
-int r700_bc_alu_build(struct r600_bc *bc, struct r600_bc_alu *alu, unsigned id);
+void r700_bytecode_cf_vtx_build(uint32_t *bytecode, const struct r600_bytecode_cf *cf);
+int r700_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id);
 
 #endif