gallium: add caps for POSITION and FACE system values
[mesa.git] / src / gallium / drivers / r600 / r600_blit.c
index 98c07b5afdbd88f7caf9e3b94372bcb043366c5a..c52d5a9bad00266b024266e82131ff09307f57fa 100644 (file)
@@ -21,8 +21,9 @@
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 #include "r600_pipe.h"
+#include "compute_memory_pool.h"
+#include "evergreen_compute.h"
 #include "util/u_surface.h"
-#include "util/u_blitter.h"
 #include "util/u_format.h"
 #include "evergreend.h"
 
@@ -42,12 +43,11 @@ enum r600_blitter_op /* bitmask */
        R600_COPY_TEXTURE  = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES |
                             R600_DISABLE_RENDER_COND,
 
-       R600_BLIT          = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES |
-                            R600_DISABLE_RENDER_COND,
+       R600_BLIT          = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES,
 
        R600_DECOMPRESS    = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND,
 
-       R600_COLOR_RESOLVE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND
+       R600_COLOR_RESOLVE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER
 };
 
 static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op)
@@ -60,13 +60,15 @@ static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op
        util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_fetch_shader.cso);
        util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader);
        util_blitter_save_geometry_shader(rctx->blitter, rctx->gs_shader);
+       util_blitter_save_tessctrl_shader(rctx->blitter, rctx->tcs_shader);
+       util_blitter_save_tesseval_shader(rctx->blitter, rctx->tes_shader);
        util_blitter_save_so_targets(rctx->blitter, rctx->b.streamout.num_targets,
                                     (struct pipe_stream_output_target**)rctx->b.streamout.targets);
        util_blitter_save_rasterizer(rctx->blitter, rctx->rasterizer_state.cso);
 
        if (op & R600_SAVE_FRAGMENT_STATE) {
-               util_blitter_save_viewport(rctx->blitter, &rctx->viewport[0].state);
-               util_blitter_save_scissor(rctx->blitter, &rctx->scissor[0].scissor);
+               util_blitter_save_viewport(rctx->blitter, &rctx->viewport.state[0]);
+               util_blitter_save_scissor(rctx->blitter, &rctx->scissor.scissor[0]);
                util_blitter_save_fragment_shader(rctx->blitter, rctx->ps_shader);
                util_blitter_save_blend(rctx->blitter, rctx->blend_state.cso);
                util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->dsa_state.cso);
@@ -87,18 +89,16 @@ static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op
                        (struct pipe_sampler_view**)rctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
        }
 
-       if ((op & R600_DISABLE_RENDER_COND) && rctx->b.current_render_cond) {
-           util_blitter_save_render_condition(rctx->blitter,
-                                              rctx->b.current_render_cond,
-                                              rctx->b.current_render_cond_cond,
-                                              rctx->b.current_render_cond_mode);
-        }
+       if (op & R600_DISABLE_RENDER_COND)
+               rctx->b.render_cond_force_off = true;
 }
 
 static void r600_blitter_end(struct pipe_context *ctx)
 {
        struct r600_context *rctx = (struct r600_context *)ctx;
-        r600_resume_nontimer_queries(&rctx->b);
+
+       rctx->b.render_cond_force_off = false;
+       r600_resume_nontimer_queries(&rctx->b);
 }
 
 static unsigned u_max_sample(struct pipe_resource *r)
@@ -145,7 +145,7 @@ static void r600_blit_decompress_depth(struct pipe_context *ctx,
        rctx->db_misc_state.copy_depth = util_format_has_depth(desc);
        rctx->db_misc_state.copy_stencil = util_format_has_stencil(desc);
        rctx->db_misc_state.copy_sample = first_sample;
-       rctx->db_misc_state.atom.dirty = true;
+       r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
 
        for (level = first_level; level <= last_level; level++) {
                if (!staging && !(texture->dirty_level_mask & (1 << level)))
@@ -162,7 +162,7 @@ static void r600_blit_decompress_depth(struct pipe_context *ctx,
 
                                if (sample != rctx->db_misc_state.copy_sample) {
                                        rctx->db_misc_state.copy_sample = sample;
-                                       rctx->db_misc_state.atom.dirty = true;
+                                       r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
                                }
 
                                surf_tmpl.format = texture->resource.b.b.format;
@@ -197,25 +197,33 @@ static void r600_blit_decompress_depth(struct pipe_context *ctx,
 
        /* reenable compression in DB_RENDER_CONTROL */
        rctx->db_misc_state.flush_depthstencil_through_cb = false;
-       rctx->db_misc_state.atom.dirty = true;
+       r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
 }
 
 static void r600_blit_decompress_depth_in_place(struct r600_context *rctx,
                                                 struct r600_texture *texture,
+                                               bool is_stencil_sampler,
                                                 unsigned first_level, unsigned last_level,
                                                 unsigned first_layer, unsigned last_layer)
 {
        struct pipe_surface *zsurf, surf_tmpl = {{0}};
        unsigned layer, max_layer, checked_last_layer, level;
+       unsigned *dirty_level_mask;
 
        /* Enable decompression in DB_RENDER_CONTROL */
-       rctx->db_misc_state.flush_depthstencil_in_place = true;
-       rctx->db_misc_state.atom.dirty = true;
+       if (is_stencil_sampler) {
+               rctx->db_misc_state.flush_stencil_inplace = true;
+               dirty_level_mask = &texture->stencil_dirty_level_mask;
+       } else {
+               rctx->db_misc_state.flush_depth_inplace = true;
+               dirty_level_mask = &texture->dirty_level_mask;
+       }
+       r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
 
        surf_tmpl.format = texture->resource.b.b.format;
 
        for (level = first_level; level <= last_level; level++) {
-               if (!(texture->dirty_level_mask & (1 << level)))
+               if (!(*dirty_level_mask & (1 << level)))
                        continue;
 
                surf_tmpl.u.tex.level = level;
@@ -242,13 +250,14 @@ static void r600_blit_decompress_depth_in_place(struct r600_context *rctx,
                /* The texture will always be dirty if some layers or samples aren't flushed.
                 * I don't think this case occurs often though. */
                if (first_layer == 0 && last_layer == max_layer) {
-                       texture->dirty_level_mask &= ~(1 << level);
+                       *dirty_level_mask &= ~(1 << level);
                }
        }
 
        /* Disable decompression in DB_RENDER_CONTROL */
-       rctx->db_misc_state.flush_depthstencil_in_place = false;
-       rctx->db_misc_state.atom.dirty = true;
+       rctx->db_misc_state.flush_depth_inplace = false;
+       rctx->db_misc_state.flush_stencil_inplace = false;
+       r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
 }
 
 void r600_decompress_depth_textures(struct r600_context *rctx,
@@ -259,12 +268,14 @@ void r600_decompress_depth_textures(struct r600_context *rctx,
 
        while (depth_texture_mask) {
                struct pipe_sampler_view *view;
+               struct r600_pipe_sampler_view *rview;
                struct r600_texture *tex;
 
                i = u_bit_scan(&depth_texture_mask);
 
                view = &textures->views[i]->base;
                assert(view);
+               rview = (struct r600_pipe_sampler_view*)view;
 
                tex = (struct r600_texture *)view->texture;
                assert(tex->is_depth && !tex->is_flushing_texture);
@@ -272,6 +283,7 @@ void r600_decompress_depth_textures(struct r600_context *rctx,
                if (rctx->b.chip_class >= EVERGREEN ||
                    r600_can_read_depth(tex)) {
                        r600_blit_decompress_depth_in_place(rctx, tex,
+                                                  rview->is_stencil_sampler,
                                                   view->u.tex.first_level, view->u.tex.last_level,
                                                   0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
                } else {
@@ -367,9 +379,14 @@ static bool r600_decompress_subresource(struct pipe_context *ctx,
        if (rtex->is_depth && !rtex->is_flushing_texture) {
                if (rctx->b.chip_class >= EVERGREEN ||
                    r600_can_read_depth(rtex)) {
-                       r600_blit_decompress_depth_in_place(rctx, rtex,
+                       r600_blit_decompress_depth_in_place(rctx, rtex, false,
                                                   level, level,
                                                   first_layer, last_layer);
+                       if (rtex->surface.flags & RADEON_SURF_SBUFFER) {
+                               r600_blit_decompress_depth_in_place(rctx, rtex, true,
+                                                          level, level,
+                                                          first_layer, last_layer);
+                       }
                } else {
                        if (!r600_init_flushed_depth_texture(ctx, tex, NULL))
                                return false; /* error */
@@ -395,7 +412,9 @@ static void r600_clear(struct pipe_context *ctx, unsigned buffers,
 
        if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN) {
                evergreen_do_fast_color_clear(&rctx->b, fb, &rctx->framebuffer.atom,
-                                             &buffers, color);
+                                             &buffers, NULL, color);
+               if (!buffers)
+                       return; /* all buffers have been fast cleared */
        }
 
        if (buffers & PIPE_CLEAR_COLOR) {
@@ -430,25 +449,28 @@ static void r600_clear(struct pipe_context *ctx, unsigned buffers,
                 * disable fast clear for texture array.
                 */
                /* Only use htile for first level */
-               if (rtex->htile_buffer && !level && rtex->surface.array_size == 1) {
+               if (rtex->htile_buffer && !level &&
+                   fb->zsbuf->u.tex.first_layer == 0 &&
+                   fb->zsbuf->u.tex.last_layer == util_max_layer(&rtex->resource.b.b, level)) {
                        if (rtex->depth_clear_value != depth) {
                                rtex->depth_clear_value = depth;
-                               rctx->db_state.atom.dirty = true;
+                               r600_mark_atom_dirty(rctx, &rctx->db_state.atom);
                        }
                        rctx->db_misc_state.htile_clear = true;
-                       rctx->db_misc_state.atom.dirty = true;
+                       r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
                }
        }
 
        r600_blitter_begin(ctx, R600_CLEAR);
-       util_blitter_clear(rctx->blitter, fb->width, fb->height, 1,
+       util_blitter_clear(rctx->blitter, fb->width, fb->height,
+                          util_framebuffer_get_num_layers(fb),
                           buffers, color, depth, stencil);
        r600_blitter_end(ctx);
 
        /* disable fast clear */
        if (rctx->db_misc_state.htile_clear) {
                rctx->db_misc_state.htile_clear = false;
-               rctx->db_misc_state.atom.dirty = true;
+               r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
        }
 }
 
@@ -500,40 +522,70 @@ static void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst
        } else {
                util_resource_copy_region(ctx, dst, 0, dstx, 0, 0, src, 0, src_box);
        }
+
+       /* The index buffer (VGT) doesn't seem to see the result of the copying.
+        * Can we somehow flush the index buffer cache? Starting a new IB seems
+        * to do the trick. */
+       if (rctx->b.chip_class <= R700)
+               rctx->b.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
 }
 
 /**
  * Global buffers are not really resources, they are are actually offsets
  * into a single global resource (r600_screen::global_pool).  The means
- * they don't have their own cs_buf handle, so they cannot be passed
+ * they don't have their own buf handle, so they cannot be passed
  * to r600_copy_buffer() and must be handled separately.
- *
- * XXX: It should be possible to implement this function using
- * r600_copy_buffer() by passing the memory_pool resource as both src
- * and dst and updating dstx and src_box to point to the correct offsets.
- * This would likely perform better than the current implementation.
  */
 static void r600_copy_global_buffer(struct pipe_context *ctx,
                                    struct pipe_resource *dst, unsigned
                                    dstx, struct pipe_resource *src,
                                    const struct pipe_box *src_box)
 {
-       struct pipe_box dst_box; struct pipe_transfer *src_pxfer,
-       *dst_pxfer;
-
-       u_box_1d(dstx, src_box->width, &dst_box);
-       void *src_ptr = ctx->transfer_map(ctx, src, 0, PIPE_TRANSFER_READ,
-                                         src_box, &src_pxfer);
-       void *dst_ptr = ctx->transfer_map(ctx, dst, 0, PIPE_TRANSFER_WRITE,
-                                         &dst_box, &dst_pxfer);
-       memcpy(dst_ptr, src_ptr, src_box->width);
-
-       ctx->transfer_unmap(ctx, src_pxfer);
-       ctx->transfer_unmap(ctx, dst_pxfer);
+       struct r600_context *rctx = (struct r600_context*)ctx;
+       struct compute_memory_pool *pool = rctx->screen->global_pool;
+       struct pipe_box new_src_box = *src_box;
+
+       if (src->bind & PIPE_BIND_GLOBAL) {
+               struct r600_resource_global *rsrc =
+                       (struct r600_resource_global *)src;
+               struct compute_memory_item *item = rsrc->chunk;
+
+               if (is_item_in_pool(item)) {
+                       new_src_box.x += 4 * item->start_in_dw;
+                       src = (struct pipe_resource *)pool->bo;
+               } else {
+                       if (item->real_buffer == NULL) {
+                               item->real_buffer =
+                                       r600_compute_buffer_alloc_vram(pool->screen,
+                                                                      item->size_in_dw * 4);
+                       }
+                       src = (struct pipe_resource*)item->real_buffer;
+               }
+       }
+       if (dst->bind & PIPE_BIND_GLOBAL) {
+               struct r600_resource_global *rdst =
+                       (struct r600_resource_global *)dst;
+               struct compute_memory_item *item = rdst->chunk;
+
+               if (is_item_in_pool(item)) {
+                       dstx += 4 * item->start_in_dw;
+                       dst = (struct pipe_resource *)pool->bo;
+               } else {
+                       if (item->real_buffer == NULL) {
+                               item->real_buffer =
+                                       r600_compute_buffer_alloc_vram(pool->screen,
+                                                                      item->size_in_dw * 4);
+                       }
+                       dst = (struct pipe_resource*)item->real_buffer;
+               }
+       }
+
+       r600_copy_buffer(ctx, dst, dstx, src, &new_src_box);
 }
 
 static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
-                             unsigned offset, unsigned size, unsigned value)
+                             unsigned offset, unsigned size, unsigned value,
+                             bool is_framebuffer)
 {
        struct r600_context *rctx = (struct r600_context*)ctx;
 
@@ -552,29 +604,20 @@ static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *ds
        } else {
                uint32_t *map = r600_buffer_map_sync_with_rings(&rctx->b, r600_resource(dst),
                                                                 PIPE_TRANSFER_WRITE);
+               map += offset / 4;
                size /= 4;
                for (unsigned i = 0; i < size; i++)
                        *map++ = value;
        }
 }
 
-static bool util_format_is_subsampled_2x1_32bpp(enum pipe_format format)
-{
-       const struct util_format_description *desc = util_format_description(format);
-
-       return desc->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED &&
-              desc->block.width == 2 &&
-              desc->block.height == 1 &&
-              desc->block.bits == 32;
-}
-
-static void r600_resource_copy_region(struct pipe_context *ctx,
-                                     struct pipe_resource *dst,
-                                     unsigned dst_level,
-                                     unsigned dstx, unsigned dsty, unsigned dstz,
-                                     struct pipe_resource *src,
-                                     unsigned src_level,
-                                     const struct pipe_box *src_box)
+void r600_resource_copy_region(struct pipe_context *ctx,
+                              struct pipe_resource *dst,
+                              unsigned dst_level,
+                              unsigned dstx, unsigned dsty, unsigned dstz,
+                              struct pipe_resource *src,
+                              unsigned src_level,
+                              const struct pipe_box *src_box)
 {
        struct r600_context *rctx = (struct r600_context *)ctx;
        struct pipe_surface *dst_view, dst_templ;
@@ -613,7 +656,8 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
        util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
        util_blitter_default_src_texture(&src_templ, src, src_level);
 
-       if (util_format_is_compressed(src->format)) {
+       if (util_format_is_compressed(src->format) ||
+           util_format_is_compressed(dst->format)) {
                unsigned blocksize = util_format_get_blocksize(src->format);
 
                if (blocksize == 8)
@@ -642,7 +686,7 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
 
                src_force_level = src_level;
        } else if (!util_blitter_is_copy_supported(rctx->blitter, dst, src)) {
-               if (util_format_is_subsampled_2x1_32bpp(src->format)) {
+               if (util_format_is_subsampled_422(src->format)) {
 
                        src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
                        dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
@@ -707,7 +751,8 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
        r600_blitter_begin(ctx, R600_COPY_TEXTURE);
        util_blitter_blit_generic(rctx->blitter, dst_view, &dstbox,
                                  src_view, src_box, src_width0, src_height0,
-                                 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL);
+                                 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
+                                 FALSE);
        r600_blitter_end(ctx);
 
        pipe_surface_reference(&dst_view, NULL);
@@ -783,8 +828,10 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
            info->src.box.width == dst_width &&
            info->src.box.height == dst_height &&
            info->src.box.depth == 1 &&
-           dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D) {
-               r600_blitter_begin(ctx, R600_COLOR_RESOLVE);
+           dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
+           (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) {
+               r600_blitter_begin(ctx, R600_COLOR_RESOLVE |
+                                  (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
                util_blitter_custom_resolve_color(rctx->blitter,
                                                  info->dst.resource, info->dst.level,
                                                  info->dst.box.z,
@@ -816,7 +863,12 @@ static void r600_blit(struct pipe_context *ctx,
                return; /* error */
        }
 
-       r600_blitter_begin(ctx, R600_BLIT);
+       if (rctx->screen->b.debug_flags & DBG_FORCE_DMA &&
+           util_try_blit_via_copy_region(ctx, info))
+               return;
+
+       r600_blitter_begin(ctx, R600_BLIT |
+                          (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
        util_blitter_blit(rctx->blitter, info);
        r600_blitter_end(ctx);
 }
@@ -830,7 +882,7 @@ static void r600_flush_resource(struct pipe_context *ctx,
 
        if (!rtex->is_depth && rtex->cmask.size) {
                r600_blit_decompress_color(ctx, rtex, 0, res->last_level,
-                                          0, res->array_size - 1);
+                                          0, util_max_layer(res, 0));
        }
 }