#include <util/u_math.h>
#include <util/u_inlines.h>
#include <util/u_memory.h>
+#include "util/u_upload_mgr.h"
+
#include "state_tracker/drm_driver.h"
-#include "r600_screen.h"
-#include "r600_context.h"
-#include "r600_resource.h"
-extern struct u_resource_vtbl r600_buffer_vtbl;
+#include <xf86drm.h>
+#include "radeon_drm.h"
-u32 r600_domain_from_usage(unsigned usage)
-{
- u32 domain = RADEON_GEM_DOMAIN_GTT;
+#include "r600.h"
+#include "r600_pipe.h"
- if (usage & PIPE_BIND_RENDER_TARGET) {
- domain |= RADEON_GEM_DOMAIN_VRAM;
- }
- if (usage & PIPE_BIND_DEPTH_STENCIL) {
- domain |= RADEON_GEM_DOMAIN_VRAM;
- }
- if (usage & PIPE_BIND_SAMPLER_VIEW) {
- domain |= RADEON_GEM_DOMAIN_VRAM;
- }
- /* also need BIND_BLIT_SOURCE/DESTINATION ? */
- if (usage & PIPE_BIND_VERTEX_BUFFER) {
- domain |= RADEON_GEM_DOMAIN_GTT;
- }
- if (usage & PIPE_BIND_INDEX_BUFFER) {
- domain |= RADEON_GEM_DOMAIN_GTT;
- }
-
- return domain;
-}
+extern struct u_resource_vtbl r600_buffer_vtbl;
struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
const struct pipe_resource *templ)
{
- struct r600_screen *rscreen = r600_screen(screen);
- struct r600_resource *rbuffer;
- struct radeon_bo *bo;
- struct pb_desc desc;
+ struct r600_resource_buffer *rbuffer;
+ struct r600_bo *bo;
/* XXX We probably want a different alignment for buffers and textures. */
unsigned alignment = 4096;
- rbuffer = CALLOC_STRUCT(r600_resource);
+ rbuffer = CALLOC_STRUCT(r600_resource_buffer);
if (rbuffer == NULL)
return NULL;
- rbuffer->base.b = *templ;
- pipe_reference_init(&rbuffer->base.b.reference, 1);
- rbuffer->base.b.screen = screen;
- rbuffer->base.vtbl = &r600_buffer_vtbl;
-
- if (rbuffer->base.b.bind & PIPE_BIND_CONSTANT_BUFFER) {
- desc.alignment = alignment;
- desc.usage = rbuffer->base.b.bind;
- rbuffer->pb = pb_malloc_buffer_create(rbuffer->base.b.width0,
- &desc);
- if (rbuffer->pb == NULL) {
- free(rbuffer);
- return NULL;
- }
- return &rbuffer->base.b;
- }
- rbuffer->domain = r600_domain_from_usage(rbuffer->base.b.bind);
- bo = radeon_bo(rscreen->rw, 0, rbuffer->base.b.width0, alignment, NULL);
+ rbuffer->magic = R600_BUFFER_MAGIC;
+ rbuffer->user_buffer = NULL;
+ rbuffer->r.base.b = *templ;
+ pipe_reference_init(&rbuffer->r.base.b.reference, 1);
+ rbuffer->r.base.b.screen = screen;
+ rbuffer->r.base.vtbl = &r600_buffer_vtbl;
+ rbuffer->r.size = rbuffer->r.base.b.width0;
+ rbuffer->r.bo_size = rbuffer->r.size;
+ bo = r600_bo((struct radeon*)screen->winsys, rbuffer->r.base.b.width0, alignment, rbuffer->r.base.b.bind, rbuffer->r.base.b.usage);
if (bo == NULL) {
FREE(rbuffer);
return NULL;
}
- rbuffer->bo = bo;
- return &rbuffer->base.b;
+ rbuffer->r.bo = bo;
+ return &rbuffer->r.base.b;
}
struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen,
void *ptr, unsigned bytes,
unsigned bind)
{
- struct r600_resource *rbuffer;
- struct r600_screen *rscreen = r600_screen(screen);
- struct pipe_resource templ;
-
- memset(&templ, 0, sizeof(struct pipe_resource));
- templ.target = PIPE_BUFFER;
- templ.format = PIPE_FORMAT_R8_UNORM;
- templ.usage = PIPE_USAGE_IMMUTABLE;
- templ.bind = bind;
- templ.width0 = bytes;
- templ.height0 = 1;
- templ.depth0 = 1;
-
- rbuffer = (struct r600_resource*)r600_buffer_create(screen, &templ);
- if (rbuffer == NULL) {
+ struct r600_resource_buffer *rbuffer;
+
+ rbuffer = CALLOC_STRUCT(r600_resource_buffer);
+ if (rbuffer == NULL)
return NULL;
- }
- radeon_bo_map(rscreen->rw, rbuffer->bo);
- memcpy(rbuffer->bo->data, ptr, bytes);
- radeon_bo_unmap(rscreen->rw, rbuffer->bo);
- return &rbuffer->base.b;
+
+ rbuffer->magic = R600_BUFFER_MAGIC;
+ pipe_reference_init(&rbuffer->r.base.b.reference, 1);
+ rbuffer->r.base.vtbl = &r600_buffer_vtbl;
+ rbuffer->r.base.b.screen = screen;
+ rbuffer->r.base.b.target = PIPE_BUFFER;
+ rbuffer->r.base.b.format = PIPE_FORMAT_R8_UNORM;
+ rbuffer->r.base.b.usage = PIPE_USAGE_IMMUTABLE;
+ rbuffer->r.base.b.bind = bind;
+ rbuffer->r.base.b.width0 = bytes;
+ rbuffer->r.base.b.height0 = 1;
+ rbuffer->r.base.b.depth0 = 1;
+ rbuffer->r.base.b.array_size = 1;
+ rbuffer->r.base.b.flags = 0;
+ rbuffer->r.bo = NULL;
+ rbuffer->r.bo_size = 0;
+ rbuffer->user_buffer = ptr;
+ return &rbuffer->r.base.b;
}
static void r600_buffer_destroy(struct pipe_screen *screen,
struct pipe_resource *buf)
{
- struct r600_resource *rbuffer = (struct r600_resource*)buf;
- struct r600_screen *rscreen = r600_screen(screen);
+ struct r600_resource_buffer *rbuffer = r600_buffer(buf);
- if (rbuffer->pb) {
- pipe_reference_init(&rbuffer->pb->base.reference, 0);
- pb_destroy(rbuffer->pb);
- rbuffer->pb = NULL;
- }
- if (rbuffer->bo) {
- radeon_bo_decref(rscreen->rw, rbuffer->bo);
+ if (rbuffer->r.bo) {
+ r600_bo_reference((struct radeon*)screen->winsys, &rbuffer->r.bo, NULL);
}
- memset(rbuffer, 0, sizeof(struct r600_resource));
+ rbuffer->r.bo = NULL;
FREE(rbuffer);
}
static void *r600_buffer_transfer_map(struct pipe_context *pipe,
struct pipe_transfer *transfer)
{
- struct r600_resource *rbuffer = (struct r600_resource*)transfer->resource;
- struct r600_screen *rscreen = r600_screen(pipe->screen);
+ struct r600_resource_buffer *rbuffer = r600_buffer(transfer->resource);
int write = 0;
+ uint8_t *data;
+
+ if (rbuffer->user_buffer)
+ return (uint8_t*)rbuffer->user_buffer + transfer->box.x;
- if (rbuffer->pb) {
- return (uint8_t*)pb_map(rbuffer->pb, transfer->usage) + transfer->box.x;
- }
if (transfer->usage & PIPE_TRANSFER_DONTBLOCK) {
/* FIXME */
}
if (transfer->usage & PIPE_TRANSFER_WRITE) {
write = 1;
}
- if (radeon_bo_map(rscreen->rw, rbuffer->bo)) {
+ data = r600_bo_map((struct radeon*)pipe->winsys, rbuffer->r.bo, transfer->usage, pipe);
+ if (!data)
return NULL;
- }
- return (uint8_t*)rbuffer->bo->data + transfer->box.x;
+
+ return (uint8_t*)data + transfer->box.x;
}
static void r600_buffer_transfer_unmap(struct pipe_context *pipe,
struct pipe_transfer *transfer)
{
- struct r600_resource *rbuffer = (struct r600_resource*)transfer->resource;
- struct r600_screen *rscreen = r600_screen(pipe->screen);
+ struct r600_resource_buffer *rbuffer = r600_buffer(transfer->resource);
- if (rbuffer->pb) {
- pb_unmap(rbuffer->pb);
- } else {
- radeon_bo_unmap(rscreen->rw, rbuffer->bo);
- }
+ if (rbuffer->user_buffer)
+ return;
+
+ if (rbuffer->r.bo)
+ r600_bo_unmap((struct radeon*)pipe->winsys, rbuffer->r.bo);
}
static void r600_buffer_transfer_flush_region(struct pipe_context *pipe,
- struct pipe_transfer *transfer,
- const struct pipe_box *box)
+ struct pipe_transfer *transfer,
+ const struct pipe_box *box)
{
}
unsigned r600_buffer_is_referenced_by_cs(struct pipe_context *context,
struct pipe_resource *buf,
- unsigned face, unsigned level)
+ unsigned level, int layer)
{
/* FIXME */
return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
{
struct radeon *rw = (struct radeon*)screen->winsys;
struct r600_resource *rbuffer;
- struct radeon_bo *bo = NULL;
+ struct r600_bo *bo = NULL;
- bo = radeon_bo(rw, whandle->handle, 0, 0, NULL);
+ bo = r600_bo_handle(rw, whandle->handle, NULL);
if (bo == NULL) {
return NULL;
}
rbuffer = CALLOC_STRUCT(r600_resource);
if (rbuffer == NULL) {
- radeon_bo_decref(rw, bo);
+ r600_bo_reference(rw, &bo, NULL);
return NULL;
}
r600_buffer_transfer_unmap, /* transfer_unmap */
u_default_transfer_inline_write /* transfer_inline_write */
};
+
+void r600_upload_index_buffer(struct r600_pipe_context *rctx, struct r600_drawl *draw)
+{
+ struct r600_resource_buffer *rbuffer = r600_buffer(draw->index_buffer);
+ boolean flushed;
+
+ u_upload_data(rctx->upload_vb, 0,
+ draw->info.count * draw->index_size,
+ rbuffer->user_buffer,
+ &draw->index_buffer_offset,
+ &draw->index_buffer, &flushed);
+}
+
+void r600_upload_user_buffers(struct r600_pipe_context *rctx,
+ int min_index, int max_index)
+{
+ int i, nr = rctx->vertex_elements->count;
+ unsigned count = max_index + 1 - min_index;
+ boolean flushed;
+ boolean uploaded[32] = {0};
+
+ for (i = 0; i < nr; i++) {
+ unsigned index = rctx->vertex_elements->elements[i].vertex_buffer_index;
+ struct pipe_vertex_buffer *vb = &rctx->vertex_buffer[index];
+ struct r600_resource_buffer *userbuf = r600_buffer(vb->buffer);
+
+ if (userbuf && userbuf->user_buffer && !uploaded[index]) {
+ unsigned first, size;
+
+ if (vb->stride) {
+ first = vb->stride * min_index;
+ size = vb->stride * count;
+ } else {
+ first = 0;
+ size = rctx->vertex_elements->hw_format_size[i];
+ }
+
+ u_upload_data(rctx->upload_vb, first, size,
+ userbuf->user_buffer + first,
+ &vb->buffer_offset,
+ &rctx->real_vertex_buffer[index],
+ &flushed);
+
+ vb->buffer_offset -= first;
+
+ /* vertex_arrays_dirty = TRUE; */
+ uploaded[index] = TRUE;
+ } else {
+ assert(rctx->real_vertex_buffer[index]);
+ }
+ }
+}
+
+void r600_upload_const_buffer(struct r600_pipe_context *rctx, struct r600_resource_buffer **rbuffer,
+ uint32_t *const_offset)
+{
+ if ((*rbuffer)->user_buffer) {
+ uint8_t *ptr = (*rbuffer)->user_buffer;
+ unsigned size = (*rbuffer)->r.base.b.width0;
+ boolean flushed;
+
+ *rbuffer = NULL;
+
+ u_upload_data(rctx->upload_const, 0, size, ptr, const_offset,
+ (struct pipe_resource**)rbuffer, &flushed);
+ } else {
+ *const_offset = 0;
+ }
+}