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r300g: only check for an empty shader if there are no compile errors
[mesa.git] / src / gallium / drivers / r600 / r600_context.c
diff --git a/src/gallium/drivers/r600/r600_context.c b/src/gallium/drivers/r600/r600_context.c
index f7732d89524bfaf2b0cb9e1f59652837a6909542..9525f15197f649ae6d78c21ba821eed09eb9607c 100644 (file)
--- a/src/gallium/drivers/r600/r600_context.c
+++ b/src/gallium/drivers/r600/r600_context.c
@@ -34,10 +34,31 @@
 #include "r600_resource.h"
 #include "r600d.h"
 
+
 static void r600_destroy_context(struct pipe_context *context)
 {
        struct r600_context *rctx = r600_context(context);
 
+       rctx->rasterizer = r600_context_state_decref(rctx->rasterizer);
+       rctx->poly_stipple = r600_context_state_decref(rctx->poly_stipple);
+       rctx->scissor = r600_context_state_decref(rctx->scissor);
+       rctx->clip = r600_context_state_decref(rctx->clip);
+       rctx->ps_shader = r600_context_state_decref(rctx->ps_shader);
+       rctx->vs_shader = r600_context_state_decref(rctx->vs_shader);
+       rctx->depth = r600_context_state_decref(rctx->depth);
+       rctx->stencil = r600_context_state_decref(rctx->stencil);
+       rctx->alpha = r600_context_state_decref(rctx->alpha);
+       rctx->dsa = r600_context_state_decref(rctx->dsa);
+       rctx->blend = r600_context_state_decref(rctx->blend);
+       rctx->stencil_ref = r600_context_state_decref(rctx->stencil_ref);
+       rctx->viewport = r600_context_state_decref(rctx->viewport);
+       rctx->framebuffer = r600_context_state_decref(rctx->framebuffer);
+
+       free(rctx->ps_constant);
+       free(rctx->vs_constant);
+       free(rctx->vs_resource);
+
+       radeon_ctx_fini(&rctx->ctx);
        FREE(rctx);
 }
 
@@ -45,18 +66,35 @@ void r600_flush(struct pipe_context *ctx, unsigned flags,
                        struct pipe_fence_handle **fence)
 {
        struct r600_context *rctx = r600_context(ctx);
-       struct r600_screen *rscreen = rctx->screen;
+       struct r600_query *rquery;
        static int dc = 0;
+       char dname[256];
 
-       if (radeon_ctx_pm4(&rctx->ctx))
-               return;
+       /* suspend queries */
+       r600_queries_suspend(ctx);
        /* FIXME dumping should be removed once shader support instructions
         * without throwing bad code
         */
-       if (!dc)
-               radeon_ctx_dump_bof(&rctx->ctx, "gallium.bof");
+       if (!rctx->ctx.cdwords)
+               goto out;
+#if 0
+       sprintf(dname, "gallium-%08d.bof", dc);
+       if (dc < 2) {
+               radeon_ctx_dump_bof(&rctx->ctx, dname);
+               R600_ERR("dumped %s\n", dname);
+       }
+#endif
+#if 1
        radeon_ctx_submit(&rctx->ctx);
+#endif
+       LIST_FOR_EACH_ENTRY(rquery, &rctx->query_list, list) {
+               rquery->flushed = true;
+       }
        dc++;
+out:
+       radeon_ctx_clear(&rctx->ctx);
+       /* resume queries */
+       r600_queries_resume(ctx);
 }
 
 static void r600_init_config(struct r600_context *rctx)
@@ -198,25 +236,8 @@ static void r600_init_config(struct r600_context *rctx)
                num_es_stack_entries = 0;
                break;
        }
-       printf("ps_prio : %d\n", ps_prio);
-       printf("vs_prio : %d\n", vs_prio);
-       printf("gs_prio : %d\n", gs_prio);
-       printf("es_prio : %d\n", es_prio);
-       printf("num_ps_gprs : %d\n", num_ps_gprs);
-       printf("num_vs_gprs : %d\n", num_vs_gprs);
-       printf("num_gs_gprs : %d\n", num_gs_gprs);
-       printf("num_es_gprs : %d\n", num_es_gprs);
-       printf("num_temp_gprs : %d\n", num_temp_gprs);
-       printf("num_ps_threads : %d\n", num_ps_threads);
-       printf("num_vs_threads : %d\n", num_vs_threads);
-       printf("num_gs_threads : %d\n", num_gs_threads);
-       printf("num_es_threads : %d\n", num_es_threads);
-       printf("num_ps_stack_entries : %d\n", num_ps_stack_entries);
-       printf("num_vs_stack_entries : %d\n", num_vs_stack_entries);
-       printf("num_gs_stack_entries : %d\n", num_gs_stack_entries);
-       printf("num_es_stack_entries : %d\n", num_es_stack_entries);
+       radeon_state_init(&rctx->config, rctx->rw, R600_STATE_CONFIG, 0, 0);
 
-       radeon_state_init(&rctx->config, rctx->rw, R600_CONFIG_TYPE, R600_CONFIG);
        rctx->config.states[R600_CONFIG__SQ_CONFIG] = 0x00000000;
        switch (family) {
        case CHIP_RV610:
@@ -259,13 +280,24 @@ static void r600_init_config(struct r600_context *rctx)
        rctx->config.states[R600_CONFIG__SQ_STACK_RESOURCE_MGMT_2] |= S_008C14_NUM_GS_STACK_ENTRIES(num_gs_stack_entries);
        rctx->config.states[R600_CONFIG__SQ_STACK_RESOURCE_MGMT_2] |= S_008C14_NUM_ES_STACK_ENTRIES(num_es_stack_entries);
 
-       rctx->config.states[R600_CONFIG__SQ_DYN_GPR_CNTL_PS_FLUSH_REQ] = 0x00004000;
-       rctx->config.states[R600_CONFIG__TA_CNTL_AUX] = 0x07000002;
        rctx->config.states[R600_CONFIG__VC_ENHANCE] = 0x00000000;
-       rctx->config.states[R600_CONFIG__DB_DEBUG] = 0x00000000;
-       rctx->config.states[R600_CONFIG__DB_WATERMARKS] = 0x00420204;
        rctx->config.states[R600_CONFIG__SX_MISC] = 0x00000000;
-       rctx->config.states[R600_CONFIG__SPI_THREAD_GROUPING] = 0x00000001;
+
+       if (family >= CHIP_RV770) {
+               rctx->config.states[R600_CONFIG__SQ_DYN_GPR_CNTL_PS_FLUSH_REQ] = 0x00004000;
+               rctx->config.states[R600_CONFIG__TA_CNTL_AUX] = 0x07000002;
+               rctx->config.states[R600_CONFIG__DB_DEBUG] = 0x00000000;
+               rctx->config.states[R600_CONFIG__DB_WATERMARKS] = 0x00420204;
+               rctx->config.states[R600_CONFIG__SPI_THREAD_GROUPING] = 0x00000000;
+               rctx->config.states[R600_CONFIG__PA_SC_MODE_CNTL] = 0x00514000;
+       } else {
+               rctx->config.states[R600_CONFIG__SQ_DYN_GPR_CNTL_PS_FLUSH_REQ] = 0x00000000;
+               rctx->config.states[R600_CONFIG__TA_CNTL_AUX] = 0x07000003;
+               rctx->config.states[R600_CONFIG__DB_DEBUG] = 0x82000000;
+               rctx->config.states[R600_CONFIG__DB_WATERMARKS] = 0x01020204;
+               rctx->config.states[R600_CONFIG__SPI_THREAD_GROUPING] = 0x00000001;
+               rctx->config.states[R600_CONFIG__PA_SC_MODE_CNTL] = 0x00004010;
+       }
        rctx->config.states[R600_CONFIG__CB_SHADER_CONTROL] = 0x00000003;
        rctx->config.states[R600_CONFIG__SQ_ESGS_RING_ITEMSIZE] = 0x00000000;
        rctx->config.states[R600_CONFIG__SQ_GSVS_RING_ITEMSIZE] = 0x00000000;
@@ -289,7 +321,6 @@ static void r600_init_config(struct r600_context *rctx)
        rctx->config.states[R600_CONFIG__VGT_GROUP_VECT_0_FMT_CNTL] = 0x00000000;
        rctx->config.states[R600_CONFIG__VGT_GROUP_VECT_1_FMT_CNTL] = 0x00000000;
        rctx->config.states[R600_CONFIG__VGT_GS_MODE] = 0x00000000;
-       rctx->config.states[R600_CONFIG__PA_SC_MODE_CNTL] = 0x00514000;
        rctx->config.states[R600_CONFIG__VGT_STRMOUT_EN] = 0x00000000;
        rctx->config.states[R600_CONFIG__VGT_REUSE_OFF] = 0x00000001;
        rctx->config.states[R600_CONFIG__VGT_VTX_CNT_EN] = 0x00000000;
@@ -328,6 +359,24 @@ struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
 
        r600_init_config(rctx);
 
+       rctx->vs_constant = (struct radeon_state *)calloc(R600_MAX_CONSTANT, sizeof(struct radeon_state));
+       if (!rctx->vs_constant) {
+               FREE(rctx);
+               return NULL;
+       }
+
+       rctx->ps_constant = (struct radeon_state *)calloc(R600_MAX_CONSTANT, sizeof(struct radeon_state));
+       if (!rctx->ps_constant) {
+               FREE(rctx);
+               return NULL;
+       }
+
+       rctx->vs_resource = (struct radeon_state *)calloc(R600_MAX_RESOURCE, sizeof(struct radeon_state));
+       if (!rctx->vs_resource) {
+               FREE(rctx);
+               return NULL;
+       }                                                  
+
        radeon_ctx_init(&rctx->ctx, rscreen->rw);
        radeon_draw_init(&rctx->draw, rscreen->rw);
        return &rctx->context;