amd,radeonsi: rename radeon_winsys_cs -> radeon_cmdbuf

[mesa.git] / src / gallium / drivers / r600 / r600_cs.h

diff --git a/src/gallium/drivers/r600/r600_cs.h b/src/gallium/drivers/r600/r600_cs.h
index 0efae09f386f40fded1b436dbee089e9c50b34ee..424adba2782985e78ba473bd4f8664bbb978ee5f 100644 (file)
--- a/src/gallium/drivers/r600/r600_cs.h
+++ b/src/gallium/drivers/r600/r600_cs.h
@@ -42,7 +42,7 @@
  */
 static inline bool
 radeon_cs_memory_below_limit(struct r600_common_screen *screen,
-                            struct radeon_winsys_cs *cs,
+                            struct radeon_cmdbuf *cs,
                             uint64_t vram, uint64_t gtt)
 {
        vram += cs->used_vram;
@@ -108,7 +108,7 @@ radeon_add_to_buffer_list_check_mem(struct r600_common_context *rctx,
            !radeon_cs_memory_below_limit(rctx->screen, ring->cs,
                                          rctx->vram + rbo->vram_usage,
                                          rctx->gtt + rbo->gart_usage))
-               ring->flush(rctx, RADEON_FLUSH_ASYNC, NULL);
+               ring->flush(rctx, PIPE_FLUSH_ASYNC, NULL);
 
        return radeon_add_to_buffer_list(rctx, ring, rbo, usage, priority);
 }
@@ -118,8 +118,8 @@ static inline void r600_emit_reloc(struct r600_common_context *rctx,
                                   enum radeon_bo_usage usage,
                                   enum radeon_bo_priority priority)
 {
-       struct radeon_winsys_cs *cs = ring->cs;
-       bool has_vm = ((struct r600_common_screen*)rctx->b.screen)->info.has_virtual_memory;
+       struct radeon_cmdbuf *cs = ring->cs;
+       bool has_vm = ((struct r600_common_screen*)rctx->b.screen)->info.r600_has_virtual_memory;
        unsigned reloc = radeon_add_to_buffer_list(rctx, ring, rbo, usage, priority);
 
        if (!has_vm) {
@@ -128,7 +128,7 @@ static inline void r600_emit_reloc(struct r600_common_context *rctx,
        }
 }
 
-static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
+static inline void radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num)
 {
        assert(reg < R600_CONTEXT_REG_OFFSET);
        assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
@@ -136,13 +136,13 @@ static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsign
        radeon_emit(cs, (reg - R600_CONFIG_REG_OFFSET) >> 2);
 }
 
-static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
+static inline void radeon_set_config_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value)
 {
        radeon_set_config_reg_seq(cs, reg, 1);
        radeon_emit(cs, value);
 }
 
-static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
+static inline void radeon_set_context_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num)
 {
        assert(reg >= R600_CONTEXT_REG_OFFSET);
        assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
@@ -150,13 +150,13 @@ static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsig
        radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2);
 }
 
-static inline void radeon_set_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
+static inline void radeon_set_context_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value)
 {
        radeon_set_context_reg_seq(cs, reg, 1);
        radeon_emit(cs, value);
 }
 
-static inline void radeon_set_context_reg_idx(struct radeon_winsys_cs *cs,
+static inline void radeon_set_context_reg_idx(struct radeon_cmdbuf *cs,
                                              unsigned reg, unsigned idx,
                                              unsigned value)
 {
@@ -167,7 +167,7 @@ static inline void radeon_set_context_reg_idx(struct radeon_winsys_cs *cs,
        radeon_emit(cs, value);
 }
 
-static inline void radeon_set_sh_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
+static inline void radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num)
 {
        assert(reg >= SI_SH_REG_OFFSET && reg < SI_SH_REG_END);
        assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
@@ -175,13 +175,13 @@ static inline void radeon_set_sh_reg_seq(struct radeon_winsys_cs *cs, unsigned r
        radeon_emit(cs, (reg - SI_SH_REG_OFFSET) >> 2);
 }
 
-static inline void radeon_set_sh_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
+static inline void radeon_set_sh_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value)
 {
        radeon_set_sh_reg_seq(cs, reg, 1);
        radeon_emit(cs, value);
 }
 
-static inline void radeon_set_uconfig_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
+static inline void radeon_set_uconfig_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num)
 {
        assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END);
        assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
@@ -189,13 +189,13 @@ static inline void radeon_set_uconfig_reg_seq(struct radeon_winsys_cs *cs, unsig
        radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2);
 }
 
-static inline void radeon_set_uconfig_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
+static inline void radeon_set_uconfig_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value)
 {
        radeon_set_uconfig_reg_seq(cs, reg, 1);
        radeon_emit(cs, value);
 }
 
-static inline void radeon_set_uconfig_reg_idx(struct radeon_winsys_cs *cs,
+static inline void radeon_set_uconfig_reg_idx(struct radeon_cmdbuf *cs,
                                              unsigned reg, unsigned idx,
                                              unsigned value)
 {