gallium: add a cap to enable double rounding opcodes

[mesa.git] / src / gallium / drivers / r600 / r600_llvm.c

diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c
index 470c65f7af5d3021ee3b9ac3a6dbf57aa8d048e5..af4604435a3bed498f66be0364185ee0b61da661 100644 (file)
--- a/src/gallium/drivers/r600/r600_llvm.c
+++ b/src/gallium/drivers/r600/r600_llvm.c
@@ -689,7 +689,7 @@ static void llvm_emit_tex(
                if (emit_data->inst->Dst[0].Register.WriteMask & 4) {
                        LLVMValueRef offset = lp_build_const_int32(bld_base->base.gallivm, 0);
                        LLVMValueRef ZLayer = LLVMBuildExtractElement(gallivm->builder,
-                               llvm_load_const_buffer(bld_base, offset, LLVM_R600_BUFFER_INFO_CONST_BUFFER,
+                               llvm_load_const_buffer(bld_base, offset, LLVM_R600_BUFFER_INFO_CONST_BUFFER),
                                lp_build_const_int32(gallivm, 0), "");
 
                        emit_data->output[0] = LLVMBuildInsertElement(gallivm->builder, emit_data->output[0], ZLayer, lp_build_const_int32(gallivm, 2), "");
@@ -881,12 +881,14 @@ unsigned r600_llvm_compile(
        const char * gpu_family = r600_get_llvm_processor_name(family);
 
        memset(&binary, 0, sizeof(struct radeon_shader_binary));
-       r = radeon_llvm_compile(mod, &binary, gpu_family, dump);
+       r = radeon_llvm_compile(mod, &binary, gpu_family, dump, NULL);
 
        r = r600_create_shader(bc, &binary, use_kill);
 
        FREE(binary.code);
        FREE(binary.config);
+       FREE(binary.rodata);
+       FREE(binary.global_symbol_offsets);
 
        return r;
 }