r600: Update state code to accept NIR shaders

[mesa.git] / src / gallium / drivers / r600 / r600_opcodes.h

diff --git a/src/gallium/drivers/r600/r600_opcodes.h b/src/gallium/drivers/r600/r600_opcodes.h
index e8582cc32dd0dec92beed560eb81ca0530e207b8..b27e123c05466673591946e47e5d4bcd9b6be77c 100644 (file)
--- a/src/gallium/drivers/r600/r600_opcodes.h
+++ b/src/gallium/drivers/r600/r600_opcodes.h
@@ -2,18 +2,18 @@
 #ifndef R600_OPCODES_H
 #define R600_OPCODES_H
 
-#define R600_S_SQ_CF_WORD1_CF_INST(x)                              (((x) & 0x7F) << 23)
+#define R600_S_SQ_CF_WORD1_CF_INST(x)                              (((unsigned)(x) & 0x7F) << 23)
 #define R600_G_SQ_CF_WORD1_CF_INST(x)                              (((x) >> 23) & 0x7F)
-#define R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x)                 (((x) & 0x7F) << 23)
+#define R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x)                 (((unsigned)(x) & 0x7F) << 23)
 #define R600_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x)                 (((x) >> 23) & 0x7F)
-#define R600_S_SQ_CF_ALU_WORD1_CF_INST(x)                          (((x) & 0xF) << 26)
+#define R600_S_SQ_CF_ALU_WORD1_CF_INST(x)                          (((unsigned)(x) & 0xF) << 26)
 #define R600_G_SQ_CF_ALU_WORD1_CF_INST(x)                          (((x) >> 26) & 0xF)
 
-#define EG_S_SQ_CF_WORD1_CF_INST(x)                                (((x) & 0xFF) << 22)
+#define EG_S_SQ_CF_WORD1_CF_INST(x)                                (((unsigned)(x) & 0xFF) << 22)
 #define EG_G_SQ_CF_WORD1_CF_INST(x)                                (((x) >> 22) & 0xFF)
-#define EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x)                   (((x) & 0xFF) << 22)
+#define EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x)                   (((unsigned)(x) & 0xFF) << 22)
 #define EG_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x)                   (((x) >> 22) & 0xFF)
-#define EG_S_SQ_CF_ALU_WORD1_CF_INST(x)                            (((x) & 0xF) << 26)
+#define EG_S_SQ_CF_ALU_WORD1_CF_INST(x)                            (((unsigned)(x) & 0xF) << 26)
 #define EG_G_SQ_CF_ALU_WORD1_CF_INST(x)                            (((x) >> 26) & 0xF)
 
 #define     V_SQ_CF_WORD1_SQ_CF_INST_NOP                             R600_S_SQ_CF_WORD1_CF_INST(0x00000000)
@@ -433,16 +433,16 @@
 #define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_PREV                  0x000000D3
 #define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULADD_PREV               0x000000D4
 #define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULADD_IEEE_PREV          0x000000D5
-#define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_XY                      0x000000D6
-#define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_ZW                      0x000000D7
-#define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_X                       0x000000D8
-#define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_Z                       0x000000D9
+#define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_XY                 0x000000D6
+#define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_ZW                 0x000000D7
+#define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_X                  0x000000D8
+#define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_Z                  0x000000D9
 #define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_STORE_FLAGS               0x000000DA
 #define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOAD_STORE_FLAGS          0x000000DB
 #define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LDS_1A                    0x000000DC
 #define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LDS_1A1D                  0x000000DD
 #define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LDS_2A                    0x000000DF
-#define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_LOAD_P0                 0x000000E0
+#define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P0            0x000000E0
 #define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P10           0x000000E1
 #define     EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P20           0x000000E2