* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
-#include <stdio.h>
+#include "r600_pipe.h"
+#include "r600_public.h"
+
#include <errno.h>
-#include "pipe/p_defines.h"
-#include "pipe/p_state.h"
-#include "pipe/p_context.h"
-#include "tgsi/tgsi_scan.h"
-#include "tgsi/tgsi_parse.h"
-#include "tgsi/tgsi_util.h"
+#include "pipe/p_shader_tokens.h"
#include "util/u_blitter.h"
-#include "util/u_double_list.h"
-#include "util/u_format.h"
#include "util/u_format_s3tc.h"
-#include "util/u_transfer.h"
-#include "util/u_surface.h"
-#include "util/u_pack_color.h"
-#include "util/u_memory.h"
-#include "util/u_inlines.h"
-#include "util/u_upload_mgr.h"
+#include "util/u_simple_shaders.h"
#include "vl/vl_decoder.h"
#include "vl/vl_video_buffer.h"
#include "os/os_time.h"
-#include "pipebuffer/pb_buffer.h"
-#include "r600.h"
-#include "r600d.h"
-#include "r600_resource.h"
-#include "r600_shader.h"
-#include "r600_pipe.h"
-#include "r600_hw_context_priv.h"
/*
* pipe_context
{
struct r600_context *rctx = (struct r600_context *)context;
- rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
+ if (rctx->dummy_pixel_shader) {
+ rctx->context.delete_fs_state(&rctx->context, rctx->dummy_pixel_shader);
+ }
+ if (rctx->custom_dsa_flush) {
+ rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
+ }
util_unreference_framebuffer_state(&rctx->framebuffer);
r600_context_fini(rctx);
- util_blitter_destroy(rctx->blitter);
-
+ if (rctx->blitter) {
+ util_blitter_destroy(rctx->blitter);
+ }
for (int i = 0; i < R600_PIPE_NSTATES; i++) {
free(rctx->states[i]);
}
- u_vbuf_destroy(rctx->vbuf_mgr);
+ if (rctx->vbuf_mgr) {
+ u_vbuf_destroy(rctx->vbuf_mgr);
+ }
util_slab_destroy(&rctx->pool_transfers);
r600_update_num_contexts(rctx->screen, -1);
- r600_release_command_buffer(&rctx->atom_start_cs);
+ r600_release_command_buffer(&rctx->start_cs_cmd);
+
+ if (rctx->cs) {
+ rctx->ws->cs_destroy(rctx->cs);
+ }
+
+ FREE(rctx->range);
FREE(rctx);
}
if (rctx == NULL)
return NULL;
+ util_slab_create(&rctx->pool_transfers,
+ sizeof(struct pipe_transfer), 64,
+ UTIL_SLAB_SINGLETHREADED);
+
r600_update_num_contexts(rscreen, 1);
rctx->context.screen = screen;
rctx->family = rscreen->family;
rctx->chip_class = rscreen->chip_class;
+ LIST_INITHEAD(&rctx->dirty_states);
+ LIST_INITHEAD(&rctx->active_timer_queries);
+ LIST_INITHEAD(&rctx->active_nontimer_queries);
+ LIST_INITHEAD(&rctx->dirty);
+ LIST_INITHEAD(&rctx->resource_dirty);
+ LIST_INITHEAD(&rctx->enable_list);
+
+ rctx->range = CALLOC(NUM_RANGES, sizeof(struct r600_range));
+ if (!rctx->range)
+ goto fail;
+
r600_init_blit_functions(rctx);
r600_init_query_functions(rctx);
r600_init_context_resource_functions(rctx);
case R700:
r600_init_state_functions(rctx);
r600_init_atom_start_cs(rctx);
- if (r600_context_init(rctx)) {
- r600_destroy_context(&rctx->context);
- return NULL;
- }
+ if (r600_context_init(rctx))
+ goto fail;
rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
+ rctx->has_vertex_cache = !(rctx->family == CHIP_RV610 ||
+ rctx->family == CHIP_RV620 ||
+ rctx->family == CHIP_RS780 ||
+ rctx->family == CHIP_RS880 ||
+ rctx->family == CHIP_RV710);
break;
case EVERGREEN:
case CAYMAN:
evergreen_init_state_functions(rctx);
evergreen_init_atom_start_cs(rctx);
- if (evergreen_context_init(rctx)) {
- r600_destroy_context(&rctx->context);
- return NULL;
- }
+ if (evergreen_context_init(rctx))
+ goto fail;
rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
+ rctx->has_vertex_cache = !(rctx->family == CHIP_CEDAR ||
+ rctx->family == CHIP_PALM ||
+ rctx->family == CHIP_SUMO ||
+ rctx->family == CHIP_SUMO2 ||
+ rctx->family == CHIP_CAICOS ||
+ rctx->family == CHIP_CAYMAN ||
+ rctx->family == CHIP_ARUBA);
break;
default:
R600_ERR("Unsupported chip class %d.\n", rctx->chip_class);
- r600_destroy_context(&rctx->context);
- return NULL;
+ goto fail;
}
+ rctx->cs = rctx->ws->cs_create(rctx->ws);
rctx->ws->cs_set_flush_callback(rctx->cs, r600_flush_from_winsys, rctx);
-
- util_slab_create(&rctx->pool_transfers,
- sizeof(struct pipe_transfer), 64,
- UTIL_SLAB_SINGLETHREADED);
+ r600_emit_atom(rctx, &rctx->start_cs_cmd.atom);
rctx->vbuf_mgr = u_vbuf_create(&rctx->context, 1024 * 1024, 256,
PIPE_BIND_VERTEX_BUFFER |
PIPE_BIND_INDEX_BUFFER |
PIPE_BIND_CONSTANT_BUFFER,
U_VERTEX_FETCH_DWORD_ALIGNED);
- if (!rctx->vbuf_mgr) {
- r600_destroy_context(&rctx->context);
- return NULL;
- }
+ if (!rctx->vbuf_mgr)
+ goto fail;
rctx->vbuf_mgr->caps.format_fixed32 = 0;
rctx->blitter = util_blitter_create(&rctx->context);
- if (rctx->blitter == NULL) {
- r600_destroy_context(&rctx->context);
- return NULL;
- }
-
- LIST_INITHEAD(&rctx->dirty_states);
+ if (rctx->blitter == NULL)
+ goto fail;
r600_get_backend_mask(rctx); /* this emits commands and must be last */
+ if (rctx->chip_class == R600)
+ r600_set_max_scissor(rctx);
+
+ rctx->dummy_pixel_shader =
+ util_make_fragment_cloneinput_shader(&rctx->context, 0,
+ TGSI_SEMANTIC_GENERIC,
+ TGSI_INTERPOLATE_CONSTANT);
+ rctx->context.bind_fs_state(&rctx->context, rctx->dummy_pixel_shader);
+
return &rctx->context;
+
+fail:
+ r600_destroy_context(&rctx->context);
+ return NULL;
}
/*
case CHIP_TURKS: return "AMD TURKS";
case CHIP_CAICOS: return "AMD CAICOS";
case CHIP_CAYMAN: return "AMD CAYMAN";
+ case CHIP_ARUBA: return "AMD ARUBA";
default: return "AMD unknown";
}
}
/* Supported features (boolean caps). */
case PIPE_CAP_NPOT_TEXTURES:
case PIPE_CAP_TWO_SIDED_STENCIL:
- case PIPE_CAP_DUAL_SOURCE_BLEND:
case PIPE_CAP_ANISOTROPIC_FILTER:
case PIPE_CAP_POINT_SPRITE:
case PIPE_CAP_OCCLUSION_QUERY:
case PIPE_CAP_TEXTURE_BARRIER:
case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
+ case PIPE_CAP_TGSI_INSTANCEID:
return 1;
case PIPE_CAP_GLSL_FEATURE_LEVEL:
- return debug_get_bool_option("R600_GLSL130", FALSE) ? 130 : 120;
+ return rscreen->glsl_feature_level;
/* Supported except the original R600. */
case PIPE_CAP_INDEP_BLEND_ENABLE:
return family >= CHIP_CEDAR ? 1 : 0;
/* Unsupported features. */
- case PIPE_CAP_TGSI_INSTANCEID:
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
case PIPE_CAP_SCALED_RESOLVE:
/* Stream output. */
case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
- return debug_get_bool_option("R600_STREAMOUT", FALSE) ? 4 : 0;
+ return rscreen->info.r600_has_streamout ? 4 : 0;
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
- return debug_get_bool_option("R600_STREAMOUT", FALSE) ? 1 : 0;
+ return rscreen->info.r600_has_streamout ? 1 : 0;
case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
return 16*4;
/* Render targets. */
case PIPE_CAP_MAX_RENDER_TARGETS:
- /* FIXME some r6xx are buggy and can only do 4 */
+ /* XXX some r6xx are buggy and can only do 4 */
return 8;
/* Timer queries, present when the clock frequency is non zero. */
case PIPE_CAP_MAX_TEXEL_OFFSET:
return 7;
+
+ case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
+ return (family < CHIP_RV770) ? 1 : 0;
}
return 0;
}
static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
{
+ struct r600_screen *rscreen = (struct r600_screen *)pscreen;
switch(shader)
{
case PIPE_SHADER_FRAGMENT:
case PIPE_SHADER_VERTEX:
break;
case PIPE_SHADER_GEOMETRY:
- /* TODO: support and enable geometry programs */
+ /* XXX: support and enable geometry programs */
return 0;
default:
- /* TODO: support tessellation on Evergreen */
+ /* XXX: support tessellation on Evergreen */
return 0;
}
- /* TODO: all these should be fixed, since r600 surely supports much more! */
+ /* XXX: all these should be fixed, since r600 surely supports much more! */
switch (param) {
case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
return 16384;
case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
- return 8; /* FIXME */
+ return 8; /* XXX */
case PIPE_SHADER_CAP_MAX_INPUTS:
if(shader == PIPE_SHADER_FRAGMENT)
return 34;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 256; /* Max native temporaries. */
case PIPE_SHADER_CAP_MAX_ADDRS:
- /* FIXME Isn't this equal to TEMPS? */
+ /* XXX Isn't this equal to TEMPS? */
return 1; /* Max native address registers */
case PIPE_SHADER_CAP_MAX_CONSTS:
return R600_MAX_CONST_BUFFER_SIZE;
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return R600_MAX_CONST_BUFFERS-1;
case PIPE_SHADER_CAP_MAX_PREDS:
- return 0; /* FIXME */
+ return 0; /* nothing uses this */
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 1;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
case PIPE_SHADER_CAP_SUBROUTINES:
return 0;
case PIPE_SHADER_CAP_INTEGERS:
- return 0;
+ return rscreen->glsl_feature_level >= 130;
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
return 16;
- case PIPE_SHADER_CAP_OUTPUT_READ:
- return 1;
}
return 0;
}
struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
{
struct r600_screen *rscreen = CALLOC_STRUCT(r600_screen);
+ boolean glsl130_default;
if (rscreen == NULL) {
return NULL;
}
}
/* setup class */
- if (rscreen->family == CHIP_CAYMAN) {
+ if (rscreen->family >= CHIP_CAYMAN) {
rscreen->chip_class = CAYMAN;
} else if (rscreen->family >= CHIP_CEDAR) {
rscreen->chip_class = EVERGREEN;
rscreen->chip_class = R600;
}
+ /* XXX streamout is said to be broken on r700 and cayman */
+ if ((rscreen->chip_class == R700 ||
+ rscreen->chip_class == CAYMAN) &&
+ !debug_get_bool_option("R600_STREAMOUT", FALSE)) {
+ rscreen->info.r600_has_streamout = false;
+ }
+
if (r600_init_tiling(rscreen)) {
FREE(rscreen);
return NULL;
LIST_INITHEAD(&rscreen->fences.blocks);
pipe_mutex_init(rscreen->fences.mutex);
+ rscreen->use_surface_alloc = debug_get_bool_option("R600_SURF", TRUE);
+ glsl130_default = (rscreen->chip_class >= R600 && rscreen->chip_class <= EVERGREEN) ? TRUE : FALSE;
+ rscreen->glsl_feature_level = debug_get_bool_option("R600_GLSL130", glsl130_default) ? 130 : 120;
+
return &rscreen->screen;
}
projects / mesa.git / blobdiff