r600g: use TGSI_PROPERTY to disable viewport and clipping

[mesa.git] / src / gallium / drivers / r600 / r600_pipe.c

diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 983c65a26a6524df64b9e832678799b721bfb941..2b65056c9531ad43e7a577b2d337b3d2f2b1631a 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -45,7 +45,7 @@
 static const struct debug_named_value r600_debug_options[] = {
        /* features */
 #if defined(R600_USE_LLVM)
-       { "nollvm", DBG_NO_LLVM, "Disable the LLVM shader compiler" },
+       { "llvm", DBG_LLVM, "Enable the LLVM shader compiler" },
 #endif
        { "nocpdma", DBG_NO_CP_DMA, "Disable CP DMA" },
 
@@ -66,22 +66,6 @@ static const struct debug_named_value r600_debug_options[] = {
  * pipe_context
  */
 
-static void r600_flush_from_st(struct pipe_context *ctx,
-                              struct pipe_fence_handle **fence,
-                              unsigned flags)
-{
-       struct r600_context *rctx = (struct r600_context *)ctx;
-       unsigned fflags;
-
-       fflags = flags & PIPE_FLUSH_END_OF_FRAME ? RADEON_FLUSH_END_OF_FRAME : 0;
-
-       /* flush gfx & dma ring, order does not matter as only one can be live */
-       if (rctx->b.rings.dma.cs) {
-               rctx->b.rings.dma.flush(rctx, fflags, NULL);
-       }
-       rctx->b.rings.gfx.flush(rctx, fflags, fence);
-}
-
 static void r600_destroy_context(struct pipe_context *context)
 {
        struct r600_context *rctx = (struct r600_context *)context;
@@ -137,7 +121,6 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
        rctx->b.b.screen = screen;
        rctx->b.b.priv = priv;
        rctx->b.b.destroy = r600_destroy_context;
-       rctx->b.b.flush = r600_flush_from_st;
 
        if (!r600_common_context_init(&rctx->b, &rscreen->b))
                goto fail;
@@ -277,7 +260,8 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
        case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
        case PIPE_CAP_TEXTURE_MULTISAMPLE:
-        case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
+       case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
+       case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
                return 1;
 
        case PIPE_CAP_COMPUTE:
@@ -331,6 +315,8 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
        case PIPE_CAP_TEXTURE_GATHER_SM5:
        case PIPE_CAP_TEXTURE_QUERY_LOD:
+       case PIPE_CAP_SAMPLE_SHADING:
+       case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
                return 0;
 
        /* Stream output. */
@@ -522,8 +508,8 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
                rscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;
        if (debug_get_bool_option("R600_HYPERZ", FALSE))
                rscreen->b.debug_flags |= DBG_HYPERZ;
-       if (!debug_get_bool_option("R600_LLVM", TRUE))
-               rscreen->b.debug_flags |= DBG_NO_LLVM;
+       if (debug_get_bool_option("R600_LLVM", FALSE))
+               rscreen->b.debug_flags |= DBG_LLVM;
 
        if (rscreen->b.family == CHIP_UNKNOWN) {
                fprintf(stderr, "r600: Unknown chipset 0x%04X\n", rscreen->b.info.pci_id);