panfrost: ci: Tweak dEQP to improve throughput

[mesa.git] / src / gallium / drivers / r600 / r600_pipe.c

diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 43f2dfae7ec57abad4c408993798e5ce0f5e370e..41a878ab9d249615adbdc2b16e73504a2a09ac09 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -32,6 +32,7 @@
 #include "pipe/p_shader_tokens.h"
 #include "util/u_debug.h"
 #include "util/u_memory.h"
+#include "util/u_screen.h"
 #include "util/u_simple_shaders.h"
 #include "util/u_upload_mgr.h"
 #include "util/u_math.h"
@@ -65,7 +66,7 @@ static const struct debug_named_value r600_debug_options[] = {
 static void r600_destroy_context(struct pipe_context *context)
 {
        struct r600_context *rctx = (struct r600_context *)context;
-       unsigned sh;
+       unsigned sh, i;
 
        r600_isa_destroy(rctx->isa);
 
@@ -104,6 +105,16 @@ static void r600_destroy_context(struct pipe_context *context)
        }
        util_unreference_framebuffer_state(&rctx->framebuffer.state);
 
+       if (rctx->gs_rings.gsvs_ring.buffer)
+               pipe_resource_reference(&rctx->gs_rings.gsvs_ring.buffer, NULL);
+
+       if (rctx->gs_rings.esgs_ring.buffer)
+               pipe_resource_reference(&rctx->gs_rings.esgs_ring.buffer, NULL);
+
+       for (sh = 0; sh < PIPE_SHADER_TYPES; ++sh)
+               for (i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; ++i)
+                       rctx->b.b.set_constant_buffer(context, sh, i, NULL);
+
        if (rctx->blitter) {
                util_blitter_destroy(rctx->blitter);
        }
@@ -201,7 +212,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
        }
 
        rctx->b.gfx.cs = ws->cs_create(rctx->b.ctx, RING_GFX,
-                                      r600_context_gfx_flush, rctx);
+                                      r600_context_gfx_flush, rctx, false);
        rctx->b.gfx.flush = r600_context_gfx_flush;
 
        rctx->allocator_fetch_shader =
@@ -256,9 +267,11 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_POINT_SPRITE:
        case PIPE_CAP_OCCLUSION_QUERY:
        case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
+       case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
        case PIPE_CAP_BLEND_EQUATION_SEPARATE:
        case PIPE_CAP_TEXTURE_SWIZZLE:
        case PIPE_CAP_DEPTH_CLIP_DISABLE:
+       case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
        case PIPE_CAP_SHADER_STENCIL_EXPORT:
        case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
        case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
@@ -304,6 +317,10 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
                return 1;
 
+       case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
+               /* Optimal number for good TexSubImage performance on Polaris10. */
+               return 64 * 1024 * 1024;
+
        case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
                return rscreen->b.info.drm_major == 2 && rscreen->b.info.drm_minor >= 43;
 
@@ -339,6 +356,9 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
                   return 330;
                return 140;
 
+       case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
+               return 140;
+
        /* Supported except the original R600. */
        case PIPE_CAP_INDEP_BLEND_ENABLE:
        case PIPE_CAP_INDEP_BLEND_FUNC:
@@ -369,6 +389,15 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
                return 8;
 
+       case PIPE_CAP_MAX_GS_INVOCATIONS:
+               return 32;
+
+       /* shader buffer objects */
+       case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
+               return 1 << 27;
+       case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
+               return 8;
+
        /* Unsupported features. */
        case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
        case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
@@ -415,6 +444,14 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_FENCE_SIGNAL:
        case PIPE_CAP_CONSTBUF0_FLAGS:
        case PIPE_CAP_PACKED_UNIFORMS:
+       case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
+       case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
+       case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
+       case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
+       case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
+       case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
+       case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
+       case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
                return 0;
 
        case PIPE_CAP_DOUBLES:
@@ -456,7 +493,8 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
                return family >= CHIP_CEDAR ? 4 : 1;
 
        case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
-               return 2047;
+               /* Should be 2047, but 2048 is a requirement for GL 4.4 */
+               return 2048;
 
        /* Texturing. */
        case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
@@ -480,6 +518,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_MAX_VIEWPORTS:
                return R600_MAX_VIEWPORTS;
        case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
+       case PIPE_CAP_RASTERIZER_SUBPIXEL_BITS:
                return 8;
 
        /* Timer queries, present when the clock frequency is non zero. */
@@ -497,6 +536,9 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_MAX_TEXEL_OFFSET:
                return 7;
 
+       case PIPE_CAP_MAX_VARYINGS:
+               return 32;
+
        case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
                return PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600;
        case PIPE_CAP_ENDIANNESS:
@@ -522,8 +564,19 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
                return rscreen->b.info.pci_dev;
        case PIPE_CAP_PCI_FUNCTION:
                return rscreen->b.info.pci_func;
+
+       case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
+               if (rscreen->b.family >= CHIP_CEDAR && rscreen->has_atomics)
+                       return 8;
+               return 0;
+       case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
+               if (rscreen->b.family >= CHIP_CEDAR && rscreen->has_atomics)
+                       return EG_MAX_ATOMIC_BUFFERS;
+               return 0;
+
+       default:
+               return u_pipe_screen_get_param_defaults(pscreen, param);
        }
-       return 0;
 }
 
 static int r600_get_shader_param(struct pipe_screen* pscreen,
@@ -639,6 +692,8 @@ static int r600_get_shader_param(struct pipe_screen* pscreen,
                        return EG_MAX_ATOMIC_BUFFERS;
                }
                return 0;
+       case PIPE_SHADER_CAP_SCALAR_ISA:
+               return 0;
        case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
                /* due to a bug in the shader compiler, some loops hang
                 * if they are not unrolled, see: