r600/eg: add support for tracing IBs after a hang.

[mesa.git] / src / gallium / drivers / r600 / r600_pipe.c

diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 5f69a5d1b2ffbbbf03efcb5d2d6651fb3b79e447..71dc16e50611c89b09a228aefe52aa75ac6ae9cb 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -111,6 +111,11 @@ static void r600_destroy_context(struct pipe_context *context)
        FREE(rctx->start_compute_cs_cmd.buf);
 
        r600_common_context_cleanup(&rctx->b);
+
+       r600_resource_reference(&rctx->trace_buf, NULL);
+       r600_resource_reference(&rctx->last_trace_buf, NULL);
+       radeon_clear_saved_cs(&rctx->last_gfx);
+
        FREE(rctx);
 }
 
@@ -133,10 +138,11 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
                goto fail;
 
        rctx->screen = rscreen;
+       LIST_INITHEAD(&rctx->texture_buffers);
 
        r600_init_blit_functions(rctx);
 
-       if (rscreen->b.info.has_uvd) {
+       if (rscreen->b.info.has_hw_decode) {
                rctx->b.b.create_video_codec = r600_uvd_create_decoder;
                rctx->b.b.create_video_buffer = r600_video_buffer_create;
        } else {
@@ -144,6 +150,8 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
                rctx->b.b.create_video_buffer = vl_video_buffer_create;
        }
 
+       if (getenv("R600_TRACE"))
+               rctx->is_debug = true;
        r600_init_common_state_functions(rctx);
 
        switch (rctx->b.chip_class) {
@@ -187,8 +195,9 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
                                       r600_context_gfx_flush, rctx);
        rctx->b.gfx.flush = r600_context_gfx_flush;
 
-       rctx->allocator_fetch_shader = u_suballocator_create(&rctx->b.b, 64 * 1024,
-                                                            0, PIPE_USAGE_DEFAULT, FALSE);
+       rctx->allocator_fetch_shader =
+               u_suballocator_create(&rctx->b.b, 64 * 1024,
+                                     0, PIPE_USAGE_DEFAULT, 0, FALSE);
        if (!rctx->allocator_fetch_shader)
                goto fail;
 
@@ -206,7 +215,6 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
        rctx->blitter->draw_rectangle = r600_draw_rectangle;
 
        r600_begin_new_cs(rctx);
-       r600_query_init_backend_mask(&rctx->b); /* this emits commands and must be last */
 
        rctx->dummy_pixel_shader =
                util_make_fragment_cloneinput_shader(&rctx->b.b, 0,
@@ -234,6 +242,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        /* Supported features (boolean caps). */
        case PIPE_CAP_NPOT_TEXTURES:
        case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
+       case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
        case PIPE_CAP_TWO_SIDED_STENCIL:
        case PIPE_CAP_ANISOTROPIC_FILTER:
        case PIPE_CAP_POINT_SPRITE:
@@ -259,7 +268,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
        case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
        case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
-       case PIPE_CAP_USER_INDEX_BUFFERS:
        case PIPE_CAP_USER_CONSTANT_BUFFERS:
        case PIPE_CAP_START_INSTANCE:
        case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
@@ -284,6 +292,9 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
        case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
        case PIPE_CAP_CLEAR_TEXTURE:
+       case PIPE_CAP_TGSI_MUL_ZERO_WINS:
+       case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
+       case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
                return 1;
 
        case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
@@ -334,6 +345,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_TEXTURE_QUERY_LOD:
        case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
        case PIPE_CAP_SAMPLER_VIEW_TARGET:
+       case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
                return family >= CHIP_CEDAR ? 1 : 0;
        case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
                return family >= CHIP_CEDAR ? 4 : 0;
@@ -357,7 +369,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
        case PIPE_CAP_SHAREABLE_SHADERS:
        case PIPE_CAP_DRAW_PARAMETERS:
-       case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
        case PIPE_CAP_MULTI_DRAW_INDIRECT:
        case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
        case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
@@ -371,6 +382,27 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
        case PIPE_CAP_TGSI_VOTE:
        case PIPE_CAP_MAX_WINDOW_RECTANGLES:
+       case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
+       case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
+       case PIPE_CAP_NATIVE_FENCE_FD:
+       case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
+       case PIPE_CAP_TGSI_FS_FBFETCH:
+       case PIPE_CAP_INT64:
+       case PIPE_CAP_INT64_DIVMOD:
+       case PIPE_CAP_TGSI_TEX_TXF_LZ:
+       case PIPE_CAP_TGSI_CLOCK:
+       case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
+       case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
+       case PIPE_CAP_TGSI_BALLOT:
+       case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
+               return 0;
+
+       case PIPE_CAP_DOUBLES:
+               if (rscreen->b.family == CHIP_ARUBA ||
+                   rscreen->b.family == CHIP_CAYMAN ||
+                   rscreen->b.family == CHIP_CYPRESS ||
+                   rscreen->b.family == CHIP_HEMLOCK)
+                       return 1;
                return 0;
 
        case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
@@ -382,6 +414,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
                return rscreen->b.has_streamout ? 4 : 0;
        case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
+       case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
                return rscreen->b.has_streamout ? 1 : 0;
        case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
        case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
@@ -466,7 +499,9 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        return 0;
 }
 
-static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
+static int r600_get_shader_param(struct pipe_screen* pscreen,
+                                enum pipe_shader_type shader,
+                                enum pipe_shader_cap param)
 {
        struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 
@@ -518,8 +553,6 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
                }
        case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
                return R600_MAX_USER_CONST_BUFFERS;
-       case PIPE_SHADER_CAP_MAX_PREDS:
-               return 0; /* nothing uses this */
        case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
                return 1;
        case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
@@ -546,7 +579,6 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
        case PIPE_SHADER_CAP_SUPPORTED_IRS:
                return 0;
        case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
-       case PIPE_SHADER_CAP_DOUBLES:
                if (rscreen->b.family == CHIP_ARUBA ||
                    rscreen->b.family == CHIP_CAYMAN ||
                    rscreen->b.family == CHIP_CYPRESS ||
@@ -557,6 +589,8 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
        case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
        case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
        case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
+       case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
                return 0;
        case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
                /* due to a bug in the shader compiler, some loops hang
@@ -679,6 +713,12 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
        rscreen->b.has_cp_dma = rscreen->b.info.drm_minor >= 27 &&
                              !(rscreen->b.debug_flags & DBG_NO_CP_DMA);
 
+       rscreen->b.barrier_flags.cp_to_L2 =
+               R600_CONTEXT_INV_VERTEX_CACHE |
+               R600_CONTEXT_INV_TEX_CACHE |
+               R600_CONTEXT_INV_CONST_CACHE;
+       rscreen->b.barrier_flags.compute_to_L2 = R600_CONTEXT_PS_PARTIAL_FLUSH;
+
        rscreen->global_pool = compute_memory_pool_new(rscreen);
 
        /* Create the auxiliary context. This must be done last. */
@@ -719,5 +759,6 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
        if (rscreen->b.debug_flags & DBG_TEST_DMA)
                r600_test_dma(&rscreen->b);
 
+       r600_query_fix_enabled_rb_mask(&rscreen->b);
        return &rscreen->b.b;
 }