lima/ppir: enable vectorize optimization
[mesa.git] / src / gallium / drivers / r600 / r600_pipe.c
index cf9324df35d003ffdcbd5ee87821e90848be2789..793f86ef7062cd31f378a252cca234eb08e91009 100644 (file)
@@ -32,6 +32,7 @@
 #include "pipe/p_shader_tokens.h"
 #include "util/u_debug.h"
 #include "util/u_memory.h"
+#include "util/u_screen.h"
 #include "util/u_simple_shaders.h"
 #include "util/u_upload_mgr.h"
 #include "util/u_math.h"
@@ -104,6 +105,12 @@ static void r600_destroy_context(struct pipe_context *context)
        }
        util_unreference_framebuffer_state(&rctx->framebuffer.state);
 
+       if (rctx->gs_rings.gsvs_ring.buffer)
+               pipe_resource_reference(&rctx->gs_rings.gsvs_ring.buffer, NULL);
+
+       if (rctx->gs_rings.esgs_ring.buffer)
+               pipe_resource_reference(&rctx->gs_rings.esgs_ring.buffer, NULL);
+
        for (sh = 0; sh < PIPE_SHADER_TYPES; ++sh)
                for (i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; ++i)
                        rctx->b.b.set_constant_buffer(context, sh, i, NULL);
@@ -205,7 +212,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
        }
 
        rctx->b.gfx.cs = ws->cs_create(rctx->b.ctx, RING_GFX,
-                                      r600_context_gfx_flush, rctx);
+                                      r600_context_gfx_flush, rctx, false);
        rctx->b.gfx.flush = r600_context_gfx_flush;
 
        rctx->allocator_fetch_shader =
@@ -260,15 +267,19 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_POINT_SPRITE:
        case PIPE_CAP_OCCLUSION_QUERY:
        case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
+       case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
        case PIPE_CAP_BLEND_EQUATION_SEPARATE:
        case PIPE_CAP_TEXTURE_SWIZZLE:
        case PIPE_CAP_DEPTH_CLIP_DISABLE:
+       case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
        case PIPE_CAP_SHADER_STENCIL_EXPORT:
        case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
        case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
        case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
        case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
-       case PIPE_CAP_SM3:
+       case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
+       case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
+       case PIPE_CAP_VERTEX_SHADER_SATURATE:
        case PIPE_CAP_SEAMLESS_CUBE_MAP:
        case PIPE_CAP_PRIMITIVE_RESTART:
        case PIPE_CAP_CONDITIONAL_RENDER:
@@ -308,8 +319,12 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
                return 1;
 
+       case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
+               /* Optimal number for good TexSubImage performance on Polaris10. */
+               return 64 * 1024 * 1024;
+
        case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
-               return rscreen->b.info.drm_major == 2 && rscreen->b.info.drm_minor >= 43;
+               return rscreen->b.info.drm_minor >= 43;
 
        case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
                return !R600_BIG_ENDIAN && rscreen->b.info.has_userptr;
@@ -378,8 +393,12 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 
        case PIPE_CAP_MAX_GS_INVOCATIONS:
                return 32;
+
+       /* shader buffer objects */
        case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
                return 1 << 27;
+       case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
+               return 8;
 
        /* Unsupported features. */
        case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
@@ -406,7 +425,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
        case PIPE_CAP_NATIVE_FENCE_FD:
        case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
-       case PIPE_CAP_TGSI_FS_FBFETCH:
+       case PIPE_CAP_FBFETCH:
        case PIPE_CAP_INT64:
        case PIPE_CAP_INT64_DIVMOD:
        case PIPE_CAP_TGSI_TEX_TXF_LZ:
@@ -480,7 +499,11 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
                return 2048;
 
        /* Texturing. */
-       case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
+       case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
+               if (family >= CHIP_CEDAR)
+                       return 16384;
+               else
+                       return 8192;
        case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
                if (family >= CHIP_CEDAR)
                        return 15;
@@ -501,6 +524,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_MAX_VIEWPORTS:
                return R600_MAX_VIEWPORTS;
        case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
+       case PIPE_CAP_RASTERIZER_SUBPIXEL_BITS:
                return 8;
 
        /* Timer queries, present when the clock frequency is non zero. */
@@ -518,6 +542,9 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_MAX_TEXEL_OFFSET:
                return 7;
 
+       case PIPE_CAP_MAX_VARYINGS:
+               return 32;
+
        case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
                return PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600;
        case PIPE_CAP_ENDIANNESS:
@@ -543,8 +570,19 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
                return rscreen->b.info.pci_dev;
        case PIPE_CAP_PCI_FUNCTION:
                return rscreen->b.info.pci_func;
+
+       case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
+               if (rscreen->b.family >= CHIP_CEDAR && rscreen->has_atomics)
+                       return 8;
+               return 0;
+       case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
+               if (rscreen->b.family >= CHIP_CEDAR && rscreen->has_atomics)
+                       return EG_MAX_ATOMIC_BUFFERS;
+               return 0;
+
+       default:
+               return u_pipe_screen_get_param_defaults(pscreen, param);
        }
-       return 0;
 }
 
 static int r600_get_shader_param(struct pipe_screen* pscreen,