r600: fork and import gallium/radeon

[mesa.git] / src / gallium / drivers / r600 / r600_pipe.c

diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 970a20e7b3ac5d2c0caacbed9538d21d6442a8f7..9ed7a17c5c7cf8d35fcbf6470330d64bd6a5bc14 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -37,8 +37,8 @@
 #include "util/u_math.h"
 #include "vl/vl_decoder.h"
 #include "vl/vl_video_buffer.h"
-#include "radeon/radeon_video.h"
-#include "radeon/radeon_uvd.h"
+#include "radeon_video.h"
+#include "radeon_uvd.h"
 #include "os/os_time.h"
 
 static const struct debug_named_value r600_debug_options[] = {
@@ -111,6 +111,11 @@ static void r600_destroy_context(struct pipe_context *context)
        FREE(rctx->start_compute_cs_cmd.buf);
 
        r600_common_context_cleanup(&rctx->b);
+
+       r600_resource_reference(&rctx->trace_buf, NULL);
+       r600_resource_reference(&rctx->last_trace_buf, NULL);
+       radeon_clear_saved_cs(&rctx->last_gfx);
+
        FREE(rctx);
 }
 
@@ -125,7 +130,8 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
                return NULL;
 
        rctx->b.b.screen = screen;
-       rctx->b.b.priv = priv;
+       assert(!priv);
+       rctx->b.b.priv = NULL; /* for threaded_context_unwrap_sync */
        rctx->b.b.destroy = r600_destroy_context;
        rctx->b.set_atom_dirty = (void *)r600_set_atom_dirty;
 
@@ -137,7 +143,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
 
        r600_init_blit_functions(rctx);
 
-       if (rscreen->b.info.has_uvd) {
+       if (rscreen->b.info.has_hw_decode) {
                rctx->b.b.create_video_codec = r600_uvd_create_decoder;
                rctx->b.b.create_video_buffer = r600_video_buffer_create;
        } else {
@@ -145,6 +151,8 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
                rctx->b.b.create_video_buffer = vl_video_buffer_create;
        }
 
+       if (getenv("R600_TRACE"))
+               rctx->is_debug = true;
        r600_init_common_state_functions(rctx);
 
        switch (rctx->b.chip_class) {
@@ -188,8 +196,9 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
                                       r600_context_gfx_flush, rctx);
        rctx->b.gfx.flush = r600_context_gfx_flush;
 
-       rctx->allocator_fetch_shader = u_suballocator_create(&rctx->b.b, 64 * 1024,
-                                                            0, PIPE_USAGE_DEFAULT, FALSE);
+       rctx->allocator_fetch_shader =
+               u_suballocator_create(&rctx->b.b, 64 * 1024,
+                                     0, PIPE_USAGE_DEFAULT, 0, FALSE);
        if (!rctx->allocator_fetch_shader)
                goto fail;
 
@@ -207,7 +216,6 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
        rctx->blitter->draw_rectangle = r600_draw_rectangle;
 
        r600_begin_new_cs(rctx);
-       r600_query_init_backend_mask(&rctx->b); /* this emits commands and must be last */
 
        rctx->dummy_pixel_shader =
                util_make_fragment_cloneinput_shader(&rctx->b.b, 0,
@@ -261,7 +269,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
        case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
        case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
-       case PIPE_CAP_USER_INDEX_BUFFERS:
        case PIPE_CAP_USER_CONSTANT_BUFFERS:
        case PIPE_CAP_START_INSTANCE:
        case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
@@ -286,6 +293,9 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
        case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
        case PIPE_CAP_CLEAR_TEXTURE:
+       case PIPE_CAP_TGSI_MUL_ZERO_WINS:
+       case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
+       case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
                return 1;
 
        case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
@@ -374,6 +384,32 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_TGSI_VOTE:
        case PIPE_CAP_MAX_WINDOW_RECTANGLES:
        case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
+       case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
+       case PIPE_CAP_NATIVE_FENCE_FD:
+       case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
+       case PIPE_CAP_TGSI_FS_FBFETCH:
+       case PIPE_CAP_INT64:
+       case PIPE_CAP_INT64_DIVMOD:
+       case PIPE_CAP_TGSI_TEX_TXF_LZ:
+       case PIPE_CAP_TGSI_CLOCK:
+       case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
+       case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
+       case PIPE_CAP_TGSI_BALLOT:
+       case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
+       case PIPE_CAP_POST_DEPTH_COVERAGE:
+       case PIPE_CAP_BINDLESS_TEXTURE:
+       case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
+       case PIPE_CAP_QUERY_SO_OVERFLOW:
+       case PIPE_CAP_MEMOBJ:
+       case PIPE_CAP_LOAD_CONSTBUF:
+               return 0;
+
+       case PIPE_CAP_DOUBLES:
+               if (rscreen->b.family == CHIP_ARUBA ||
+                   rscreen->b.family == CHIP_CAYMAN ||
+                   rscreen->b.family == CHIP_CYPRESS ||
+                   rscreen->b.family == CHIP_HEMLOCK)
+                       return 1;
                return 0;
 
        case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
@@ -470,7 +506,9 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        return 0;
 }
 
-static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
+static int r600_get_shader_param(struct pipe_screen* pscreen,
+                                enum pipe_shader_type shader,
+                                enum pipe_shader_cap param)
 {
        struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 
@@ -522,8 +560,6 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
                }
        case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
                return R600_MAX_USER_CONST_BUFFERS;
-       case PIPE_SHADER_CAP_MAX_PREDS:
-               return 0; /* nothing uses this */
        case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
                return 1;
        case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
@@ -534,6 +570,8 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
        case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
                return 1;
        case PIPE_SHADER_CAP_SUBROUTINES:
+       case PIPE_SHADER_CAP_INT64_ATOMICS:
+       case PIPE_SHADER_CAP_FP16:
                return 0;
        case PIPE_SHADER_CAP_INTEGERS:
        case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
@@ -550,7 +588,6 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
        case PIPE_SHADER_CAP_SUPPORTED_IRS:
                return 0;
        case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
-       case PIPE_SHADER_CAP_DOUBLES:
                if (rscreen->b.family == CHIP_ARUBA ||
                    rscreen->b.family == CHIP_CAYMAN ||
                    rscreen->b.family == CHIP_CYPRESS ||
@@ -561,6 +598,8 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
        case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
        case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
        case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
+       case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
                return 0;
        case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
                /* due to a bug in the shader compiler, some loops hang
@@ -599,7 +638,8 @@ static struct pipe_resource *r600_resource_create(struct pipe_screen *screen,
        return r600_resource_create_common(screen, templ);
 }
 
-struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
+struct pipe_screen *r600_screen_create(struct radeon_winsys *ws,
+                                      const struct pipe_screen_config *config)
 {
        struct r600_screen *rscreen = CALLOC_STRUCT(r600_screen);
 
@@ -629,7 +669,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
        if (debug_get_bool_option("R600_DEBUG_COMPUTE", FALSE))
                rscreen->b.debug_flags |= DBG_COMPUTE;
        if (debug_get_bool_option("R600_DUMP_SHADERS", FALSE))
-               rscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS | DBG_TCS | DBG_TES;
+               rscreen->b.debug_flags |= DBG_ALL_SHADERS | DBG_FS;
        if (!debug_get_bool_option("R600_HYPERZ", TRUE))
                rscreen->b.debug_flags |= DBG_NO_HYPERZ;
 
@@ -729,5 +769,6 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
        if (rscreen->b.debug_flags & DBG_TEST_DMA)
                r600_test_dma(&rscreen->b);
 
+       r600_query_fix_enabled_rb_mask(&rscreen->b);
        return &rscreen->b.b;
 }