r600g: make F2U trans-only on r600-r700

[mesa.git] / src / gallium / drivers / r600 / r600_pipe.c

diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index a143381246ef1db4397cf89f5aa6ecf52b88c7a2..cf2983315b2e1f8a26e434bd3215759bc8dc683e 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -162,6 +162,9 @@ static void r600_destroy_context(struct pipe_context *context)
        if (rctx->custom_dsa_flush) {
                rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
        }
+       if (rctx->custom_blend_resolve) {
+               rctx->context.delete_blend_state(&rctx->context, rctx->custom_blend_resolve);
+       }
        util_unreference_framebuffer_state(&rctx->framebuffer);
 
        r600_context_fini(rctx);
@@ -197,7 +200,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
                return NULL;
 
        util_slab_create(&rctx->pool_transfers,
-                        sizeof(struct pipe_transfer), 64,
+                        sizeof(struct r600_transfer), 64,
                         UTIL_SLAB_SINGLETHREADED);
 
        rctx->context.screen = screen;
@@ -215,7 +218,6 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
        LIST_INITHEAD(&rctx->active_timer_queries);
        LIST_INITHEAD(&rctx->active_nontimer_queries);
        LIST_INITHEAD(&rctx->dirty);
-       LIST_INITHEAD(&rctx->resource_dirty);
        LIST_INITHEAD(&rctx->enable_list);
 
        rctx->range = CALLOC(NUM_RANGES, sizeof(struct r600_range));
@@ -255,6 +257,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
                if (evergreen_context_init(rctx))
                        goto fail;
                rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
+               rctx->custom_blend_resolve = evergreen_create_resolve_blend(rctx);
                rctx->has_vertex_cache = !(rctx->family == CHIP_CEDAR ||
                                           rctx->family == CHIP_PALM ||
                                           rctx->family == CHIP_SUMO ||
@@ -385,6 +388,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_USER_CONSTANT_BUFFERS:
        case PIPE_CAP_COMPUTE:
        case PIPE_CAP_START_INSTANCE:
+       case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
                return 1;
 
        case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
@@ -412,7 +416,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
        case PIPE_CAP_VERTEX_COLOR_CLAMPED:
        case PIPE_CAP_USER_VERTEX_BUFFERS:
-       case PIPE_CAP_QUERY_TIMESTAMP:
                return 0;
 
        /* Stream output. */
@@ -446,15 +449,15 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        /* Timer queries, present when the clock frequency is non zero. */
        case PIPE_CAP_TIMER_QUERY:
                return rscreen->info.r600_clock_crystal_freq != 0;
+       case PIPE_CAP_QUERY_TIMESTAMP:
+               return rscreen->info.drm_minor >= 20 &&
+                      rscreen->info.r600_clock_crystal_freq != 0;
 
        case PIPE_CAP_MIN_TEXEL_OFFSET:
                return -8;
 
        case PIPE_CAP_MAX_TEXEL_OFFSET:
                return 7;
-
-       case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
-               return family < CHIP_CEDAR ?  1 : 0;
        }
        return 0;
 }
@@ -872,6 +875,14 @@ static unsigned radeon_family_from_device(unsigned device)
        }
 }
 
+static uint64_t r600_get_timestamp(struct pipe_screen *screen)
+{
+       struct r600_screen *rscreen = (struct r600_screen*)screen;
+
+       return 1000000 * rscreen->ws->query_timestamp(rscreen->ws) /
+                       rscreen->info.r600_clock_crystal_freq;
+}
+
 struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
 {
        struct r600_screen *rscreen = CALLOC_STRUCT(r600_screen);
@@ -905,7 +916,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
        switch (rscreen->chip_class) {
        case R600:
        case EVERGREEN:
-               rscreen->has_streamout = rscreen->info.drm_minor >= 13;
+               rscreen->has_streamout = rscreen->info.drm_minor >= 14;
                break;
        case R700:
                rscreen->has_streamout = rscreen->info.drm_minor >= 17;
@@ -928,6 +939,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
        rscreen->screen.get_paramf = r600_get_paramf;
        rscreen->screen.get_video_param = r600_get_video_param;
        rscreen->screen.get_compute_param = r600_get_compute_param;
+       rscreen->screen.get_timestamp = r600_get_timestamp;
 
        if (rscreen->chip_class >= EVERGREEN) {
                rscreen->screen.is_format_supported = evergreen_is_format_supported;
@@ -950,8 +962,6 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
        LIST_INITHEAD(&rscreen->fences.blocks);
        pipe_mutex_init(rscreen->fences.mutex);
 
-       rscreen->use_surface_alloc = debug_get_bool_option("R600_SURF", TRUE);
-
        rscreen->global_pool = compute_memory_pool_new(rscreen);
 
        return &rscreen->screen;