[g3dvl] add some more PIPE_VIDEO_CAPs
[mesa.git] / src / gallium / drivers / r600 / r600_pipe.h
index 5f04fbf09920bc1fb4bdb9910f7772bc63f2a5ce..6f399ed43b0b29baf004033078793d3ee899401d 100644 (file)
 #include <pipe/p_screen.h>
 #include <pipe/p_context.h>
 #include <util/u_math.h>
+#include "util/u_slab.h"
 #include "util/u_vbuf_mgr.h"
 #include "r600.h"
 #include "r600_public.h"
 #include "r600_shader.h"
 #include "r600_resource.h"
 
+#define R600_MAX_CONST_BUFFERS 1
+#define R600_MAX_CONST_BUFFER_SIZE 4096
+
+#ifdef PIPE_ARCH_BIG_ENDIAN
+#define R600_BIG_ENDIAN 1
+#else
+#define R600_BIG_ENDIAN 0
+#endif
+
 enum r600_pipe_state_id {
        R600_PIPE_STATE_BLEND = 0,
        R600_PIPE_STATE_BLEND_COLOR,
        R600_PIPE_STATE_CONFIG,
+       R600_PIPE_STATE_SEAMLESS_CUBEMAP,
        R600_PIPE_STATE_CLIP,
        R600_PIPE_STATE_SCISSOR,
        R600_PIPE_STATE_VIEWPORT,
@@ -55,6 +66,7 @@ enum r600_pipe_state_id {
        R600_PIPE_STATE_RESOURCE,
        R600_PIPE_STATE_POLYGON_OFFSET,
        R600_PIPE_STATE_FETCH_SHADER,
+       R600_PIPE_STATE_SPI,
        R600_PIPE_NSTATES
 };
 
@@ -62,16 +74,23 @@ struct r600_screen {
        struct pipe_screen              screen;
        struct radeon                   *radeon;
        struct r600_tiling_info         *tiling_info;
+       struct util_slab_mempool        pool_buffers;
+       unsigned                        num_contexts;
+
+       /* for thread-safe write accessing to num_contexts */
+       pipe_mutex                      mutex_num_contexts;
 };
 
 struct r600_pipe_sampler_view {
        struct pipe_sampler_view        base;
-       struct r600_pipe_state          state;
+       struct r600_pipe_resource_state         state;
 };
 
 struct r600_pipe_rasterizer {
        struct r600_pipe_state          rstate;
-       bool                            flatshade;
+       boolean                         clamp_vertex_color;
+       boolean                         clamp_fragment_color;
+       boolean                         flatshade;
        unsigned                        sprite_coord_enable;
        float                           offset_units;
        float                           offset_scale;
@@ -82,6 +101,11 @@ struct r600_pipe_blend {
        unsigned                        cb_target_mask;
 };
 
+struct r600_pipe_dsa {
+       struct r600_pipe_state          rstate;
+       unsigned                        alpha_ref;
+};
+
 struct r600_vertex_element
 {
        unsigned                        count;
@@ -103,6 +127,12 @@ struct r600_pipe_shader {
        struct r600_bo                  *bo;
        struct r600_bo                  *bo_fetch;
        struct r600_vertex_element      vertex_elements;
+       struct tgsi_token               *tokens;
+};
+
+struct r600_pipe_sampler_state {
+       struct r600_pipe_state          rstate;
+       boolean seamless_cube_map;
 };
 
 /* needed for blitter save */
@@ -115,20 +145,45 @@ struct r600_textures_info {
        unsigned                        n_samplers;
 };
 
+struct r600_fence {
+       struct pipe_reference           reference;
+       struct r600_pipe_context        *ctx;
+       unsigned                        index; /* in the shared bo */
+       struct list_head                head;
+};
+
+#define FENCE_BLOCK_SIZE 16
+
+struct r600_fence_block {
+       struct r600_fence               fences[FENCE_BLOCK_SIZE];
+       struct list_head                head;
+};
+
+struct r600_pipe_fences {
+       struct r600_bo                  *bo;
+       unsigned                        *data;
+       unsigned                        next_index;
+       /* linked list of preallocated blocks */
+       struct list_head                blocks;
+       /* linked list of freed fences */
+       struct list_head                pool;
+};
+
 #define R600_CONSTANT_ARRAY_SIZE 256
 #define R600_RESOURCE_ARRAY_SIZE 160
 
 struct r600_pipe_context {
        struct pipe_context             context;
        struct blitter_context          *blitter;
-       unsigned                        family;
+       enum radeon_family              family;
+       enum chip_class                 chip_class;
        void                            *custom_dsa_flush;
        struct r600_screen              *screen;
        struct radeon                   *radeon;
        struct r600_pipe_state          *states[R600_PIPE_NSTATES];
        struct r600_context             ctx;
        struct r600_vertex_element      *vertex_elements;
-       struct r600_pipe_state          fs_resource[PIPE_MAX_ATTRIBS];
+       struct r600_pipe_resource_state         fs_resource[PIPE_MAX_ATTRIBS];
        struct pipe_framebuffer_state   framebuffer;
        struct pipe_index_buffer        index_buffer;
        unsigned                        cb_target_mask;
@@ -140,17 +195,36 @@ struct r600_pipe_context {
        struct r600_pipe_shader         *ps_shader;
        struct r600_pipe_shader         *vs_shader;
        struct r600_pipe_state          vs_const_buffer;
+       struct r600_pipe_resource_state         vs_const_buffer_resource[R600_MAX_CONST_BUFFERS];
        struct r600_pipe_state          ps_const_buffer;
+       struct r600_pipe_resource_state         ps_const_buffer_resource[R600_MAX_CONST_BUFFERS];
        struct r600_pipe_rasterizer     *rasterizer;
+       struct r600_pipe_state          vgt;
+       struct r600_pipe_state          spi;
+       struct pipe_query               *current_render_cond;
+       unsigned                        current_render_cond_mode;
+       struct pipe_query               *saved_render_cond;
+       unsigned                        saved_render_cond_mode;
        /* shader information */
+       boolean                         clamp_vertex_color;
+       boolean                         clamp_fragment_color;
+       boolean                         spi_dirty;
        unsigned                        sprite_coord_enable;
-       bool                            flatshade;
+       boolean                         flatshade;
+       boolean                         export_16bpc;
+       unsigned                        alpha_ref;
+       boolean                         alpha_ref_dirty;
+       unsigned                        nr_cbufs;
        struct r600_textures_info       ps_samplers;
 
-        struct u_vbuf_mgr              *vbuf_mgr;
-       struct u_upload_mgr             *upload_ib;
-       struct u_upload_mgr             *upload_const;
-       bool                            blit;
+       struct r600_pipe_fences         fences;
+
+       struct u_vbuf_mgr               *vbuf_mgr;
+       struct util_slab_mempool        pool_transfers;
+       boolean                         blit;
+       boolean                         have_depth_texture, have_depth_fb;
+
+       unsigned default_ps_gprs, default_vs_gprs;
 };
 
 struct r600_drawl {
@@ -166,12 +240,19 @@ void evergreen_init_state_functions(struct r600_pipe_context *rctx);
 void evergreen_init_config(struct r600_pipe_context *rctx);
 void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader);
 void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader);
+void evergreen_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve);
 void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx);
 void evergreen_polygon_offset_update(struct r600_pipe_context *rctx);
-void evergreen_pipe_set_buffer_resource(struct r600_pipe_context *rctx,
-                                       struct r600_pipe_state *rstate,
+void evergreen_pipe_init_buffer_resource(struct r600_pipe_context *rctx,
+                                        struct r600_pipe_resource_state *rstate);
+void evergreen_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate,
                                        struct r600_resource *rbuffer,
                                        unsigned offset, unsigned stride);
+boolean evergreen_is_format_supported(struct pipe_screen *screen,
+                                     enum pipe_format format,
+                                     enum pipe_texture_target target,
+                                     unsigned sample_count,
+                                     unsigned usage);
 
 /* r600_blit.c */
 void r600_init_blit_functions(struct r600_pipe_context *rctx);
@@ -196,29 +277,35 @@ void r600_init_query_functions(struct r600_pipe_context *rctx);
 void r600_init_context_resource_functions(struct r600_pipe_context *r600);
 
 /* r600_shader.c */
-int r600_pipe_shader_create(struct pipe_context *ctx, struct r600_pipe_shader *shader, const struct tgsi_token *tokens);
+int r600_pipe_shader_create(struct pipe_context *ctx, struct r600_pipe_shader *shader);
 void r600_pipe_shader_destroy(struct pipe_context *ctx, struct r600_pipe_shader *shader);
 int r600_find_vs_semantic_index(struct r600_shader *vs,
                                struct r600_shader *ps, int id);
 
 /* r600_state.c */
 void r600_init_state_functions(struct r600_pipe_context *rctx);
-void r600_spi_update(struct r600_pipe_context *rctx);
 void r600_init_config(struct r600_pipe_context *rctx);
+void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader);
+void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader);
+void r600_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve);
 void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx);
 void r600_polygon_offset_update(struct r600_pipe_context *rctx);
-void r600_pipe_set_buffer_resource(struct r600_pipe_context *rctx,
-                                  struct r600_pipe_state *rstate,
+void r600_pipe_init_buffer_resource(struct r600_pipe_context *rctx,
+                                   struct r600_pipe_resource_state *rstate);
+void r600_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate,
                                   struct r600_resource *rbuffer,
                                   unsigned offset, unsigned stride);
-
-/* r600_helper.h */
-int r600_conv_pipe_prim(unsigned pprim, unsigned *prim);
+void r600_adjust_gprs(struct r600_pipe_context *rctx);
+boolean r600_is_format_supported(struct pipe_screen *screen,
+                                enum pipe_format format,
+                                enum pipe_texture_target target,
+                                unsigned sample_count,
+                                unsigned usage);
 
 /* r600_texture.c */
 void r600_init_screen_texture_functions(struct pipe_screen *screen);
 void r600_init_surface_functions(struct r600_pipe_context *r600);
-uint32_t r600_translate_texformat(enum pipe_format format,
+uint32_t r600_translate_texformat(struct pipe_screen *screen, enum pipe_format format,
                                  const unsigned char *swizzle_view,
                                  uint32_t *word4_p, uint32_t *yuv_format_p);
 unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
@@ -240,11 +327,11 @@ void *r600_create_vertex_elements(struct pipe_context *ctx,
                                  const struct pipe_vertex_element *elements);
 void r600_delete_vertex_element(struct pipe_context *ctx, void *state);
 void r600_bind_blend_state(struct pipe_context *ctx, void *state);
+void r600_bind_dsa_state(struct pipe_context *ctx, void *state);
 void r600_bind_rs_state(struct pipe_context *ctx, void *state);
 void r600_delete_rs_state(struct pipe_context *ctx, void *state);
 void r600_sampler_view_destroy(struct pipe_context *ctx,
                               struct pipe_sampler_view *state);
-void r600_bind_state(struct pipe_context *ctx, void *state);
 void r600_delete_state(struct pipe_context *ctx, void *state);
 void r600_bind_vertex_elements(struct pipe_context *ctx, void *state);
 void *r600_create_shader_state(struct pipe_context *ctx,
@@ -266,4 +353,13 @@ static INLINE u32 S_FIXED(float value, u32 frac_bits)
 }
 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
 
+static inline unsigned r600_tex_aniso_filter(unsigned filter)
+{
+       if (filter <= 1)   return 0;
+       if (filter <= 2)   return 1;
+       if (filter <= 4)   return 2;
+       if (filter <= 8)   return 3;
+        /* else */        return 4;
+}
+
 #endif