swr/rast: SIMD16 FE - primitive assembly simplification
[mesa.git] / src / gallium / drivers / r600 / r600_pipe.h
index 0dd538bcebe381e13e369573a726aef5f3806f1e..e5acd415423ea9b00e8095860b5b907c105fac32 100644 (file)
@@ -29,6 +29,7 @@
 #include "radeon/r600_pipe_common.h"
 #include "radeon/r600_cs.h"
 #include "r600_public.h"
+#include "pipe/p_defines.h"
 
 #include "util/u_suballoc.h"
 #include "util/list.h"
@@ -187,6 +188,8 @@ struct r600_framebuffer {
        bool export_16bpc;
        bool cb0_is_integer;
        bool is_msaa_resolve;
+       bool dual_src_blend;
+       bool do_update_surf_dirtiness;
 };
 
 struct r600_sample_mask {
@@ -276,6 +279,8 @@ struct r600_rasterizer_state {
        bool                            offset_units_unscaled;
        bool                            scissor_enable;
        bool                            multisample_enable;
+       bool                            clip_halfz;
+       bool                            rasterizer_discard;
 };
 
 struct r600_poly_offset_state {
@@ -316,13 +321,12 @@ struct r600_pipe_shader_selector {
 
        unsigned        num_shaders;
 
-       /* PIPE_SHADER_[VERTEX|FRAGMENT|...] */
-       unsigned        type;
+       enum pipe_shader_type   type;
 
        /* geometry shader properties */
-       unsigned        gs_output_prim;
-       unsigned        gs_max_out_vertices;
-       unsigned        gs_num_invocations;
+       enum pipe_prim_type     gs_output_prim;
+       unsigned                gs_max_out_vertices;
+       unsigned                gs_num_invocations;
 
        /* TCS/VS */
        uint64_t        lds_patch_outputs_written_mask;
@@ -500,12 +504,16 @@ struct r600_context {
        unsigned                        zwritemask;
        int                                     ps_iter_samples;
 
-       /* Index buffer. */
-       struct pipe_index_buffer        index_buffer;
+       /* The list of all texture buffer objects in this context.
+        * This list is walked when a buffer is invalidated/reallocated and
+        * the GPU addresses are updated. */
+       struct list_head                texture_buffers;
 
        /* Last draw state (-1 = unset). */
-       int                             last_primitive_type; /* Last primitive type used in draw_vbo. */
-       int                             last_start_instance;
+       enum pipe_prim_type             last_primitive_type; /* Last primitive type used in draw_vbo. */
+       enum pipe_prim_type             current_rast_prim; /* primitive type after TES, GS */
+       enum pipe_prim_type             last_rast_prim;
+       unsigned                        last_start_instance;
 
        void                            *sb_context;
        struct r600_isa         *isa;
@@ -730,10 +738,6 @@ unsigned r600_tex_wrap(unsigned wrap);
 unsigned r600_tex_mipfilter(unsigned filter);
 unsigned r600_tex_compare(unsigned compare);
 bool sampler_state_needs_border_color(const struct pipe_sampler_state *state);
-struct pipe_surface *r600_create_surface_custom(struct pipe_context *pipe,
-                                               struct pipe_resource *texture,
-                                               const struct pipe_surface *templ,
-                                               unsigned width, unsigned height);
 unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format,
                                   const unsigned char *swizzle_view,
                                   boolean vtx);
@@ -926,14 +930,6 @@ static inline unsigned r600_pack_float_12p4(float x)
               x >= 4096 ? 0xffff : x * 16;
 }
 
-/* Return if the depth format can be read without the DB->CB copy on r6xx-r7xx. */
-static inline bool r600_can_read_depth(struct r600_texture *rtex)
-{
-       return rtex->resource.b.b.nr_samples <= 1 &&
-              (rtex->resource.b.b.format == PIPE_FORMAT_Z16_UNORM ||
-               rtex->resource.b.b.format == PIPE_FORMAT_Z32_FLOAT);
-}
-
 static inline unsigned r600_get_flush_flags(enum r600_coherency coher)
 {
        switch (coher) {