#ifndef R600_RESOURCE_H
#define R600_RESOURCE_H
-#include "util/u_transfer.h"
+#include "r600.h"
-struct r600_context;
-struct r600_screen;
+/* flag to indicate a resource is to be used as a transfer so should not be tiled */
+#define R600_RESOURCE_FLAG_TRANSFER PIPE_RESOURCE_FLAG_DRV_PRIV
+#define R600_RESOURCE_FLAG_FLUSHED_DEPTH (PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
-/* This gets further specialized into either buffer or texture
- * structures. Use the vtbl struct to choose between the two
- * underlying implementations.
- */
-struct r600_resource {
- struct u_resource base;
- struct radeon_bo *bo;
- u32 domain;
- u32 flink;
- struct pb_buffer *pb;
+struct r600_transfer {
+ struct pipe_transfer transfer;
+ struct r600_resource *staging;
+ unsigned offset;
+};
+
+struct compute_memory_item;
+
+struct r600_resource_global {
+ struct r600_resource base;
+ struct compute_memory_item *chunk;
};
struct r600_resource_texture {
struct r600_resource resource;
- unsigned long offset[PIPE_MAX_TEXTURE_LEVELS];
- unsigned long pitch[PIPE_MAX_TEXTURE_LEVELS];
- unsigned long width[PIPE_MAX_TEXTURE_LEVELS];
- unsigned long height[PIPE_MAX_TEXTURE_LEVELS];
- unsigned long layer_size[PIPE_MAX_TEXTURE_LEVELS];
- unsigned long pitch_override;
- unsigned long bpt;
- unsigned long size;
- unsigned tilled;
- unsigned array_mode;
+
+ /* If this resource is a depth-stencil buffer on evergreen, this contains
+ * the depth part of the format. There is a separate stencil resource
+ * for the stencil buffer below. */
+ enum pipe_format real_format;
+
+ unsigned offset[PIPE_MAX_TEXTURE_LEVELS];
+ unsigned pitch_in_bytes[PIPE_MAX_TEXTURE_LEVELS]; /* transfer */
+ unsigned layer_size[PIPE_MAX_TEXTURE_LEVELS];
+ unsigned array_mode[PIPE_MAX_TEXTURE_LEVELS];
+ unsigned pitch_override;
+ unsigned size;
unsigned tile_type;
- unsigned depth;
- unsigned dirty;
- struct radeon_bo *uncompressed;
- struct radeon_state *scissor[PIPE_MAX_TEXTURE_LEVELS];
- struct radeon_state *cb[8][PIPE_MAX_TEXTURE_LEVELS];
- struct radeon_state *db[PIPE_MAX_TEXTURE_LEVELS];
- struct radeon_state *viewport[PIPE_MAX_TEXTURE_LEVELS];
+ bool is_depth;
+ bool is_rat;
+ unsigned dirty_db_mask; /* each bit says if that miplevel is dirty */
+ struct r600_resource_texture *flushed_depth_texture;
+ boolean is_flushing_texture;
+ struct radeon_surface surface;
};
-void r600_init_context_resource_functions(struct r600_context *r600);
-void r600_init_screen_resource_functions(struct r600_screen *r600screen);
+#define R600_TEX_IS_TILED(tex, level) ((tex)->array_mode[level] != V_038000_ARRAY_LINEAR_GENERAL && (tex)->array_mode[level] != V_038000_ARRAY_LINEAR_ALIGNED)
+
+struct r600_surface {
+ struct pipe_surface base;
+
+ bool color_initialized;
+ bool depth_initialized;
-/* r600_buffer */
-u32 r600_domain_from_usage(unsigned usage);
+ /* Misc. color flags. */
+ bool alphatest_bypass;
+ bool export_16bpc;
+
+ /* Color registers. */
+ unsigned cb_color_info;
+ unsigned cb_color_base;
+ unsigned cb_color_view;
+ unsigned cb_color_size; /* R600 only */
+ unsigned cb_color_frag; /* R600 only */
+ unsigned cb_color_tile; /* R600 only */
+ unsigned cb_color_dim; /* EG only */
+ unsigned cb_color_pitch; /* EG only */
+ unsigned cb_color_slice; /* EG only */
+ unsigned cb_color_attrib; /* EG only */
+
+ /* DB registers. */
+ unsigned db_depth_info; /* DB_Z_INFO (EG) or DB_DEPTH_INFO (r600) */
+ unsigned db_depth_base; /* DB_Z_READ/WRITE_BASE (EG) or DB_DEPTH_BASE (r600) */
+ unsigned db_depth_view;
+ unsigned db_depth_size;
+ unsigned db_depth_slice; /* EG only */
+ unsigned db_stencil_base; /* EG only */
+ unsigned db_stencil_info; /* EG only */
+ unsigned db_prefetch_limit; /* R600 only */
+};
+
+void r600_resource_destroy(struct pipe_screen *screen, struct pipe_resource *res);
+void r600_init_screen_resource_functions(struct pipe_screen *screen);
/* r600_texture */
struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
const struct pipe_resource *base,
struct winsys_handle *whandle);
+static INLINE struct r600_resource *r600_resource(struct pipe_resource *r)
+{
+ return (struct r600_resource*)r;
+}
+
+bool r600_init_flushed_depth_texture(struct pipe_context *ctx,
+ struct pipe_resource *texture,
+ struct r600_resource_texture **staging);
+
+/* r600_texture.c texture transfer functions. */
+struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
+ struct pipe_resource *texture,
+ unsigned level,
+ unsigned usage,
+ const struct pipe_box *box);
+void r600_texture_transfer_destroy(struct pipe_context *ctx,
+ struct pipe_transfer *trans);
+void* r600_texture_transfer_map(struct pipe_context *ctx,
+ struct pipe_transfer* transfer);
+void r600_texture_transfer_unmap(struct pipe_context *ctx,
+ struct pipe_transfer* transfer);
+
#endif
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