r600g: move streamout state to drivers/radeon
[mesa.git] / src / gallium / drivers / r600 / r600_resource.h
index f6377ea802b9ccea1e6c470fe5a572c1cb51c59f..92b9cc50b98088495f0f1f7d833d3082bc3de9ac 100644 (file)
 #ifndef R600_RESOURCE_H
 #define R600_RESOURCE_H
 
-#include "util/u_transfer.h"
+#include "../../winsys/radeon/drm/radeon_winsys.h"
+#include "../radeon/r600_pipe_common.h"
+
+struct r600_screen;
+
+/* flag to indicate a resource is to be used as a transfer so should not be tiled */
+#define R600_RESOURCE_FLAG_TRANSFER            PIPE_RESOURCE_FLAG_DRV_PRIV
+#define R600_RESOURCE_FLAG_FLUSHED_DEPTH       (PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
+#define R600_RESOURCE_FLAG_FORCE_TILING                (PIPE_RESOURCE_FLAG_DRV_PRIV << 2)
 
-/* Texture transfer. */
 struct r600_transfer {
-       /* Base class. */
        struct pipe_transfer            transfer;
-       /* Buffer transfer. */
-       struct pipe_transfer            *buffer_transfer;
+       struct r600_resource            *staging;
        unsigned                        offset;
-       struct pipe_resource            *linear_texture;
 };
 
-/* This gets further specialized into either buffer or texture
- * structures. Use the vtbl struct to choose between the two
- * underlying implementations.
- */
-struct r600_resource {
-       struct u_resource               base;
-       struct r600_bo                  *bo;
-       u32                             domain;
-       u32                             flink;
-       u32                             size;
+struct compute_memory_item;
+
+struct r600_resource_global {
+       struct r600_resource base;
+       struct compute_memory_item *chunk;
 };
 
-struct r600_resource_texture {
+struct r600_texture {
        struct r600_resource            resource;
-       unsigned long                   offset[PIPE_MAX_TEXTURE_LEVELS];
-       unsigned long                   pitch[PIPE_MAX_TEXTURE_LEVELS];
-       unsigned long                   width[PIPE_MAX_TEXTURE_LEVELS];
-       unsigned long                   height[PIPE_MAX_TEXTURE_LEVELS];
-       unsigned long                   layer_size[PIPE_MAX_TEXTURE_LEVELS];
-       unsigned long                   pitch_override;
-       unsigned long                   bpt;
-       unsigned long                   size;
-       unsigned                        tiled;
-       unsigned                        array_mode;
-       unsigned                        tile_type;
-       unsigned                        depth;
-       unsigned                        dirty;
-       struct r600_resource_texture    *flushed_depth_texture;
-};
 
-void r600_init_screen_resource_functions(struct pipe_screen *screen);
+       unsigned                        array_mode[PIPE_MAX_TEXTURE_LEVELS];
+       unsigned                        pitch_override;
+       unsigned                        size;
+       bool                            non_disp_tiling;
+       bool                            is_depth;
+       bool                            is_rat;
+       unsigned                        dirty_level_mask; /* each bit says if that mipmap is compressed */
+       struct r600_texture             *flushed_depth_texture;
+       boolean                         is_flushing_texture;
+       struct radeon_surface           surface;
+
+       /* FMASK and CMASK can only be used with MSAA textures for now.
+        * MSAA textures cannot have mipmaps. */
+       unsigned                        fmask_offset, fmask_size, fmask_bank_height;
+       unsigned                        fmask_slice_tile_max;
+       unsigned                        cmask_offset, cmask_size;
+       unsigned                        cmask_slice_tile_max;
+
+       struct r600_resource            *htile;
+       /* use htile only for first level */
+       float                           depth_clear;
+
+       unsigned                        color_clear_value[2];
+};
 
-/* r600_buffer */
-u32 r600_domain_from_usage(unsigned usage);
+#define R600_TEX_IS_TILED(tex, level) ((tex)->array_mode[level] != V_038000_ARRAY_LINEAR_GENERAL && (tex)->array_mode[level] != V_038000_ARRAY_LINEAR_ALIGNED)
 
-/* r600_texture */
-struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
-                                       const struct pipe_resource *templ);
-struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
-                                               const struct pipe_resource *base,
-                                               struct winsys_handle *whandle);
-
-#define R600_BUFFER_MAGIC 0xabcd1600
-#define R600_BUFFER_MAX_RANGES 32
+struct r600_fmask_info {
+       unsigned size;
+       unsigned alignment;
+       unsigned bank_height;
+       unsigned slice_tile_max;
+};
 
-struct r600_buffer_range {
-       uint32_t start;
-       uint32_t end;
+struct r600_cmask_info {
+       unsigned size;
+       unsigned alignment;
+       unsigned slice_tile_max;
 };
 
-struct r600_resource_buffer {
-       struct r600_resource r;
-       uint32_t magic;
-       void *user_buffer;
-       struct r600_buffer_range ranges[R600_BUFFER_MAX_RANGES];
-       unsigned num_ranges;
+struct r600_surface {
+       struct pipe_surface             base;
+
+       bool color_initialized;
+       bool depth_initialized;
+
+       /* Misc. color flags. */
+       bool alphatest_bypass;
+       bool export_16bpc;
+
+       /* Color registers. */
+       unsigned cb_color_info;
+       unsigned cb_color_base;
+       unsigned cb_color_view;
+       unsigned cb_color_size;         /* R600 only */
+       unsigned cb_color_dim;          /* EG only */
+       unsigned cb_color_pitch;        /* EG only */
+       unsigned cb_color_slice;        /* EG only */
+       unsigned cb_color_attrib;       /* EG only */
+       unsigned cb_color_fmask;        /* CB_COLORn_FMASK (EG) or CB_COLORn_FRAG (r600) */
+       unsigned cb_color_fmask_slice;  /* EG only */
+       unsigned cb_color_cmask;        /* CB_COLORn_CMASK (EG) or CB_COLORn_TILE (r600) */
+       unsigned cb_color_cmask_slice;  /* EG only */
+       unsigned cb_color_mask;         /* R600 only */
+       struct r600_resource *cb_buffer_fmask; /* Used for FMASK relocations. R600 only */
+       struct r600_resource *cb_buffer_cmask; /* Used for CMASK relocations. R600 only */
+
+       /* DB registers. */
+       unsigned db_depth_info;         /* DB_Z_INFO (EG) or DB_DEPTH_INFO (r600) */
+       unsigned db_depth_base;         /* DB_Z_READ/WRITE_BASE (EG) or DB_DEPTH_BASE (r600) */
+       unsigned db_depth_view;
+       unsigned db_depth_size;
+       unsigned db_depth_slice;        /* EG only */
+       unsigned db_stencil_base;       /* EG only */
+       unsigned db_stencil_info;       /* EG only */
+       unsigned db_prefetch_limit;     /* R600 only */
+       unsigned pa_su_poly_offset_db_fmt_cntl;
+
+       unsigned                        htile_enabled;
+       unsigned                        db_htile_surface;
+       unsigned                        db_htile_data_base;
+       unsigned                        db_preload_control;
 };
 
-/* r600_buffer */
-static INLINE struct r600_resource_buffer *r600_buffer(struct pipe_resource *buffer)
+/* Return if the depth format can be read without the DB->CB copy on r6xx-r7xx. */
+static INLINE bool r600_can_read_depth(struct r600_texture *rtex)
 {
-       if (buffer) {
-               assert(((struct r600_resource_buffer *)buffer)->magic == R600_BUFFER_MAGIC);
-               return (struct r600_resource_buffer *)buffer;
-    }
-    return NULL;
+       return rtex->resource.b.b.nr_samples <= 1 &&
+              (rtex->resource.b.b.format == PIPE_FORMAT_Z16_UNORM ||
+               rtex->resource.b.b.format == PIPE_FORMAT_Z32_FLOAT);
 }
 
-static INLINE boolean r600_buffer_is_user_buffer(struct pipe_resource *buffer)
-{
-    return r600_buffer(buffer)->user_buffer ? TRUE : FALSE;
-}
+void r600_resource_destroy(struct pipe_screen *screen, struct pipe_resource *res);
+void r600_init_screen_resource_functions(struct pipe_screen *screen);
+
+/* r600_texture */
+void r600_texture_get_fmask_info(struct r600_screen *rscreen,
+                                struct r600_texture *rtex,
+                                unsigned nr_samples,
+                                struct r600_fmask_info *out);
+void r600_texture_get_cmask_info(struct r600_screen *rscreen,
+                                struct r600_texture *rtex,
+                                struct r600_cmask_info *out);
+struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
+                                       const struct pipe_resource *templ);
+struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
+                                               const struct pipe_resource *base,
+                                               struct winsys_handle *whandle);
 
-int r600_texture_depth_flush(struct pipe_context *ctx,
-                            struct pipe_resource *texture);
-
-extern int (*r600_blit_uncompress_depth_ptr)(struct pipe_context *ctx, struct r600_resource_texture *texture);
-
-/* r600_texture.c texture transfer functions. */
-struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
-                                               struct pipe_resource *texture,
-                                               struct pipe_subresource sr,
-                                               unsigned usage,
-                                               const struct pipe_box *box);
-void r600_texture_transfer_destroy(struct pipe_context *ctx,
-                                  struct pipe_transfer *trans);
-void* r600_texture_transfer_map(struct pipe_context *ctx,
-                               struct pipe_transfer* transfer);
-void r600_texture_transfer_unmap(struct pipe_context *ctx,
-                                struct pipe_transfer* transfer);
+bool r600_init_flushed_depth_texture(struct pipe_context *ctx,
+                                    struct pipe_resource *texture,
+                                    struct r600_texture **staging);
 
 #endif