r600g: atomize stencil ref state
[mesa.git] / src / gallium / drivers / r600 / r600_shader.c
index 3ca23c59ca25ae41f658643a92ce8b9386ca96d4..3e797645ed9ad53c691af82e41f1c614c16df6e9 100644 (file)
@@ -4981,7 +4981,7 @@ static void fc_set_mid(struct r600_shader_ctx *ctx, int fc_sp)
 {
        struct r600_cf_stack_entry *sp = &ctx->bc->fc_stack[fc_sp];
 
-       sp->mid = (struct r600_bytecode_cf **)realloc((void *)sp->mid,
+       sp->mid = realloc((void *)sp->mid,
                                                sizeof(struct r600_bytecode_cf *) * (sp->num_mid + 1));
        sp->mid[sp->num_mid] = ctx->bc->cf_last;
        sp->num_mid++;
@@ -4997,10 +4997,8 @@ static void fc_pushlevel(struct r600_shader_ctx *ctx, int type)
 static void fc_poplevel(struct r600_shader_ctx *ctx)
 {
        struct r600_cf_stack_entry *sp = &ctx->bc->fc_stack[ctx->bc->fc_sp];
-       if (sp->mid) {
-               free(sp->mid);
-               sp->mid = NULL;
-       }
+       free(sp->mid);
+       sp->mid = NULL;
        sp->num_mid = 0;
        sp->start = NULL;
        sp->type = 0;
@@ -5356,7 +5354,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_ISGE,      0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT, tgsi_op2},
        {TGSI_OPCODE_ISHR,      0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT, tgsi_op2_trans},
        {TGSI_OPCODE_ISLT,      0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT, tgsi_op2_swap},
-       {TGSI_OPCODE_F2U,       0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT, tgsi_op2},
+       {TGSI_OPCODE_F2U,       0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT, tgsi_op2_trans},
        {TGSI_OPCODE_U2F,       0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT, tgsi_op2_trans},
        {TGSI_OPCODE_UADD,      0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT, tgsi_op2},
        {TGSI_OPCODE_UDIV,      0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_udiv},