* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
+#include "r600_sq.h"
+#include "r600_llvm.h"
+#include "r600_formats.h"
+#include "r600_opcodes.h"
+#include "r600d.h"
+
#include "pipe/p_shader_tokens.h"
#include "tgsi/tgsi_info.h"
#include "tgsi/tgsi_parse.h"
#include "tgsi/tgsi_scan.h"
#include "tgsi/tgsi_dump.h"
-#include "util/u_format.h"
-#include "r600_pipe.h"
-#include "r600_asm.h"
-#include "r600_sq.h"
-#include "r600_formats.h"
-#include "r600_opcodes.h"
-#include "r600d.h"
+#include "util/u_memory.h"
#include <stdio.h>
#include <errno.h>
#include <byteswap.h>
The compiler must issue the source argument to slots z, y, and x
*/
-
-int r600_find_vs_semantic_index(struct r600_shader *vs,
- struct r600_shader *ps, int id)
-{
- struct r600_shader_io *input = &ps->input[id];
-
- for (int i = 0; i < vs->noutput; i++) {
- if (input->name == vs->output[i].name &&
- input->sid == vs->output[i].sid) {
- return i - 1;
- }
- }
- return 0;
-}
-
static int r600_pipe_shader(struct pipe_context *ctx, struct r600_pipe_shader *shader)
{
- struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
+ struct r600_context *rctx = (struct r600_context *)ctx;
struct r600_shader *rshader = &shader->shader;
uint32_t *ptr;
int i;
/* copy new shader */
if (shader->bo == NULL) {
- /* use PIPE_BIND_VERTEX_BUFFER so we use the cache buffer manager */
- shader->bo = r600_bo(rctx->radeon, rshader->bc.ndw * 4, 4096, PIPE_BIND_VERTEX_BUFFER, PIPE_USAGE_IMMUTABLE);
+ shader->bo = (struct r600_resource*)
+ pipe_buffer_create(ctx->screen, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE, rshader->bc.ndw * 4);
if (shader->bo == NULL) {
return -ENOMEM;
}
- ptr = (uint32_t*)r600_bo_map(rctx->radeon, shader->bo, 0, NULL);
+ ptr = (uint32_t*)rctx->ws->buffer_map(shader->bo->cs_buf, rctx->cs, PIPE_TRANSFER_WRITE);
if (R600_BIG_ENDIAN) {
for (i = 0; i < rshader->bc.ndw; ++i) {
ptr[i] = bswap_32(rshader->bc.bytecode[i]);
} else {
memcpy(ptr, rshader->bc.bytecode, rshader->bc.ndw * sizeof(*ptr));
}
- r600_bo_unmap(rctx->radeon, shader->bo);
+ rctx->ws->buffer_unmap(shader->bo->cs_buf);
}
/* build state */
switch (rshader->processor_type) {
return 0;
}
-static int r600_shader_from_tgsi(struct r600_pipe_context * rctx, struct r600_pipe_shader *pipeshader);
+static int r600_shader_from_tgsi(struct r600_context * rctx, struct r600_pipe_shader *pipeshader);
int r600_pipe_shader_create(struct pipe_context *ctx, struct r600_pipe_shader *shader)
{
static int dump_shaders = -1;
- struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
+ struct r600_context *rctx = (struct r600_context *)ctx;
+ struct r600_pipe_shader_selector *sel = shader->selector;
int r;
/* Would like some magic "get_bool_option_once" routine.
if (dump_shaders) {
fprintf(stderr, "--------------------------------------------------------------\n");
- tgsi_dump(shader->tokens, 0);
+ tgsi_dump(sel->tokens, 0);
+
+ if (sel->so.num_outputs) {
+ unsigned i;
+ fprintf(stderr, "STREAMOUT\n");
+ for (i = 0; i < sel->so.num_outputs; i++) {
+ unsigned mask = ((1 << sel->so.output[i].num_components) - 1) <<
+ sel->so.output[i].start_component;
+ fprintf(stderr, " %i: MEM_STREAM0_BUF%i OUT[%i].%s%s%s%s\n", i,
+ sel->so.output[i].output_buffer, sel->so.output[i].register_index,
+ mask & 1 ? "x" : "_",
+ (mask >> 1) & 1 ? "y" : "_",
+ (mask >> 2) & 1 ? "z" : "_",
+ (mask >> 3) & 1 ? "w" : "_");
+ }
+ }
}
r = r600_shader_from_tgsi(rctx, shader);
if (r) {
R600_ERR("translation from TGSI failed !\n");
return r;
}
- r = r600_bc_build(&shader->shader.bc);
+ r = r600_bytecode_build(&shader->shader.bc);
if (r) {
R600_ERR("building bytecode failed !\n");
return r;
}
if (dump_shaders) {
- r600_bc_dump(&shader->shader.bc);
+ r600_bytecode_dump(&shader->shader.bc);
fprintf(stderr, "______________________________________________________________\n");
}
return r600_pipe_shader(ctx, shader);
void r600_pipe_shader_destroy(struct pipe_context *ctx, struct r600_pipe_shader *shader)
{
- struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
-
- r600_bo_reference(rctx->radeon, &shader->bo, NULL);
- r600_bc_clear(&shader->shader.bc);
-
- memset(&shader->shader,0,sizeof(struct r600_shader));
+ pipe_resource_reference((struct pipe_resource**)&shader->bo, NULL);
+ r600_bytecode_clear(&shader->shader.bc);
}
/*
unsigned type;
unsigned file_offset[TGSI_FILE_COUNT];
unsigned temp_reg;
- unsigned ar_reg;
struct r600_shader_tgsi_instruction *inst_info;
- struct r600_bc *bc;
+ struct r600_bytecode *bc;
struct r600_shader *shader;
struct r600_shader_src src[4];
- u32 *literals;
- u32 nliterals;
- u32 max_driver_temp_used;
+ uint32_t *literals;
+ uint32_t nliterals;
+ uint32_t max_driver_temp_used;
/* needed for evergreen interpolation */
boolean input_centroid;
boolean input_linear;
boolean input_perspective;
int num_interp_gpr;
+ int face_gpr;
+ int colors_used;
+ boolean clip_vertex_write;
+ unsigned cv_output;
+ int fragcoord_input;
+ int native_integers;
};
struct r600_shader_tgsi_instruction {
static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[], eg_shader_tgsi_instruction[], cm_shader_tgsi_instruction[];
static int tgsi_helper_tempx_replicate(struct r600_shader_ctx *ctx);
+static inline void callstack_check_depth(struct r600_shader_ctx *ctx, unsigned reason, unsigned check_max_only);
+static void fc_pushlevel(struct r600_shader_ctx *ctx, int type);
+static int tgsi_else(struct r600_shader_ctx *ctx);
+static int tgsi_endif(struct r600_shader_ctx *ctx);
+static int tgsi_bgnloop(struct r600_shader_ctx *ctx);
+static int tgsi_endloop(struct r600_shader_ctx *ctx);
+static int tgsi_loop_brk_cont(struct r600_shader_ctx *ctx);
+
+/*
+ * bytestream -> r600 shader
+ *
+ * These functions are used to transform the output of the LLVM backend into
+ * struct r600_bytecode.
+ */
+
+static void r600_bytecode_from_byte_stream(struct r600_shader_ctx *ctx,
+ unsigned char * bytes, unsigned num_bytes);
+
+#ifdef HAVE_OPENCL
+int r600_compute_shader_create(struct pipe_context * ctx,
+ LLVMModuleRef mod, struct r600_bytecode * bytecode)
+{
+ struct r600_context *r600_ctx = (struct r600_context *)ctx;
+ unsigned char * bytes;
+ unsigned byte_count;
+ struct r600_shader_ctx shader_ctx;
+ unsigned dump = 0;
+
+ if (debug_get_bool_option("R600_DUMP_SHADERS", FALSE)) {
+ dump = 1;
+ }
+
+ r600_llvm_compile(mod, &bytes, &byte_count, r600_ctx->family , dump);
+ shader_ctx.bc = bytecode;
+ r600_bytecode_init(shader_ctx.bc, r600_ctx->chip_class, r600_ctx->family);
+ shader_ctx.bc->type = TGSI_PROCESSOR_COMPUTE;
+ r600_bytecode_from_byte_stream(&shader_ctx, bytes, byte_count);
+ if (shader_ctx.bc->chip_class == CAYMAN) {
+ cm_bytecode_add_cf_end(shader_ctx.bc);
+ }
+ r600_bytecode_build(shader_ctx.bc);
+ if (dump) {
+ r600_bytecode_dump(shader_ctx.bc);
+ }
+ return 1;
+}
+
+#endif /* HAVE_OPENCL */
+
+static unsigned r600_src_from_byte_stream(unsigned char * bytes,
+ unsigned bytes_read, struct r600_bytecode_alu * alu, unsigned src_idx)
+{
+ unsigned i;
+ unsigned sel0, sel1;
+ sel0 = bytes[bytes_read++];
+ sel1 = bytes[bytes_read++];
+ alu->src[src_idx].sel = sel0 | (sel1 << 8);
+ alu->src[src_idx].chan = bytes[bytes_read++];
+ alu->src[src_idx].neg = bytes[bytes_read++];
+ alu->src[src_idx].abs = bytes[bytes_read++];
+ alu->src[src_idx].rel = bytes[bytes_read++];
+ alu->src[src_idx].kc_bank = bytes[bytes_read++];
+ for (i = 0; i < 4; i++) {
+ alu->src[src_idx].value |= bytes[bytes_read++] << (i * 8);
+ }
+ return bytes_read;
+}
+
+static unsigned r600_alu_from_byte_stream(struct r600_shader_ctx *ctx,
+ unsigned char * bytes, unsigned bytes_read)
+{
+ unsigned src_idx;
+ unsigned inst0, inst1;
+ struct r600_bytecode_alu alu;
+ memset(&alu, 0, sizeof(alu));
+ for(src_idx = 0; src_idx < 3; src_idx++) {
+ bytes_read = r600_src_from_byte_stream(bytes, bytes_read,
+ &alu, src_idx);
+ }
+
+ alu.dst.sel = bytes[bytes_read++];
+ alu.dst.chan = bytes[bytes_read++];
+ alu.dst.clamp = bytes[bytes_read++];
+ alu.dst.write = bytes[bytes_read++];
+ alu.dst.rel = bytes[bytes_read++];
+ inst0 = bytes[bytes_read++];
+ inst1 = bytes[bytes_read++];
+ alu.inst = inst0 | (inst1 << 8);
+ alu.last = bytes[bytes_read++];
+ alu.is_op3 = bytes[bytes_read++];
+ alu.predicate = bytes[bytes_read++];
+ alu.bank_swizzle = bytes[bytes_read++];
+ alu.bank_swizzle_force = bytes[bytes_read++];
+ alu.omod = bytes[bytes_read++];
+ alu.index_mode = bytes[bytes_read++];
+ r600_bytecode_add_alu(ctx->bc, &alu);
+
+ /* XXX: Handle other KILL instructions */
+ if (alu.inst == CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT)) {
+ ctx->shader->uses_kill = 1;
+ /* XXX: This should be enforced in the LLVM backend. */
+ ctx->bc->force_add_cf = 1;
+ }
+ return bytes_read;
+}
+
+static void llvm_if(struct r600_shader_ctx *ctx, struct r600_bytecode_alu * alu,
+ unsigned pred_inst)
+{
+ alu->inst = pred_inst;
+ alu->predicate = 1;
+ alu->dst.write = 0;
+ alu->src[1].sel = V_SQ_ALU_SRC_0;
+ alu->src[1].chan = 0;
+ alu->last = 1;
+ r600_bytecode_add_alu_type(ctx->bc, alu,
+ CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE));
+
+ r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_JUMP));
+ fc_pushlevel(ctx, FC_IF);
+ callstack_check_depth(ctx, FC_PUSH_VPM, 0);
+}
+
+static void r600_break_from_byte_stream(struct r600_shader_ctx *ctx,
+ struct r600_bytecode_alu *alu, unsigned compare_opcode)
+{
+ unsigned opcode = TGSI_OPCODE_BRK;
+ if (ctx->bc->chip_class == CAYMAN)
+ ctx->inst_info = &cm_shader_tgsi_instruction[opcode];
+ else if (ctx->bc->chip_class >= EVERGREEN)
+ ctx->inst_info = &eg_shader_tgsi_instruction[opcode];
+ else
+ ctx->inst_info = &r600_shader_tgsi_instruction[opcode];
+ llvm_if(ctx, alu, compare_opcode);
+ tgsi_loop_brk_cont(ctx);
+ tgsi_endif(ctx);
+}
+
+static unsigned r600_fc_from_byte_stream(struct r600_shader_ctx *ctx,
+ unsigned char * bytes, unsigned bytes_read)
+{
+ struct r600_bytecode_alu alu;
+ unsigned inst;
+ memset(&alu, 0, sizeof(alu));
+ bytes_read = r600_src_from_byte_stream(bytes, bytes_read, &alu, 0);
+ inst = bytes[bytes_read++];
+ switch (inst) {
+ case 0:
+ llvm_if(ctx, &alu,
+ CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE));
+ break;
+ case 1:
+ tgsi_else(ctx);
+ break;
+ case 2:
+ tgsi_endif(ctx);
+ break;
+ case 3:
+ tgsi_bgnloop(ctx);
+ break;
+ case 4:
+ tgsi_endloop(ctx);
+ break;
+ case 5:
+ r600_break_from_byte_stream(ctx, &alu,
+ CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE));
+ break;
+ case 6:
+ r600_break_from_byte_stream(ctx, &alu,
+ CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT));
+ break;
+ case 7:
+ {
+ unsigned opcode = TGSI_OPCODE_CONT;
+ if (ctx->bc->chip_class == CAYMAN) {
+ ctx->inst_info =
+ &cm_shader_tgsi_instruction[opcode];
+ } else if (ctx->bc->chip_class >= EVERGREEN) {
+ ctx->inst_info =
+ &eg_shader_tgsi_instruction[opcode];
+ } else {
+ ctx->inst_info =
+ &r600_shader_tgsi_instruction[opcode];
+ }
+ tgsi_loop_brk_cont(ctx);
+ }
+ break;
+ case 8:
+ r600_break_from_byte_stream(ctx, &alu,
+ CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT));
+ break;
+ }
+
+ return bytes_read;
+}
+
+static unsigned r600_tex_from_byte_stream(struct r600_shader_ctx *ctx,
+ unsigned char * bytes, unsigned bytes_read)
+{
+ struct r600_bytecode_tex tex;
+
+ tex.inst = bytes[bytes_read++];
+ tex.resource_id = bytes[bytes_read++];
+ tex.src_gpr = bytes[bytes_read++];
+ tex.src_rel = bytes[bytes_read++];
+ tex.dst_gpr = bytes[bytes_read++];
+ tex.dst_rel = bytes[bytes_read++];
+ tex.dst_sel_x = bytes[bytes_read++];
+ tex.dst_sel_y = bytes[bytes_read++];
+ tex.dst_sel_z = bytes[bytes_read++];
+ tex.dst_sel_w = bytes[bytes_read++];
+ tex.lod_bias = bytes[bytes_read++];
+ tex.coord_type_x = bytes[bytes_read++];
+ tex.coord_type_y = bytes[bytes_read++];
+ tex.coord_type_z = bytes[bytes_read++];
+ tex.coord_type_w = bytes[bytes_read++];
+ tex.offset_x = bytes[bytes_read++];
+ tex.offset_y = bytes[bytes_read++];
+ tex.offset_z = bytes[bytes_read++];
+ tex.sampler_id = bytes[bytes_read++];
+ tex.src_sel_x = bytes[bytes_read++];
+ tex.src_sel_y = bytes[bytes_read++];
+ tex.src_sel_z = bytes[bytes_read++];
+ tex.src_sel_w = bytes[bytes_read++];
+
+ r600_bytecode_add_tex(ctx->bc, &tex);
+
+ return bytes_read;
+}
+
+static int r600_vtx_from_byte_stream(struct r600_shader_ctx *ctx,
+ unsigned char * bytes, unsigned bytes_read)
+{
+ struct r600_bytecode_vtx vtx;
+ memset(&vtx, 0, sizeof(vtx));
+ vtx.inst = bytes[bytes_read++];
+ vtx.fetch_type = bytes[bytes_read++];
+ vtx.buffer_id = bytes[bytes_read++];
+ vtx.src_gpr = bytes[bytes_read++];
+ vtx.src_sel_x = bytes[bytes_read++];
+ vtx.mega_fetch_count = bytes[bytes_read++];
+ vtx.dst_gpr = bytes[bytes_read++];
+ vtx.dst_sel_x = bytes[bytes_read++];
+ vtx.dst_sel_y = bytes[bytes_read++];
+ vtx.dst_sel_z = bytes[bytes_read++];
+ vtx.dst_sel_w = bytes[bytes_read++];
+ vtx.use_const_fields = bytes[bytes_read++];
+ vtx.data_format = bytes[bytes_read++];
+ vtx.num_format_all = bytes[bytes_read++];
+ vtx.format_comp_all = bytes[bytes_read++];
+ vtx.srf_mode_all = bytes[bytes_read++];
+ /* offset is 2 bytes wide */
+ vtx.offset = bytes[bytes_read++];
+ vtx.offset |= (bytes[bytes_read++] << 8);
+ vtx.endian = bytes[bytes_read++];
+
+ if (r600_bytecode_add_vtx(ctx->bc, &vtx)) {
+ fprintf(stderr, "Error adding vtx\n");
+ }
+ /* Use the Texture Cache */
+ ctx->bc->cf_last->inst = EG_V_SQ_CF_WORD1_SQ_CF_INST_TEX;
+ return bytes_read;
+}
+
+static void r600_bytecode_from_byte_stream(struct r600_shader_ctx *ctx,
+ unsigned char * bytes, unsigned num_bytes)
+{
+ unsigned bytes_read = 0;
+ unsigned i, byte;
+ while (bytes_read < num_bytes) {
+ char inst_type = bytes[bytes_read++];
+ switch (inst_type) {
+ case 0:
+ bytes_read = r600_alu_from_byte_stream(ctx, bytes,
+ bytes_read);
+ break;
+ case 1:
+ bytes_read = r600_tex_from_byte_stream(ctx, bytes,
+ bytes_read);
+ break;
+ case 2:
+ bytes_read = r600_fc_from_byte_stream(ctx, bytes,
+ bytes_read);
+ break;
+ case 3:
+ r600_bytecode_add_cfinst(ctx->bc, CF_NATIVE);
+ for (i = 0; i < 2; i++) {
+ for (byte = 0 ; byte < 4; byte++) {
+ ctx->bc->cf_last->isa[i] |=
+ (bytes[bytes_read++] << (byte * 8));
+ }
+ }
+ break;
+
+ case 4:
+ bytes_read = r600_vtx_from_byte_stream(ctx, bytes,
+ bytes_read);
+ break;
+ default:
+ /* XXX: Error here */
+ break;
+ }
+ }
+}
+
+/* End bytestream -> r600 shader functions*/
static int tgsi_is_supported(struct r600_shader_ctx *ctx)
{
static int evergreen_interp_alu(struct r600_shader_ctx *ctx, int input)
{
int i, r;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int gpr = 0, base_chan = 0;
int ij_index = 0;
base_chan = (2 * (ij_index % 2)) + 1;
for (i = 0; i < 8; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
if (i < 4)
- alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_ZW;
+ alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_ZW;
else
- alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_XY;
+ alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_XY;
if ((i > 1) && (i < 6)) {
alu.dst.sel = ctx->shader->input[input].gpr;
alu.bank_swizzle_force = SQ_ALU_VEC_210;
if ((i % 4) == 3)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
+ return 0;
+}
+
+static int evergreen_interp_flat(struct r600_shader_ctx *ctx, int input)
+{
+ int i, r;
+ struct r600_bytecode_alu alu;
+
+ for (i = 0; i < 4; i++) {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+
+ alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P0;
+
+ alu.dst.sel = ctx->shader->input[input].gpr;
+ alu.dst.write = 1;
+
+ alu.dst.chan = i;
+
+ alu.src[0].sel = V_SQ_ALU_SRC_PARAM_BASE + ctx->shader->input[input].lds_pos;
+ alu.src[0].chan = i;
+
+ if (i == 3)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
return 0;
}
+/*
+ * Special export handling in shaders
+ *
+ * shader export ARRAY_BASE for EXPORT_POS:
+ * 60 is position
+ * 61 is misc vector
+ * 62, 63 are clip distance vectors
+ *
+ * The use of the values exported in 61-63 are controlled by PA_CL_VS_OUT_CNTL:
+ * VS_OUT_MISC_VEC_ENA - enables the use of all fields in export 61
+ * USE_VTX_POINT_SIZE - point size in the X channel of export 61
+ * USE_VTX_EDGE_FLAG - edge flag in the Y channel of export 61
+ * USE_VTX_RENDER_TARGET_INDX - render target index in the Z channel of export 61
+ * USE_VTX_VIEWPORT_INDX - viewport index in the W channel of export 61
+ * USE_VTX_KILL_FLAG - kill flag in the Z channel of export 61 (mutually
+ * exclusive from render target index)
+ * VS_OUT_CCDIST0_VEC_ENA/VS_OUT_CCDIST1_VEC_ENA - enable clip distance vectors
+ *
+ *
+ * shader export ARRAY_BASE for EXPORT_PIXEL:
+ * 0-7 CB targets
+ * 61 computed Z vector
+ *
+ * The use of the values exported in the computed Z vector are controlled
+ * by DB_SHADER_CONTROL:
+ * Z_EXPORT_ENABLE - Z as a float in RED
+ * STENCIL_REF_EXPORT_ENABLE - stencil ref as int in GREEN
+ * COVERAGE_TO_MASK_ENABLE - alpha to mask in ALPHA
+ * MASK_EXPORT_ENABLE - pixel sample mask in BLUE
+ * DB_SOURCE_FORMAT - export control restrictions
+ *
+ */
+
+
+/* Map name/sid pair from tgsi to the 8-bit semantic index for SPI setup */
+static int r600_spi_sid(struct r600_shader_io * io)
+{
+ int index, name = io->name;
+
+ /* These params are handled differently, they don't need
+ * semantic indices, so we'll use 0 for them.
+ */
+ if (name == TGSI_SEMANTIC_POSITION ||
+ name == TGSI_SEMANTIC_PSIZE ||
+ name == TGSI_SEMANTIC_FACE)
+ index = 0;
+ else {
+ if (name == TGSI_SEMANTIC_GENERIC) {
+ /* For generic params simply use sid from tgsi */
+ index = io->sid;
+ } else {
+ /* For non-generic params - pack name and sid into 8 bits */
+ index = 0x80 | (name<<3) | (io->sid);
+ }
+
+ /* Make sure that all really used indices have nonzero value, so
+ * we can just compare it to 0 later instead of comparing the name
+ * with different values to detect special cases. */
+ index++;
+ }
+
+ return index;
+};
+
+/* turn input into interpolate on EG */
+static int evergreen_interp_input(struct r600_shader_ctx *ctx, int index)
+{
+ int r = 0;
+
+ if (ctx->shader->input[index].spi_sid) {
+ ctx->shader->input[index].lds_pos = ctx->shader->nlds++;
+ if (ctx->shader->input[index].interpolate > 0) {
+ r = evergreen_interp_alu(ctx, index);
+ } else {
+ r = evergreen_interp_flat(ctx, index);
+ }
+ }
+ return r;
+}
+
+static int select_twoside_color(struct r600_shader_ctx *ctx, int front, int back)
+{
+ struct r600_bytecode_alu alu;
+ int i, r;
+ int gpr_front = ctx->shader->input[front].gpr;
+ int gpr_back = ctx->shader->input[back].gpr;
+
+ for (i = 0; i < 4; i++) {
+ memset(&alu, 0, sizeof(alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT);
+ alu.is_op3 = 1;
+ alu.dst.write = 1;
+ alu.dst.sel = gpr_front;
+ alu.src[0].sel = ctx->face_gpr;
+ alu.src[1].sel = gpr_front;
+ alu.src[2].sel = gpr_back;
+
+ alu.dst.chan = i;
+ alu.src[1].chan = i;
+ alu.src[2].chan = i;
+ alu.last = (i==3);
+
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+
+ return 0;
+}
static int tgsi_declaration(struct r600_shader_ctx *ctx)
{
i = ctx->shader->ninput++;
ctx->shader->input[i].name = d->Semantic.Name;
ctx->shader->input[i].sid = d->Semantic.Index;
- ctx->shader->input[i].interpolate = d->Declaration.Interpolate;
- ctx->shader->input[i].centroid = d->Declaration.Centroid;
- ctx->shader->input[i].gpr = ctx->file_offset[TGSI_FILE_INPUT] + i;
- if (ctx->type == TGSI_PROCESSOR_FRAGMENT && ctx->bc->chip_class >= EVERGREEN) {
- /* turn input into interpolate on EG */
- if (ctx->shader->input[i].name != TGSI_SEMANTIC_POSITION) {
- if (ctx->shader->input[i].interpolate > 0) {
- ctx->shader->input[i].lds_pos = ctx->shader->nlds++;
- evergreen_interp_alu(ctx, i);
- }
+ ctx->shader->input[i].spi_sid = r600_spi_sid(&ctx->shader->input[i]);
+ ctx->shader->input[i].interpolate = d->Interp.Interpolate;
+ ctx->shader->input[i].centroid = d->Interp.Centroid;
+ ctx->shader->input[i].gpr = ctx->file_offset[TGSI_FILE_INPUT] + d->Range.First;
+ if (ctx->type == TGSI_PROCESSOR_FRAGMENT) {
+ switch (ctx->shader->input[i].name) {
+ case TGSI_SEMANTIC_FACE:
+ ctx->face_gpr = ctx->shader->input[i].gpr;
+ break;
+ case TGSI_SEMANTIC_COLOR:
+ ctx->colors_used++;
+ break;
+ case TGSI_SEMANTIC_POSITION:
+ ctx->fragcoord_input = i;
+ break;
+ }
+ if (ctx->bc->chip_class >= EVERGREEN) {
+ if ((r = evergreen_interp_input(ctx, i)))
+ return r;
}
}
break;
i = ctx->shader->noutput++;
ctx->shader->output[i].name = d->Semantic.Name;
ctx->shader->output[i].sid = d->Semantic.Index;
- ctx->shader->output[i].gpr = ctx->file_offset[TGSI_FILE_OUTPUT] + i;
- ctx->shader->output[i].interpolate = d->Declaration.Interpolate;
+ ctx->shader->output[i].spi_sid = r600_spi_sid(&ctx->shader->output[i]);
+ ctx->shader->output[i].gpr = ctx->file_offset[TGSI_FILE_OUTPUT] + d->Range.First;
+ ctx->shader->output[i].interpolate = d->Interp.Interpolate;
+ ctx->shader->output[i].write_mask = d->Declaration.UsageMask;
+ if (ctx->type == TGSI_PROCESSOR_VERTEX) {
+ switch (d->Semantic.Name) {
+ case TGSI_SEMANTIC_CLIPDIST:
+ ctx->shader->clip_dist_write |= d->Declaration.UsageMask << (d->Semantic.Index << 2);
+ break;
+ case TGSI_SEMANTIC_PSIZE:
+ ctx->shader->vs_out_misc_write = 1;
+ ctx->shader->vs_out_point_size = 1;
+ break;
+ case TGSI_SEMANTIC_CLIPVERTEX:
+ ctx->clip_vertex_write = TRUE;
+ ctx->cv_output = i;
+ break;
+ }
+ }
break;
case TGSI_FILE_CONSTANT:
case TGSI_FILE_TEMPORARY:
case TGSI_FILE_SYSTEM_VALUE:
if (d->Semantic.Name == TGSI_SEMANTIC_INSTANCEID) {
- struct r600_bc_alu alu;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ if (!ctx->native_integers) {
+ struct r600_bytecode_alu alu;
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
- alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT);
- alu.src[0].sel = 0;
- alu.src[0].chan = 3;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT);
+ alu.src[0].sel = 0;
+ alu.src[0].chan = 3;
- alu.dst.sel = 0;
- alu.dst.chan = 3;
- alu.dst.write = 1;
- alu.last = 1;
+ alu.dst.sel = 0;
+ alu.dst.chan = 3;
+ alu.dst.write = 1;
+ alu.last = 1;
- if ((r = r600_bc_add_alu(ctx->bc, &alu)))
- return r;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+ break;
+ } else if (d->Semantic.Name == TGSI_SEMANTIC_VERTEXID)
break;
- }
-
default:
R600_ERR("unsupported file %d declaration\n", d->Declaration.File);
return -EINVAL;
ctx->num_interp_gpr += (num_baryc + 1) >> 1;
- /* TODO PULL MODEL and LINE STIPPLE, FIXED PT POS */
+ /* XXX PULL MODEL and LINE STIPPLE, FIXED PT POS */
return ctx->num_interp_gpr;
}
(tgsi_src->Register.SwizzleX == tgsi_src->Register.SwizzleW)) {
index = tgsi_src->Register.Index * 4 + tgsi_src->Register.SwizzleX;
- r600_bc_special_constants(ctx->literals[index], &r600_src->sel, &r600_src->neg);
+ r600_bytecode_special_constants(ctx->literals[index], &r600_src->sel, &r600_src->neg);
if (r600_src->sel != V_SQ_ALU_SRC_LITERAL)
return;
}
r600_src->sel = V_SQ_ALU_SRC_LITERAL;
memcpy(r600_src->value, ctx->literals + index * 4, sizeof(r600_src->value));
} else if (tgsi_src->Register.File == TGSI_FILE_SYSTEM_VALUE) {
- /* assume we wan't TGSI_SEMANTIC_INSTANCEID here */
- r600_src->swizzle[0] = 3;
- r600_src->swizzle[1] = 3;
- r600_src->swizzle[2] = 3;
- r600_src->swizzle[3] = 3;
- r600_src->sel = 0;
+ if (ctx->info.system_value_semantic_name[tgsi_src->Register.Index] == TGSI_SEMANTIC_INSTANCEID) {
+ r600_src->swizzle[0] = 3;
+ r600_src->swizzle[1] = 3;
+ r600_src->swizzle[2] = 3;
+ r600_src->swizzle[3] = 3;
+ r600_src->sel = 0;
+ } else if (ctx->info.system_value_semantic_name[tgsi_src->Register.Index] == TGSI_SEMANTIC_VERTEXID) {
+ r600_src->swizzle[0] = 0;
+ r600_src->swizzle[1] = 0;
+ r600_src->swizzle[2] = 0;
+ r600_src->swizzle[3] = 0;
+ r600_src->sel = 0;
+ }
} else {
if (tgsi_src->Register.Indirect)
r600_src->rel = V_SQ_REL_RELATIVE;
static int tgsi_fetch_rel_const(struct r600_shader_ctx *ctx, unsigned int offset, unsigned int dst_reg)
{
- struct r600_bc_vtx vtx;
+ struct r600_bytecode_vtx vtx;
unsigned int ar_reg;
int r;
if (offset) {
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
memset(&alu, 0, sizeof(alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT);
- alu.src[0].sel = ctx->ar_reg;
+ alu.src[0].sel = ctx->bc->ar_reg;
alu.src[1].sel = V_SQ_ALU_SRC_LITERAL;
alu.src[1].value = offset;
alu.dst.write = 1;
alu.last = 1;
- if ((r = r600_bc_add_alu(ctx->bc, &alu)))
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
return r;
ar_reg = dst_reg;
} else {
- ar_reg = ctx->ar_reg;
+ ar_reg = ctx->bc->ar_reg;
}
memset(&vtx, 0, sizeof(vtx));
vtx.srf_mode_all = 1; /* SRF_MODE_NO_ZERO */
vtx.endian = r600_endian_swap(32);
- if ((r = r600_bc_add_vtx(ctx->bc, &vtx)))
+ if ((r = r600_bytecode_add_vtx(ctx->bc, &vtx)))
return r;
return 0;
static int tgsi_split_constant(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, j, k, nconst, r;
for (i = 0, nconst = 0; i < inst->Instruction.NumSrcRegs; i++) {
} else if (j > 0) {
int treg = r600_get_temp(ctx);
for (k = 0; k < 4; k++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = ctx->src[i].sel;
alu.src[0].chan = k;
alu.dst.write = 1;
if (k == 3)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int tgsi_split_literal_constant(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, j, k, nliteral, r;
for (i = 0, nliteral = 0; i < inst->Instruction.NumSrcRegs; i++) {
if (j > 0 && ctx->src[i].sel == V_SQ_ALU_SRC_LITERAL) {
int treg = r600_get_temp(ctx);
for (k = 0; k < 4; k++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = ctx->src[i].sel;
alu.src[0].chan = k;
alu.dst.write = 1;
if (k == 3)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
return 0;
}
-static int r600_shader_from_tgsi(struct r600_pipe_context * rctx, struct r600_pipe_shader *pipeshader)
+static int process_twoside_color_inputs(struct r600_shader_ctx *ctx)
+{
+ int i, r, count = ctx->shader->ninput;
+
+ /* additional inputs will be allocated right after the existing inputs,
+ * we won't need them after the color selection, so we don't need to
+ * reserve these gprs for the rest of the shader code and to adjust
+ * output offsets etc. */
+ int gpr = ctx->file_offset[TGSI_FILE_INPUT] +
+ ctx->info.file_max[TGSI_FILE_INPUT] + 1;
+
+ if (ctx->face_gpr == -1) {
+ i = ctx->shader->ninput++;
+ ctx->shader->input[i].name = TGSI_SEMANTIC_FACE;
+ ctx->shader->input[i].spi_sid = 0;
+ ctx->shader->input[i].gpr = gpr++;
+ ctx->face_gpr = ctx->shader->input[i].gpr;
+ }
+
+ for (i = 0; i < count; i++) {
+ if (ctx->shader->input[i].name == TGSI_SEMANTIC_COLOR) {
+ int ni = ctx->shader->ninput++;
+ memcpy(&ctx->shader->input[ni],&ctx->shader->input[i], sizeof(struct r600_shader_io));
+ ctx->shader->input[ni].name = TGSI_SEMANTIC_BCOLOR;
+ ctx->shader->input[ni].spi_sid = r600_spi_sid(&ctx->shader->input[ni]);
+ ctx->shader->input[ni].gpr = gpr++;
+
+ if (ctx->bc->chip_class >= EVERGREEN) {
+ r = evergreen_interp_input(ctx, ni);
+ if (r)
+ return r;
+ }
+
+ r = select_twoside_color(ctx, i, ni);
+ if (r)
+ return r;
+ }
+ }
+ return 0;
+}
+
+static int r600_shader_from_tgsi(struct r600_context * rctx, struct r600_pipe_shader *pipeshader)
{
struct r600_shader *shader = &pipeshader->shader;
- struct tgsi_token *tokens = pipeshader->tokens;
+ struct tgsi_token *tokens = pipeshader->selector->tokens;
+ struct pipe_stream_output_info so = pipeshader->selector->so;
struct tgsi_full_immediate *immediate;
struct tgsi_full_property *property;
struct r600_shader_ctx ctx;
- struct r600_bc_output output[32];
+ struct r600_bytecode_output output[32];
unsigned output_done, noutput;
unsigned opcode;
- int i, j, r = 0, pos0;
-
+ int i, j, k, r = 0;
+ int next_pixel_base = 0, next_pos_base = 60, next_param_base = 0;
+ /* Declarations used by llvm code */
+ bool use_llvm = false;
+ unsigned char * inst_bytes = NULL;
+ unsigned inst_byte_count = 0;
+
+#ifdef R600_USE_LLVM
+ use_llvm = debug_get_bool_option("R600_LLVM", TRUE);
+#endif
ctx.bc = &shader->bc;
ctx.shader = shader;
- r600_bc_init(ctx.bc, rctx->chip_class);
+ ctx.native_integers = (rctx->screen->glsl_feature_level >= 130);
+
+ r600_bytecode_init(ctx.bc, rctx->chip_class, rctx->family);
ctx.tokens = tokens;
tgsi_scan_shader(tokens, &ctx.info);
tgsi_parse_init(&ctx.parse, tokens);
shader->processor_type = ctx.type;
ctx.bc->type = shader->processor_type;
- shader->clamp_color = (((ctx.type == TGSI_PROCESSOR_FRAGMENT) && rctx->clamp_fragment_color) ||
- ((ctx.type == TGSI_PROCESSOR_VERTEX) && rctx->clamp_vertex_color));
+ ctx.face_gpr = -1;
+ ctx.fragcoord_input = -1;
+ ctx.colors_used = 0;
+ ctx.clip_vertex_write = 0;
+ shader->two_side = (ctx.type == TGSI_PROCESSOR_FRAGMENT) && rctx->two_side;
shader->nr_cbufs = rctx->nr_cbufs;
/* register allocations */
if (ctx.type == TGSI_PROCESSOR_VERTEX) {
ctx.file_offset[TGSI_FILE_INPUT] = 1;
if (ctx.bc->chip_class >= EVERGREEN) {
- r600_bc_add_cfinst(ctx.bc, EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS);
+ r600_bytecode_add_cfinst(ctx.bc, EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS);
} else {
- r600_bc_add_cfinst(ctx.bc, V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS);
+ r600_bytecode_add_cfinst(ctx.bc, V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS);
}
}
if (ctx.type == TGSI_PROCESSOR_FRAGMENT && ctx.bc->chip_class >= EVERGREEN) {
ctx.file_offset[TGSI_FILE_INPUT] = evergreen_gpr_count(&ctx);
}
- ctx.file_offset[TGSI_FILE_OUTPUT] = ctx.file_offset[TGSI_FILE_INPUT] +
- ctx.info.file_count[TGSI_FILE_INPUT];
+
+ /* LLVM backend setup */
+#ifdef R600_USE_LLVM
+ if (use_llvm && ctx.info.indirect_files) {
+ fprintf(stderr, "Warning: R600 LLVM backend does not support "
+ "indirect adressing. Falling back to TGSI "
+ "backend.\n");
+ use_llvm = 0;
+ }
+ if (use_llvm) {
+ struct radeon_llvm_context radeon_llvm_ctx;
+ LLVMModuleRef mod;
+ unsigned dump = 0;
+ memset(&radeon_llvm_ctx, 0, sizeof(radeon_llvm_ctx));
+ radeon_llvm_ctx.reserved_reg_count = ctx.file_offset[TGSI_FILE_INPUT];
+ mod = r600_tgsi_llvm(&radeon_llvm_ctx, tokens);
+ if (debug_get_bool_option("R600_DUMP_SHADERS", FALSE)) {
+ dump = 1;
+ }
+ if (r600_llvm_compile(mod, &inst_bytes, &inst_byte_count,
+ rctx->family, dump)) {
+ FREE(inst_bytes);
+ radeon_llvm_dispose(&radeon_llvm_ctx);
+ use_llvm = 0;
+ fprintf(stderr, "R600 LLVM backend failed to compile "
+ "shader. Falling back to TGSI\n");
+ } else {
+ ctx.file_offset[TGSI_FILE_OUTPUT] =
+ ctx.file_offset[TGSI_FILE_INPUT];
+ }
+ radeon_llvm_dispose(&radeon_llvm_ctx);
+ }
+#endif
+ /* End of LLVM backend setup */
+
+ if (!use_llvm) {
+ ctx.file_offset[TGSI_FILE_OUTPUT] =
+ ctx.file_offset[TGSI_FILE_INPUT] +
+ ctx.info.file_max[TGSI_FILE_INPUT] + 1;
+ }
ctx.file_offset[TGSI_FILE_TEMPORARY] = ctx.file_offset[TGSI_FILE_OUTPUT] +
- ctx.info.file_count[TGSI_FILE_OUTPUT];
+ ctx.info.file_max[TGSI_FILE_OUTPUT] + 1;
/* Outside the GPR range. This will be translated to one of the
* kcache banks later. */
ctx.file_offset[TGSI_FILE_CONSTANT] = 512;
ctx.file_offset[TGSI_FILE_IMMEDIATE] = V_SQ_ALU_SRC_LITERAL;
- ctx.ar_reg = ctx.file_offset[TGSI_FILE_TEMPORARY] +
- ctx.info.file_count[TGSI_FILE_TEMPORARY];
- ctx.temp_reg = ctx.ar_reg + 1;
+ ctx.bc->ar_reg = ctx.file_offset[TGSI_FILE_TEMPORARY] +
+ ctx.info.file_max[TGSI_FILE_TEMPORARY] + 1;
+ ctx.temp_reg = ctx.bc->ar_reg + 1;
ctx.nliterals = 0;
ctx.literals = NULL;
goto out_err;
break;
case TGSI_TOKEN_TYPE_INSTRUCTION:
- r = tgsi_is_supported(&ctx);
- if (r)
- goto out_err;
- ctx.max_driver_temp_used = 0;
- /* reserve first tmp for everyone */
- r600_get_temp(&ctx);
-
- opcode = ctx.parse.FullToken.FullInstruction.Instruction.Opcode;
- if ((r = tgsi_split_constant(&ctx)))
- goto out_err;
- if ((r = tgsi_split_literal_constant(&ctx)))
- goto out_err;
- if (ctx.bc->chip_class == CAYMAN)
- ctx.inst_info = &cm_shader_tgsi_instruction[opcode];
- else if (ctx.bc->chip_class >= EVERGREEN)
- ctx.inst_info = &eg_shader_tgsi_instruction[opcode];
- else
- ctx.inst_info = &r600_shader_tgsi_instruction[opcode];
- r = ctx.inst_info->process(&ctx);
- if (r)
- goto out_err;
break;
case TGSI_TOKEN_TYPE_PROPERTY:
property = &ctx.parse.FullToken.FullProperty;
- if (property->Property.PropertyName == TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS) {
+ switch (property->Property.PropertyName) {
+ case TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS:
if (property->u[0].Data == 1)
shader->fs_write_all = TRUE;
+ break;
+ case TGSI_PROPERTY_VS_PROHIBIT_UCPS:
+ if (property->u[0].Data == 1)
+ shader->vs_prohibit_ucps = TRUE;
+ break;
}
break;
default:
}
}
- noutput = shader->noutput;
+ if (ctx.fragcoord_input >= 0) {
+ if (ctx.bc->chip_class == CAYMAN) {
+ for (j = 0 ; j < 4; j++) {
+ struct r600_bytecode_alu alu;
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = BC_INST(ctx.bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE);
+ alu.src[0].sel = shader->input[ctx.fragcoord_input].gpr;
+ alu.src[0].chan = 3;
+
+ alu.dst.sel = shader->input[ctx.fragcoord_input].gpr;
+ alu.dst.chan = j;
+ alu.dst.write = (j == 3);
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx.bc, &alu)))
+ return r;
+ }
+ } else {
+ struct r600_bytecode_alu alu;
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = BC_INST(ctx.bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE);
+ alu.src[0].sel = shader->input[ctx.fragcoord_input].gpr;
+ alu.src[0].chan = 3;
- /* clamp color outputs */
- if (shader->clamp_color) {
- for (i = 0; i < noutput; i++) {
- if (shader->output[i].name == TGSI_SEMANTIC_COLOR ||
- shader->output[i].name == TGSI_SEMANTIC_BCOLOR) {
+ alu.dst.sel = shader->input[ctx.fragcoord_input].gpr;
+ alu.dst.chan = 3;
+ alu.dst.write = 1;
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx.bc, &alu)))
+ return r;
+ }
+ }
- int j;
- for (j = 0; j < 4; j++) {
- struct r600_bc_alu alu;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ if (shader->two_side && ctx.colors_used) {
+ if ((r = process_twoside_color_inputs(&ctx)))
+ return r;
+ }
- /* MOV_SAT R, R */
- alu.inst = BC_INST(ctx.bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
- alu.dst.sel = shader->output[i].gpr;
- alu.dst.chan = j;
- alu.dst.write = 1;
- alu.dst.clamp = 1;
- alu.src[0].sel = alu.dst.sel;
- alu.src[0].chan = j;
+ tgsi_parse_init(&ctx.parse, tokens);
+ while (!tgsi_parse_end_of_tokens(&ctx.parse)) {
+ tgsi_parse_token(&ctx.parse);
+ switch (ctx.parse.FullToken.Token.Type) {
+ case TGSI_TOKEN_TYPE_INSTRUCTION:
+ if (use_llvm) {
+ continue;
+ }
+ r = tgsi_is_supported(&ctx);
+ if (r)
+ goto out_err;
+ ctx.max_driver_temp_used = 0;
+ /* reserve first tmp for everyone */
+ r600_get_temp(&ctx);
- if (j == 3) {
- alu.last = 1;
- }
- r = r600_bc_add_alu(ctx.bc, &alu);
- if (r)
- return r;
+ opcode = ctx.parse.FullToken.FullInstruction.Instruction.Opcode;
+ if ((r = tgsi_split_constant(&ctx)))
+ goto out_err;
+ if ((r = tgsi_split_literal_constant(&ctx)))
+ goto out_err;
+ if (ctx.bc->chip_class == CAYMAN)
+ ctx.inst_info = &cm_shader_tgsi_instruction[opcode];
+ else if (ctx.bc->chip_class >= EVERGREEN)
+ ctx.inst_info = &eg_shader_tgsi_instruction[opcode];
+ else
+ ctx.inst_info = &r600_shader_tgsi_instruction[opcode];
+ r = ctx.inst_info->process(&ctx);
+ if (r)
+ goto out_err;
+ break;
+ default:
+ break;
+ }
+ }
+
+ /* Get instructions if we are using the LLVM backend. */
+ if (use_llvm) {
+ r600_bytecode_from_byte_stream(&ctx, inst_bytes, inst_byte_count);
+ FREE(inst_bytes);
+ }
+
+ noutput = shader->noutput;
+
+ if (ctx.clip_vertex_write) {
+ /* need to convert a clipvertex write into clipdistance writes and not export
+ the clip vertex anymore */
+
+ memset(&shader->output[noutput], 0, 2*sizeof(struct r600_shader_io));
+ shader->output[noutput].name = TGSI_SEMANTIC_CLIPDIST;
+ shader->output[noutput].gpr = ctx.temp_reg;
+ noutput++;
+ shader->output[noutput].name = TGSI_SEMANTIC_CLIPDIST;
+ shader->output[noutput].gpr = ctx.temp_reg+1;
+ noutput++;
+
+ /* reset spi_sid for clipvertex output to avoid confusing spi */
+ shader->output[ctx.cv_output].spi_sid = 0;
+
+ shader->clip_dist_write = 0xFF;
+
+ for (i = 0; i < 8; i++) {
+ int oreg = i >> 2;
+ int ochan = i & 3;
+
+ for (j = 0; j < 4; j++) {
+ struct r600_bytecode_alu alu;
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = BC_INST(ctx.bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4);
+ alu.src[0].sel = shader->output[ctx.cv_output].gpr;
+ alu.src[0].chan = j;
+
+ alu.src[1].sel = 512 + i;
+ alu.src[1].kc_bank = 1;
+ alu.src[1].chan = j;
+
+ alu.dst.sel = ctx.temp_reg + oreg;
+ alu.dst.chan = j;
+ alu.dst.write = (j == ochan);
+ if (j == 3)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx.bc, &alu);
+ if (r)
+ return r;
+ }
+ }
+ }
+
+ /* Add stream outputs. */
+ if (ctx.type == TGSI_PROCESSOR_VERTEX && so.num_outputs) {
+ for (i = 0; i < so.num_outputs; i++) {
+ struct r600_bytecode_output output;
+
+ if (so.output[i].output_buffer >= 4) {
+ R600_ERR("exceeded the max number of stream output buffers, got: %d\n",
+ so.output[i].output_buffer);
+ r = -EINVAL;
+ goto out_err;
+ }
+ if (so.output[i].dst_offset < so.output[i].start_component) {
+ R600_ERR("stream_output - dst_offset cannot be less than start_component\n");
+ r = -EINVAL;
+ goto out_err;
+ }
+
+ memset(&output, 0, sizeof(struct r600_bytecode_output));
+ output.gpr = shader->output[so.output[i].register_index].gpr;
+ output.elem_size = 0;
+ output.array_base = so.output[i].dst_offset - so.output[i].start_component;
+ output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_WRITE;
+ output.burst_count = 1;
+ output.barrier = 1;
+ /* array_size is an upper limit for the burst_count
+ * with MEM_STREAM instructions */
+ output.array_size = 0xFFF;
+ output.comp_mask = ((1 << so.output[i].num_components) - 1) << so.output[i].start_component;
+ if (ctx.bc->chip_class >= EVERGREEN) {
+ switch (so.output[i].output_buffer) {
+ case 0:
+ output.inst = EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF0;
+ break;
+ case 1:
+ output.inst = EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF1;
+ break;
+ case 2:
+ output.inst = EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF2;
+ break;
+ case 3:
+ output.inst = EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF3;
+ break;
+ }
+ } else {
+ switch (so.output[i].output_buffer) {
+ case 0:
+ output.inst = V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0;
+ break;
+ case 1:
+ output.inst = V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1;
+ break;
+ case 2:
+ output.inst = V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2;
+ break;
+ case 3:
+ output.inst = V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3;
+ break;
}
}
+ r = r600_bytecode_add_output(ctx.bc, &output);
+ if (r)
+ goto out_err;
}
}
/* export output */
- j = 0;
- for (i = 0, pos0 = 0; i < noutput; i++) {
- memset(&output[i], 0, sizeof(struct r600_bc_output));
- output[i + j].gpr = shader->output[i].gpr;
- output[i + j].elem_size = 3;
- output[i + j].swizzle_x = 0;
- output[i + j].swizzle_y = 1;
- output[i + j].swizzle_z = 2;
- output[i + j].swizzle_w = 3;
- output[i + j].burst_count = 1;
- output[i + j].barrier = 1;
- output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
- output[i + j].array_base = i - pos0;
- output[i + j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
+ for (i = 0, j = 0; i < noutput; i++, j++) {
+ memset(&output[j], 0, sizeof(struct r600_bytecode_output));
+ output[j].gpr = shader->output[i].gpr;
+ output[j].elem_size = 3;
+ output[j].swizzle_x = 0;
+ output[j].swizzle_y = 1;
+ output[j].swizzle_z = 2;
+ output[j].swizzle_w = 3;
+ output[j].burst_count = 1;
+ output[j].barrier = 1;
+ output[j].type = -1;
+ output[j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
switch (ctx.type) {
case TGSI_PROCESSOR_VERTEX:
- if (shader->output[i].name == TGSI_SEMANTIC_POSITION) {
- output[i + j].array_base = 60;
- output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
- /* position doesn't count in array_base */
- pos0++;
- }
- if (shader->output[i].name == TGSI_SEMANTIC_PSIZE) {
- output[i + j].array_base = 61;
- output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
- /* position doesn't count in array_base */
- pos0++;
+ switch (shader->output[i].name) {
+ case TGSI_SEMANTIC_POSITION:
+ output[j].array_base = next_pos_base++;
+ output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
+ break;
+
+ case TGSI_SEMANTIC_PSIZE:
+ output[j].array_base = next_pos_base++;
+ output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
+ break;
+ case TGSI_SEMANTIC_CLIPVERTEX:
+ j--;
+ break;
+ case TGSI_SEMANTIC_CLIPDIST:
+ output[j].array_base = next_pos_base++;
+ output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
+ /* spi_sid is 0 for clipdistance outputs that were generated
+ * for clipvertex - we don't need to pass them to PS */
+ if (shader->output[i].spi_sid) {
+ j++;
+ /* duplicate it as PARAM to pass to the pixel shader */
+ memcpy(&output[j], &output[j-1], sizeof(struct r600_bytecode_output));
+ output[j].array_base = next_param_base++;
+ output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
+ }
+ break;
+ case TGSI_SEMANTIC_FOG:
+ output[j].swizzle_y = 4; /* 0 */
+ output[j].swizzle_z = 4; /* 0 */
+ output[j].swizzle_w = 5; /* 1 */
+ break;
}
break;
case TGSI_PROCESSOR_FRAGMENT:
if (shader->output[i].name == TGSI_SEMANTIC_COLOR) {
- output[i + j].array_base = shader->output[i].sid;
- output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
+ output[j].array_base = next_pixel_base++;
+ output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
if (shader->fs_write_all && (rctx->chip_class >= EVERGREEN)) {
- for (j = 1; j < shader->nr_cbufs; j++) {
- memset(&output[i + j], 0, sizeof(struct r600_bc_output));
- output[i + j].gpr = shader->output[i].gpr;
- output[i + j].elem_size = 3;
- output[i + j].swizzle_x = 0;
- output[i + j].swizzle_y = 1;
- output[i + j].swizzle_z = 2;
- output[i + j].swizzle_w = 3;
- output[i + j].burst_count = 1;
- output[i + j].barrier = 1;
- output[i + j].array_base = shader->output[i].sid + j;
- output[i + j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
- output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
+ for (k = 1; k < shader->nr_cbufs; k++) {
+ j++;
+ memset(&output[j], 0, sizeof(struct r600_bytecode_output));
+ output[j].gpr = shader->output[i].gpr;
+ output[j].elem_size = 3;
+ output[j].swizzle_x = 0;
+ output[j].swizzle_y = 1;
+ output[j].swizzle_z = 2;
+ output[j].swizzle_w = 3;
+ output[j].burst_count = 1;
+ output[j].barrier = 1;
+ output[j].array_base = next_pixel_base++;
+ output[j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
+ output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
}
- j--;
}
} else if (shader->output[i].name == TGSI_SEMANTIC_POSITION) {
- output[i + j].array_base = 61;
- output[i + j].swizzle_x = 2;
- output[i + j].swizzle_y = 7;
- output[i + j].swizzle_z = output[i + j].swizzle_w = 7;
- output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
+ output[j].array_base = 61;
+ output[j].swizzle_x = 2;
+ output[j].swizzle_y = 7;
+ output[j].swizzle_z = output[j].swizzle_w = 7;
+ output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
} else if (shader->output[i].name == TGSI_SEMANTIC_STENCIL) {
- output[i + j].array_base = 61;
- output[i + j].swizzle_x = 7;
- output[i + j].swizzle_y = 1;
- output[i + j].swizzle_z = output[i + j].swizzle_w = 7;
- output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
+ output[j].array_base = 61;
+ output[j].swizzle_x = 7;
+ output[j].swizzle_y = 1;
+ output[j].swizzle_z = output[j].swizzle_w = 7;
+ output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
} else {
R600_ERR("unsupported fragment output name %d\n", shader->output[i].name);
r = -EINVAL;
r = -EINVAL;
goto out_err;
}
+
+ if (output[j].type==-1) {
+ output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
+ output[j].array_base = next_param_base++;
+ }
}
- noutput += j;
+
/* add fake param output for vertex shader if no param is exported */
- if (ctx.type == TGSI_PROCESSOR_VERTEX) {
- for (i = 0, pos0 = 0; i < noutput; i++) {
- if (output[i].type == V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM) {
- pos0 = 1;
- break;
- }
- }
- if (!pos0) {
- memset(&output[i], 0, sizeof(struct r600_bc_output));
- output[i].gpr = 0;
- output[i].elem_size = 3;
- output[i].swizzle_x = 0;
- output[i].swizzle_y = 1;
- output[i].swizzle_z = 2;
- output[i].swizzle_w = 3;
- output[i].burst_count = 1;
- output[i].barrier = 1;
- output[i].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
- output[i].array_base = 0;
- output[i].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
- noutput++;
- }
+ if (ctx.type == TGSI_PROCESSOR_VERTEX && next_param_base == 0) {
+ memset(&output[j], 0, sizeof(struct r600_bytecode_output));
+ output[j].gpr = 0;
+ output[j].elem_size = 3;
+ output[j].swizzle_x = 7;
+ output[j].swizzle_y = 7;
+ output[j].swizzle_z = 7;
+ output[j].swizzle_w = 7;
+ output[j].burst_count = 1;
+ output[j].barrier = 1;
+ output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
+ output[j].array_base = 0;
+ output[j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
+ j++;
}
+
/* add fake pixel export */
- if (ctx.type == TGSI_PROCESSOR_FRAGMENT && !noutput) {
- memset(&output[0], 0, sizeof(struct r600_bc_output));
- output[0].gpr = 0;
- output[0].elem_size = 3;
- output[0].swizzle_x = 7;
- output[0].swizzle_y = 7;
- output[0].swizzle_z = 7;
- output[0].swizzle_w = 7;
- output[0].burst_count = 1;
- output[0].barrier = 1;
- output[0].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
- output[0].array_base = 0;
- output[0].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
- noutput++;
+ if (ctx.type == TGSI_PROCESSOR_FRAGMENT && j == 0) {
+ memset(&output[j], 0, sizeof(struct r600_bytecode_output));
+ output[j].gpr = 0;
+ output[j].elem_size = 3;
+ output[j].swizzle_x = 7;
+ output[j].swizzle_y = 7;
+ output[j].swizzle_z = 7;
+ output[j].swizzle_w = 7;
+ output[j].burst_count = 1;
+ output[j].barrier = 1;
+ output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
+ output[j].array_base = 0;
+ output[j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
+ j++;
}
+
+ noutput = j;
+
/* set export done on last export of each type */
for (i = noutput - 1, output_done = 0; i >= 0; i--) {
if (ctx.bc->chip_class < CAYMAN) {
}
/* add output to bytecode */
for (i = 0; i < noutput; i++) {
- r = r600_bc_add_output(ctx.bc, &output[i]);
+ r = r600_bytecode_add_output(ctx.bc, &output[i]);
if (r)
goto out_err;
}
/* add program end */
if (ctx.bc->chip_class == CAYMAN)
- cm_bc_add_cf_end(ctx.bc);
+ cm_bytecode_add_cf_end(ctx.bc);
+
+ /* check GPR limit - we have 124 = 128 - 4
+ * (4 are reserved as alu clause temporary registers) */
+ if (ctx.bc->ngpr > 124) {
+ R600_ERR("GPR limit exceeded - shader requires %d registers\n", ctx.bc->ngpr);
+ r = -ENOMEM;
+ goto out_err;
+ }
free(ctx.literals);
tgsi_parse_free(&ctx.parse);
return 0;
}
-static void r600_bc_src(struct r600_bc_alu_src *bc_src,
+static void r600_bytecode_src(struct r600_bytecode_alu_src *bc_src,
const struct r600_shader_src *shader_src,
unsigned chan)
{
bc_src->value = shader_src->value[bc_src->chan];
}
-static void r600_bc_src_set_abs(struct r600_bc_alu_src *bc_src)
+static void r600_bytecode_src_set_abs(struct r600_bytecode_alu_src *bc_src)
{
bc_src->abs = 1;
bc_src->neg = 0;
}
-static void r600_bc_src_toggle_neg(struct r600_bc_alu_src *bc_src)
+static void r600_bytecode_src_toggle_neg(struct r600_bytecode_alu_src *bc_src)
{
bc_src->neg = !bc_src->neg;
}
static void tgsi_dst(struct r600_shader_ctx *ctx,
const struct tgsi_full_dst_register *tgsi_dst,
unsigned swizzle,
- struct r600_bc_alu_dst *r600_dst)
+ struct r600_bytecode_alu_dst *r600_dst)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
return lasti;
}
-static int tgsi_op2_s(struct r600_shader_ctx *ctx, int swap)
+static int tgsi_op2_s(struct r600_shader_ctx *ctx, int swap, int trans_only)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, j, r;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
continue;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
alu.inst = ctx->inst_info->r600_opcode;
if (!swap) {
for (j = 0; j < inst->Instruction.NumSrcRegs; j++) {
- r600_bc_src(&alu.src[j], &ctx->src[j], i);
+ r600_bytecode_src(&alu.src[j], &ctx->src[j], i);
}
} else {
- r600_bc_src(&alu.src[0], &ctx->src[1], i);
- r600_bc_src(&alu.src[1], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[1], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
}
/* handle some special cases */
switch (ctx->inst_info->tgsi_opcode) {
case TGSI_OPCODE_SUB:
- r600_bc_src_toggle_neg(&alu.src[1]);
+ r600_bytecode_src_toggle_neg(&alu.src[1]);
break;
case TGSI_OPCODE_ABS:
- r600_bc_src_set_abs(&alu.src[0]);
+ r600_bytecode_src_set_abs(&alu.src[0]);
break;
default:
break;
}
- if (i == lasti) {
+ if (i == lasti || trans_only) {
alu.last = 1;
}
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int tgsi_op2(struct r600_shader_ctx *ctx)
{
- return tgsi_op2_s(ctx, 0);
+ return tgsi_op2_s(ctx, 0, 0);
}
static int tgsi_op2_swap(struct r600_shader_ctx *ctx)
{
- return tgsi_op2_s(ctx, 1);
+ return tgsi_op2_s(ctx, 1, 0);
+}
+
+static int tgsi_op2_trans(struct r600_shader_ctx *ctx)
+{
+ return tgsi_op2_s(ctx, 0, 1);
+}
+
+static int tgsi_ineg(struct r600_shader_ctx *ctx)
+{
+ struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
+ struct r600_bytecode_alu alu;
+ int i, r;
+ int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+
+ for (i = 0; i < lasti + 1; i++) {
+
+ if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ continue;
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = ctx->inst_info->r600_opcode;
+
+ alu.src[0].sel = V_SQ_ALU_SRC_0;
+
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+
+ tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+
+ if (i == lasti) {
+ alu.last = 1;
+ }
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
+ return 0;
+
}
static int cayman_emit_float_instr(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
int i, j, r;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int last_slot = (inst->Dst[0].Register.WriteMask & 0x8) ? 4 : 3;
for (i = 0 ; i < last_slot; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = ctx->inst_info->r600_opcode;
for (j = 0; j < inst->Instruction.NumSrcRegs; j++) {
- r600_bc_src(&alu.src[j], &ctx->src[j], 0);
+ r600_bytecode_src(&alu.src[j], &ctx->src[j], 0);
}
tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
alu.dst.write = (inst->Dst[0].Register.WriteMask >> i) & 1;
if (i == last_slot - 1)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
return 0;
}
+static int cayman_mul_int_instr(struct r600_shader_ctx *ctx)
+{
+ struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
+ int i, j, k, r;
+ struct r600_bytecode_alu alu;
+ int last_slot = (inst->Dst[0].Register.WriteMask & 0x8) ? 4 : 3;
+ for (k = 0; k < last_slot; k++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << k)))
+ continue;
+
+ for (i = 0 ; i < 4; i++) {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = ctx->inst_info->r600_opcode;
+ for (j = 0; j < inst->Instruction.NumSrcRegs; j++) {
+ r600_bytecode_src(&alu.src[j], &ctx->src[j], k);
+ }
+ tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ alu.dst.write = (i == k);
+ if (i == 3)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
+ }
+ return 0;
+}
+
/*
* r600 - trunc to -PI..PI range
* r700 - normalize by dividing by 2PI
static float neg_pi = -3.1415926535;
int r;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD);
alu.is_op3 = 1;
alu.dst.sel = ctx->temp_reg;
alu.dst.write = 1;
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
alu.src[1].sel = V_SQ_ALU_SRC_LITERAL;
alu.src[1].chan = 0;
alu.src[2].sel = V_SQ_ALU_SRC_0_5;
alu.src[2].chan = 0;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT);
alu.dst.chan = 0;
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 0;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD);
alu.is_op3 = 1;
}
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
return 0;
static int cayman_trig(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int last_slot = (inst->Dst[0].Register.WriteMask & 0x8) ? 4 : 3;
int i, r;
for (i = 0; i < last_slot; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = ctx->inst_info->r600_opcode;
alu.dst.chan = i;
alu.src[0].chan = 0;
if (i == last_slot - 1)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int tgsi_trig(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, r;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
if (r)
return r;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = ctx->inst_info->r600_opcode;
alu.dst.chan = 0;
alu.dst.sel = ctx->temp_reg;
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 0;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
continue;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = ctx->temp_reg;
tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
if (i == lasti)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int tgsi_scs(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, r;
/* We'll only need the trig stuff if we are going to write to the
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
if (ctx->bc->chip_class == CAYMAN) {
for (i = 0 ; i < 3; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS);
tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
alu.src[0].chan = 0;
if (i == 2)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
} else {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS);
tgsi_dst(ctx, &inst->Dst[0], 0, &alu.dst);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 0;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
if (ctx->bc->chip_class == CAYMAN) {
for (i = 0 ; i < 3; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN);
tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
if (i == 1)
alu.src[0].chan = 0;
if (i == 2)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
} else {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN);
tgsi_dst(ctx, &inst->Dst[0], 1, &alu.dst);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 0;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
/* dst.z = 0.0; */
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
/* dst.w = 1.0; */
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int tgsi_kill(struct r600_shader_ctx *ctx)
{
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, r;
for (i = 0; i < 4; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = ctx->inst_info->r600_opcode;
alu.dst.chan = i;
alu.src[1].sel = V_SQ_ALU_SRC_1;
alu.src[1].neg = 1;
} else {
- r600_bc_src(&alu.src[1], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
}
if (i == 3) {
alu.last = 1;
}
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int tgsi_lit(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int r;
/* tmp.x = max(src.y, 0.0) */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX);
- r600_bc_src(&alu.src[0], &ctx->src[0], 1);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 1);
alu.src[1].sel = V_SQ_ALU_SRC_0; /*0.0*/
alu.src[1].chan = 1;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
if (ctx->bc->chip_class == CAYMAN) {
for (i = 0; i < 3; i++) {
/* tmp.z = log(tmp.x) */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 0;
} else
alu.dst.write = 0;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
} else {
/* tmp.z = log(tmp.x) */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 0;
alu.dst.chan = 2;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
sel = alu.dst.sel;
/* tmp.x = amd MUL_LIT(tmp.z, src.w, src.x ) */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT);
alu.src[0].sel = sel;
alu.src[0].chan = chan;
- r600_bc_src(&alu.src[1], &ctx->src[0], 3);
- r600_bc_src(&alu.src[2], &ctx->src[0], 0);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], 3);
+ r600_bytecode_src(&alu.src[2], &ctx->src[0], 0);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = 0;
alu.dst.write = 1;
alu.is_op3 = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
if (ctx->bc->chip_class == CAYMAN) {
for (i = 0; i < 3; i++) {
/* dst.z = exp(tmp.x) */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 0;
alu.last = 1;
} else
alu.dst.write = 0;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
} else {
/* dst.z = exp(tmp.x) */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 0;
tgsi_dst(ctx, &inst->Dst[0], 2, &alu.dst);
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
}
/* dst.x, <- 1.0 */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = V_SQ_ALU_SRC_1; /*1.0*/
alu.src[0].chan = 0;
tgsi_dst(ctx, &inst->Dst[0], 0, &alu.dst);
alu.dst.write = (inst->Dst[0].Register.WriteMask >> 0) & 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
/* dst.y = max(src.x, 0.0) */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
alu.src[1].sel = V_SQ_ALU_SRC_0; /*0.0*/
alu.src[1].chan = 0;
tgsi_dst(ctx, &inst->Dst[0], 1, &alu.dst);
alu.dst.write = (inst->Dst[0].Register.WriteMask >> 1) & 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
/* dst.w, <- 1.0 */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = V_SQ_ALU_SRC_1;
alu.src[0].chan = 0;
tgsi_dst(ctx, &inst->Dst[0], 3, &alu.dst);
alu.dst.write = (inst->Dst[0].Register.WriteMask >> 3) & 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+
+ return 0;
+}
+
+static int tgsi_rsq(struct r600_shader_ctx *ctx)
+{
+ struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
+ struct r600_bytecode_alu alu;
+ int i, r;
+
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+
+ /* XXX:
+ * For state trackers other than OpenGL, we'll want to use
+ * _RECIPSQRT_IEEE instead.
+ */
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED);
+
+ for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
+ r600_bytecode_src(&alu.src[i], &ctx->src[i], 0);
+ r600_bytecode_src_set_abs(&alu.src[i]);
+ }
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.write = 1;
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ /* replicate result */
+ return tgsi_helper_tempx_replicate(ctx);
+}
+
+static int tgsi_helper_tempx_replicate(struct r600_shader_ctx *ctx)
+{
+ struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
+ struct r600_bytecode_alu alu;
+ int i, r;
+
+ for (i = 0; i < 4; i++) {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.src[0].sel = ctx->temp_reg;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
+ alu.dst.chan = i;
+ tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ alu.dst.write = (inst->Dst[0].Register.WriteMask >> i) & 1;
+ if (i == 3)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
+ return 0;
+}
+
+static int tgsi_trans_srcx_replicate(struct r600_shader_ctx *ctx)
+{
+ struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
+ struct r600_bytecode_alu alu;
+ int i, r;
+
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = ctx->inst_info->r600_opcode;
+ for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
+ r600_bytecode_src(&alu.src[i], &ctx->src[i], 0);
+ }
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.write = 1;
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ /* replicate result */
+ return tgsi_helper_tempx_replicate(ctx);
+}
+
+static int cayman_pow(struct r600_shader_ctx *ctx)
+{
+ struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
+ int i, r;
+ struct r600_bytecode_alu alu;
+ int last_slot = (inst->Dst[0].Register.WriteMask & 0x8) ? 4 : 3;
+
+ for (i = 0; i < 3; i++) {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.chan = i;
+ alu.dst.write = 1;
+ if (i == 2)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
+
+ /* b * LOG2(a) */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
+ r600_bytecode_src(&alu.src[0], &ctx->src[1], 0);
+ alu.src[1].sel = ctx->temp_reg;
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.write = 1;
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+
+ for (i = 0; i < last_slot; i++) {
+ /* POW(a,b) = EXP2(b * LOG2(a))*/
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
+ alu.src[0].sel = ctx->temp_reg;
+
+ tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ alu.dst.write = (inst->Dst[0].Register.WriteMask >> i) & 1;
+ if (i == last_slot - 1)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
+ return 0;
+}
+
+static int tgsi_pow(struct r600_shader_ctx *ctx)
+{
+ struct r600_bytecode_alu alu;
+ int r;
+
+ /* LOG2(a) */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.write = 1;
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ /* b * LOG2(a) */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
+ r600_bytecode_src(&alu.src[0], &ctx->src[1], 0);
+ alu.src[1].sel = ctx->temp_reg;
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.write = 1;
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
+ /* POW(a,b) = EXP2(b * LOG2(a))*/
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
+ alu.src[0].sel = ctx->temp_reg;
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.write = 1;
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ return tgsi_helper_tempx_replicate(ctx);
+}
+
+static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op)
+{
+ struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
+ struct r600_bytecode_alu alu;
+ int i, r, j;
+ unsigned write_mask = inst->Dst[0].Register.WriteMask;
+ int tmp0 = ctx->temp_reg;
+ int tmp1 = r600_get_temp(ctx);
+ int tmp2 = r600_get_temp(ctx);
+ int tmp3 = r600_get_temp(ctx);
+ /* Unsigned path:
+ *
+ * we need to represent src1 as src2*q + r, where q - quotient, r - remainder
+ *
+ * 1. tmp0.x = rcp (src2) = 2^32/src2 + e, where e is rounding error
+ * 2. tmp0.z = lo (tmp0.x * src2)
+ * 3. tmp0.w = -tmp0.z
+ * 4. tmp0.y = hi (tmp0.x * src2)
+ * 5. tmp0.z = (tmp0.y == 0 ? tmp0.w : tmp0.z) = abs(lo(rcp*src2))
+ * 6. tmp0.w = hi (tmp0.z * tmp0.x) = e, rounding error
+ * 7. tmp1.x = tmp0.x - tmp0.w
+ * 8. tmp1.y = tmp0.x + tmp0.w
+ * 9. tmp0.x = (tmp0.y == 0 ? tmp1.y : tmp1.x)
+ * 10. tmp0.z = hi(tmp0.x * src1) = q
+ * 11. tmp0.y = lo (tmp0.z * src2) = src2*q = src1 - r
+ *
+ * 12. tmp0.w = src1 - tmp0.y = r
+ * 13. tmp1.x = tmp0.w >= src2 = r >= src2 (uint comparison)
+ * 14. tmp1.y = src1 >= tmp0.y = r >= 0 (uint comparison)
+ *
+ * if DIV
+ *
+ * 15. tmp1.z = tmp0.z + 1 = q + 1
+ * 16. tmp1.w = tmp0.z - 1 = q - 1
+ *
+ * else MOD
+ *
+ * 15. tmp1.z = tmp0.w - src2 = r - src2
+ * 16. tmp1.w = tmp0.w + src2 = r + src2
+ *
+ * endif
+ *
+ * 17. tmp1.x = tmp1.x & tmp1.y
+ *
+ * DIV: 18. tmp0.z = tmp1.x==0 ? tmp0.z : tmp1.z
+ * MOD: 18. tmp0.z = tmp1.x==0 ? tmp0.w : tmp1.z
+ *
+ * 19. tmp0.z = tmp1.y==0 ? tmp1.w : tmp0.z
+ * 20. dst = src2==0 ? MAX_UINT : tmp0.z
+ *
+ * Signed path:
+ *
+ * Same as unsigned, using abs values of the operands,
+ * and fixing the sign of the result in the end.
+ */
+
+ for (i = 0; i < 4; i++) {
+ if (!(write_mask & (1<<i)))
+ continue;
+
+ if (signed_op) {
+
+ /* tmp2.x = -src0 */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT);
+
+ alu.dst.sel = tmp2;
+ alu.dst.chan = 0;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = V_SQ_ALU_SRC_0;
+
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* tmp2.y = -src1 */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT);
+
+ alu.dst.sel = tmp2;
+ alu.dst.chan = 1;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = V_SQ_ALU_SRC_0;
+
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], i);
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* tmp2.z sign bit is set if src0 and src2 signs are different */
+ /* it will be a sign of the quotient */
+ if (!mod) {
+
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT);
+
+ alu.dst.sel = tmp2;
+ alu.dst.chan = 2;
+ alu.dst.write = 1;
+
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], i);
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+
+ /* tmp2.x = |src0| */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT);
+ alu.is_op3 = 1;
+
+ alu.dst.sel = tmp2;
+ alu.dst.chan = 0;
+ alu.dst.write = 1;
+
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+ alu.src[2].sel = tmp2;
+ alu.src[2].chan = 0;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* tmp2.y = |src1| */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT);
+ alu.is_op3 = 1;
+
+ alu.dst.sel = tmp2;
+ alu.dst.chan = 1;
+ alu.dst.write = 1;
+
+ r600_bytecode_src(&alu.src[0], &ctx->src[1], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], i);
+ alu.src[2].sel = tmp2;
+ alu.src[2].chan = 1;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ }
+
+ /* 1. tmp0.x = rcp_u (src2) = 2^32/src2 + e, where e is rounding error */
+ if (ctx->bc->chip_class == CAYMAN) {
+ /* tmp3.x = u2f(src2) */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT);
+
+ alu.dst.sel = tmp3;
+ alu.dst.chan = 0;
+ alu.dst.write = 1;
+
+ if (signed_op) {
+ alu.src[0].sel = tmp2;
+ alu.src[0].chan = 1;
+ } else {
+ r600_bytecode_src(&alu.src[0], &ctx->src[1], i);
+ }
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* tmp0.x = recip(tmp3.x) */
+ for (j = 0 ; j < 3; j++) {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE;
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = j;
+ alu.dst.write = (j == 0);
+
+ alu.src[0].sel = tmp3;
+ alu.src[0].chan = 0;
+
+ if (j == 2)
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 0;
+
+ alu.src[1].sel = V_SQ_ALU_SRC_LITERAL;
+ alu.src[1].value = 0x4f800000;
+
+ alu.dst.sel = tmp3;
+ alu.dst.write = 1;
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 0;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp3;
+ alu.src[0].chan = 0;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ } else {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 0;
+ alu.dst.write = 1;
+
+ if (signed_op) {
+ alu.src[0].sel = tmp2;
+ alu.src[0].chan = 1;
+ } else {
+ r600_bytecode_src(&alu.src[0], &ctx->src[1], i);
+ }
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+
+ /* 2. tmp0.z = lo (tmp0.x * src2) */
+ if (ctx->bc->chip_class == CAYMAN) {
+ for (j = 0 ; j < 4; j++) {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = j;
+ alu.dst.write = (j == 2);
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 0;
+ if (signed_op) {
+ alu.src[1].sel = tmp2;
+ alu.src[1].chan = 1;
+ } else {
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], i);
+ }
+
+ alu.last = (j == 3);
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+ } else {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 2;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 0;
+ if (signed_op) {
+ alu.src[1].sel = tmp2;
+ alu.src[1].chan = 1;
+ } else {
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], i);
+ }
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+
+ /* 3. tmp0.w = -tmp0.z */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 3;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = V_SQ_ALU_SRC_0;
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 2;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* 4. tmp0.y = hi (tmp0.x * src2) */
+ if (ctx->bc->chip_class == CAYMAN) {
+ for (j = 0 ; j < 4; j++) {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = j;
+ alu.dst.write = (j == 1);
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 0;
+
+ if (signed_op) {
+ alu.src[1].sel = tmp2;
+ alu.src[1].chan = 1;
+ } else {
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], i);
+ }
+ alu.last = (j == 3);
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+ } else {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 1;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 0;
+
+ if (signed_op) {
+ alu.src[1].sel = tmp2;
+ alu.src[1].chan = 1;
+ } else {
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], i);
+ }
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+
+ /* 5. tmp0.z = (tmp0.y == 0 ? tmp0.w : tmp0.z) = abs(lo(rcp*src)) */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT);
+ alu.is_op3 = 1;
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 2;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 1;
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 3;
+ alu.src[2].sel = tmp0;
+ alu.src[2].chan = 2;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* 6. tmp0.w = hi (tmp0.z * tmp0.x) = e, rounding error */
+ if (ctx->bc->chip_class == CAYMAN) {
+ for (j = 0 ; j < 4; j++) {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = j;
+ alu.dst.write = (j == 3);
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 2;
+
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 0;
+
+ alu.last = (j == 3);
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+ } else {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 3;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 2;
+
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 0;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+
+ /* 7. tmp1.x = tmp0.x - tmp0.w */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT);
+
+ alu.dst.sel = tmp1;
+ alu.dst.chan = 0;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 0;
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 3;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* 8. tmp1.y = tmp0.x + tmp0.w */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT);
+
+ alu.dst.sel = tmp1;
+ alu.dst.chan = 1;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 0;
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 3;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* 9. tmp0.x = (tmp0.y == 0 ? tmp1.y : tmp1.x) */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT);
+ alu.is_op3 = 1;
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 0;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 1;
+ alu.src[1].sel = tmp1;
+ alu.src[1].chan = 1;
+ alu.src[2].sel = tmp1;
+ alu.src[2].chan = 0;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* 10. tmp0.z = hi(tmp0.x * src1) = q */
+ if (ctx->bc->chip_class == CAYMAN) {
+ for (j = 0 ; j < 4; j++) {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = j;
+ alu.dst.write = (j == 2);
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 0;
+
+ if (signed_op) {
+ alu.src[1].sel = tmp2;
+ alu.src[1].chan = 0;
+ } else {
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+ }
+
+ alu.last = (j == 3);
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+ } else {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 2;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 0;
+
+ if (signed_op) {
+ alu.src[1].sel = tmp2;
+ alu.src[1].chan = 0;
+ } else {
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+ }
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+
+ /* 11. tmp0.y = lo (src2 * tmp0.z) = src2*q = src1 - r */
+ if (ctx->bc->chip_class == CAYMAN) {
+ for (j = 0 ; j < 4; j++) {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = j;
+ alu.dst.write = (j == 1);
+
+ if (signed_op) {
+ alu.src[0].sel = tmp2;
+ alu.src[0].chan = 1;
+ } else {
+ r600_bytecode_src(&alu.src[0], &ctx->src[1], i);
+ }
+
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 2;
+
+ alu.last = (j == 3);
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+ } else {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 1;
+ alu.dst.write = 1;
+
+ if (signed_op) {
+ alu.src[0].sel = tmp2;
+ alu.src[0].chan = 1;
+ } else {
+ r600_bytecode_src(&alu.src[0], &ctx->src[1], i);
+ }
+
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 2;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+
+ /* 12. tmp0.w = src1 - tmp0.y = r */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 3;
+ alu.dst.write = 1;
+
+ if (signed_op) {
+ alu.src[0].sel = tmp2;
+ alu.src[0].chan = 0;
+ } else {
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ }
+
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 1;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* 13. tmp1.x = tmp0.w >= src2 = r >= src2 */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT);
+
+ alu.dst.sel = tmp1;
+ alu.dst.chan = 0;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 3;
+ if (signed_op) {
+ alu.src[1].sel = tmp2;
+ alu.src[1].chan = 1;
+ } else {
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], i);
+ }
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* 14. tmp1.y = src1 >= tmp0.y = r >= 0 */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT);
+
+ alu.dst.sel = tmp1;
+ alu.dst.chan = 1;
+ alu.dst.write = 1;
+
+ if (signed_op) {
+ alu.src[0].sel = tmp2;
+ alu.src[0].chan = 0;
+ } else {
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ }
+
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 1;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ if (mod) { /* UMOD */
+
+ /* 15. tmp1.z = tmp0.w - src2 = r - src2 */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT);
+
+ alu.dst.sel = tmp1;
+ alu.dst.chan = 2;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 3;
+
+ if (signed_op) {
+ alu.src[1].sel = tmp2;
+ alu.src[1].chan = 1;
+ } else {
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], i);
+ }
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* 16. tmp1.w = tmp0.w + src2 = r + src2 */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT);
+
+ alu.dst.sel = tmp1;
+ alu.dst.chan = 3;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 3;
+ if (signed_op) {
+ alu.src[1].sel = tmp2;
+ alu.src[1].chan = 1;
+ } else {
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], i);
+ }
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ } else { /* UDIV */
+
+ /* 15. tmp1.z = tmp0.z + 1 = q + 1 DIV */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT);
+
+ alu.dst.sel = tmp1;
+ alu.dst.chan = 2;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 2;
+ alu.src[1].sel = V_SQ_ALU_SRC_1_INT;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* 16. tmp1.w = tmp0.z - 1 = q - 1 */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT);
+
+ alu.dst.sel = tmp1;
+ alu.dst.chan = 3;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp0;
+ alu.src[0].chan = 2;
+ alu.src[1].sel = V_SQ_ALU_SRC_M_1_INT;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ }
+
+ /* 17. tmp1.x = tmp1.x & tmp1.y */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT);
+
+ alu.dst.sel = tmp1;
+ alu.dst.chan = 0;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp1;
+ alu.src[0].chan = 0;
+ alu.src[1].sel = tmp1;
+ alu.src[1].chan = 1;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* 18. tmp0.z = tmp1.x==0 ? tmp0.z : tmp1.z DIV */
+ /* 18. tmp0.z = tmp1.x==0 ? tmp0.w : tmp1.z MOD */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT);
+ alu.is_op3 = 1;
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 2;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = tmp1;
+ alu.src[0].chan = 0;
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = mod ? 3 : 2;
+ alu.src[2].sel = tmp1;
+ alu.src[2].chan = 2;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* 19. tmp0.z = tmp1.y==0 ? tmp1.w : tmp0.z */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT);
+ alu.is_op3 = 1;
+
+ if (signed_op) {
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 2;
+ alu.dst.write = 1;
+ } else {
+ tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ }
+
+ alu.src[0].sel = tmp1;
+ alu.src[0].chan = 1;
+ alu.src[1].sel = tmp1;
+ alu.src[1].chan = 3;
+ alu.src[2].sel = tmp0;
+ alu.src[2].chan = 2;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ if (signed_op) {
+
+ /* fix the sign of the result */
+
+ if (mod) {
+
+ /* tmp0.x = -tmp0.z */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 0;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = V_SQ_ALU_SRC_0;
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 2;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* sign of the remainder is the same as the sign of src0 */
+ /* tmp0.x = src0>=0 ? tmp0.z : tmp0.x */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT);
+ alu.is_op3 = 1;
+
+ tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 2;
+ alu.src[2].sel = tmp0;
+ alu.src[2].chan = 0;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ } else {
+
+ /* tmp0.x = -tmp0.z */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT);
+
+ alu.dst.sel = tmp0;
+ alu.dst.chan = 0;
+ alu.dst.write = 1;
+
+ alu.src[0].sel = V_SQ_ALU_SRC_0;
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 2;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+
+ /* fix the quotient sign (same as the sign of src0*src1) */
+ /* tmp0.x = tmp2.z>=0 ? tmp0.z : tmp0.x */
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT);
+ alu.is_op3 = 1;
+ tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+
+ alu.src[0].sel = tmp2;
+ alu.src[0].chan = 2;
+ alu.src[1].sel = tmp0;
+ alu.src[1].chan = 2;
+ alu.src[2].sel = tmp0;
+ alu.src[2].chan = 0;
+
+ alu.last = 1;
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ }
+ }
+ }
return 0;
}
-static int tgsi_rsq(struct r600_shader_ctx *ctx)
+static int tgsi_udiv(struct r600_shader_ctx *ctx)
{
- struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
- int i, r;
+ return tgsi_divmod(ctx, 0, 0);
+}
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+static int tgsi_umod(struct r600_shader_ctx *ctx)
+{
+ return tgsi_divmod(ctx, 1, 0);
+}
- /* FIXME:
- * For state trackers other than OpenGL, we'll want to use
- * _RECIPSQRT_IEEE instead.
- */
- alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED);
+static int tgsi_idiv(struct r600_shader_ctx *ctx)
+{
+ return tgsi_divmod(ctx, 0, 1);
+}
- for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
- r600_bc_src(&alu.src[i], &ctx->src[i], 0);
- r600_bc_src_set_abs(&alu.src[i]);
- }
- alu.dst.sel = ctx->temp_reg;
- alu.dst.write = 1;
- alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
- if (r)
- return r;
- /* replicate result */
- return tgsi_helper_tempx_replicate(ctx);
+static int tgsi_imod(struct r600_shader_ctx *ctx)
+{
+ return tgsi_divmod(ctx, 1, 1);
}
-static int tgsi_helper_tempx_replicate(struct r600_shader_ctx *ctx)
+
+static int tgsi_f2i(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, r;
+ unsigned write_mask = inst->Dst[0].Register.WriteMask;
+ int last_inst = tgsi_last_instruction(write_mask);
for (i = 0; i < 4; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.src[0].sel = ctx->temp_reg;
- alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
+ if (!(write_mask & (1<<i)))
+ continue;
+
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC);
+
+ alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
+ alu.dst.write = 1;
+
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ if (i == last_inst)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
+
+ for (i = 0; i < 4; i++) {
+ if (!(write_mask & (1<<i)))
+ continue;
+
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = ctx->inst_info->r600_opcode;
+
tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
- alu.dst.write = (inst->Dst[0].Register.WriteMask >> i) & 1;
- if (i == 3)
+
+ alu.src[0].sel = ctx->temp_reg;
+ alu.src[0].chan = i;
+
+ if (i == last_inst)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
+
return 0;
}
-static int tgsi_trans_srcx_replicate(struct r600_shader_ctx *ctx)
+static int tgsi_iabs(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, r;
+ unsigned write_mask = inst->Dst[0].Register.WriteMask;
+ int last_inst = tgsi_last_instruction(write_mask);
- memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = ctx->inst_info->r600_opcode;
- for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
- r600_bc_src(&alu.src[i], &ctx->src[i], 0);
+ /* tmp = -src */
+ for (i = 0; i < 4; i++) {
+ if (!(write_mask & (1<<i)))
+ continue;
+
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT);
+
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.chan = i;
+ alu.dst.write = 1;
+
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+ alu.src[0].sel = V_SQ_ALU_SRC_0;
+
+ if (i == last_inst)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
}
- alu.dst.sel = ctx->temp_reg;
- alu.dst.write = 1;
- alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
- if (r)
- return r;
- /* replicate result */
- return tgsi_helper_tempx_replicate(ctx);
+
+ /* dst = (src >= 0 ? src : tmp) */
+ for (i = 0; i < 4; i++) {
+ if (!(write_mask & (1<<i)))
+ continue;
+
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT);
+ alu.is_op3 = 1;
+ alu.dst.write = 1;
+
+ tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+ alu.src[2].sel = ctx->temp_reg;
+ alu.src[2].chan = i;
+
+ if (i == last_inst)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
+ return 0;
}
-static int cayman_pow(struct r600_shader_ctx *ctx)
+static int tgsi_issg(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
+ struct r600_bytecode_alu alu;
int i, r;
- struct r600_bc_alu alu;
- int last_slot = (inst->Dst[0].Register.WriteMask & 0x8) ? 4 : 3;
+ unsigned write_mask = inst->Dst[0].Register.WriteMask;
+ int last_inst = tgsi_last_instruction(write_mask);
+
+ /* tmp = (src >= 0 ? src : -1) */
+ for (i = 0; i < 4; i++) {
+ if (!(write_mask & (1<<i)))
+ continue;
+
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT);
+ alu.is_op3 = 1;
- for (i = 0; i < 3; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
alu.dst.write = 1;
- if (i == 2)
+
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+ alu.src[2].sel = V_SQ_ALU_SRC_M_1_INT;
+
+ if (i == last_inst)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
- /* b * LOG2(a) */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
- r600_bc_src(&alu.src[0], &ctx->src[1], 0);
- alu.src[1].sel = ctx->temp_reg;
- alu.dst.sel = ctx->temp_reg;
- alu.dst.write = 1;
- alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
- if (r)
- return r;
+ /* dst = (tmp > 0 ? 1 : tmp) */
+ for (i = 0; i < 4; i++) {
+ if (!(write_mask & (1<<i)))
+ continue;
- for (i = 0; i < last_slot; i++) {
- /* POW(a,b) = EXP2(b * LOG2(a))*/
- memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
- alu.src[0].sel = ctx->temp_reg;
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT_INT);
+ alu.is_op3 = 1;
+ alu.dst.write = 1;
tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
- alu.dst.write = (inst->Dst[0].Register.WriteMask >> i) & 1;
- if (i == last_slot - 1)
+
+ alu.src[0].sel = ctx->temp_reg;
+ alu.src[0].chan = i;
+
+ alu.src[1].sel = V_SQ_ALU_SRC_1_INT;
+
+ alu.src[2].sel = ctx->temp_reg;
+ alu.src[2].chan = i;
+
+ if (i == last_inst)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
return 0;
}
-static int tgsi_pow(struct r600_shader_ctx *ctx)
-{
- struct r600_bc_alu alu;
- int r;
- /* LOG2(a) */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
- alu.dst.sel = ctx->temp_reg;
- alu.dst.write = 1;
- alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
- if (r)
- return r;
- /* b * LOG2(a) */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
- r600_bc_src(&alu.src[0], &ctx->src[1], 0);
- alu.src[1].sel = ctx->temp_reg;
- alu.dst.sel = ctx->temp_reg;
- alu.dst.write = 1;
- alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
- if (r)
- return r;
- /* POW(a,b) = EXP2(b * LOG2(a))*/
- memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
- alu.src[0].sel = ctx->temp_reg;
- alu.dst.sel = ctx->temp_reg;
- alu.dst.write = 1;
- alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
- if (r)
- return r;
- return tgsi_helper_tempx_replicate(ctx);
-}
static int tgsi_ssg(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, r;
/* tmp = (src > 0 ? 1 : src) */
for (i = 0; i < 4; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT);
alu.is_op3 = 1;
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
- r600_bc_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
alu.src[1].sel = V_SQ_ALU_SRC_1;
- r600_bc_src(&alu.src[2], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[2], &ctx->src[0], i);
if (i == 3)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
/* dst = (-tmp > 0 ? -1 : tmp) */
for (i = 0; i < 4; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT);
alu.is_op3 = 1;
tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
if (i == 3)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int tgsi_helper_copy(struct r600_shader_ctx *ctx, struct tgsi_full_instruction *inst)
{
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, r;
for (i = 0; i < 4; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
if (!(inst->Dst[0].Register.WriteMask & (1 << i))) {
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP);
alu.dst.chan = i;
if (i == 3) {
alu.last = 1;
}
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int tgsi_op3(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, j, r;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
continue;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = ctx->inst_info->r600_opcode;
for (j = 0; j < inst->Instruction.NumSrcRegs; j++) {
- r600_bc_src(&alu.src[j], &ctx->src[j], i);
+ r600_bytecode_src(&alu.src[j], &ctx->src[j], i);
}
tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
if (i == lasti) {
alu.last = 1;
}
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int tgsi_dp(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, j, r;
for (i = 0; i < 4; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = ctx->inst_info->r600_opcode;
for (j = 0; j < inst->Instruction.NumSrcRegs; j++) {
- r600_bc_src(&alu.src[j], &ctx->src[j], i);
+ r600_bytecode_src(&alu.src[j], &ctx->src[j], i);
}
tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
if (i == 3) {
alu.last = 1;
}
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
return (inst->Src[index].Register.File != TGSI_FILE_TEMPORARY &&
- inst->Src[index].Register.File != TGSI_FILE_INPUT) ||
+ inst->Src[index].Register.File != TGSI_FILE_INPUT &&
+ inst->Src[index].Register.File != TGSI_FILE_OUTPUT) ||
ctx->src[index].neg || ctx->src[index].abs;
}
{
static float one_point_five = 1.5f;
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_tex tex;
- struct r600_bc_alu alu;
+ struct r600_bytecode_tex tex;
+ struct r600_bytecode_alu alu;
unsigned src_gpr;
int r, i, j;
int opcode;
const boolean src_requires_loading = tgsi_tex_src_requires_loading(ctx, 0);
boolean src_loaded = FALSE;
unsigned sampler_src_reg = 1;
+ uint8_t offset_x = 0, offset_y = 0, offset_z = 0;
src_gpr = tgsi_tex_get_src_gpr(ctx, 0);
- if (inst->Instruction.Opcode == TGSI_OPCODE_TXD) {
+ if (inst->Instruction.Opcode == TGSI_OPCODE_TXF) {
+ /* get offset values */
+ if (inst->Texture.NumOffsets) {
+ assert(inst->Texture.NumOffsets == 1);
+
+ offset_x = ctx->literals[inst->TexOffsets[0].Index + inst->TexOffsets[0].SwizzleX] << 1;
+ offset_y = ctx->literals[inst->TexOffsets[0].Index + inst->TexOffsets[0].SwizzleY] << 1;
+ offset_z = ctx->literals[inst->TexOffsets[0].Index + inst->TexOffsets[0].SwizzleZ] << 1;
+ }
+ } else if (inst->Instruction.Opcode == TGSI_OPCODE_TXD) {
/* TGSI moves the sampler to src reg 3 for TXD */
sampler_src_reg = 3;
for (i = 1; i < 3; i++) {
/* set gradients h/v */
- memset(&tex, 0, sizeof(struct r600_bc_tex));
+ memset(&tex, 0, sizeof(struct r600_bytecode_tex));
tex.inst = (i == 1) ? SQ_TEX_INST_SET_GRADIENTS_H :
SQ_TEX_INST_SET_GRADIENTS_V;
tex.sampler_id = tgsi_tex_get_src_gpr(ctx, sampler_src_reg);
tex.src_sel_w = 3;
for (j = 0; j < 4; j++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
- r600_bc_src(&alu.src[0], &ctx->src[i], j);
+ r600_bytecode_src(&alu.src[0], &ctx->src[i], j);
alu.dst.sel = tex.src_gpr;
alu.dst.chan = j;
if (j == 3)
alu.last = 1;
alu.dst.write = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
tex.coord_type_z = 1;
tex.coord_type_w = 1;
}
- r = r600_bc_add_tex(ctx->bc, &tex);
+ r = r600_bytecode_add_tex(ctx->bc, &tex);
if (r)
return r;
}
if (ctx->bc->chip_class == CAYMAN) {
out_chan = 2;
for (i = 0; i < 3; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE);
- r600_bc_src(&alu.src[0], &ctx->src[0], 3);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 3);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
alu.last = 1;
if (out_chan == i)
alu.dst.write = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
} else {
out_chan = 3;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE);
- r600_bc_src(&alu.src[0], &ctx->src[0], 3);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 3);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = out_chan;
alu.last = 1;
alu.dst.write = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
for (i = 0; i < 3; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = out_chan;
- r600_bc_src(&alu.src[1], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
alu.dst.write = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = V_SQ_ALU_SRC_1;
alu.src[0].chan = 0;
alu.dst.chan = 3;
alu.last = 1;
alu.dst.write = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
src_loaded = TRUE;
src_gpr = ctx->temp_reg;
}
- if (inst->Texture.Texture == TGSI_TEXTURE_CUBE) {
+ if ((inst->Texture.Texture == TGSI_TEXTURE_CUBE ||
+ inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE) &&
+ inst->Instruction.Opcode != TGSI_OPCODE_TXQ) {
+
static const unsigned src0_swizzle[] = {2, 2, 0, 1};
static const unsigned src1_swizzle[] = {1, 0, 2, 2};
/* tmp1.xyzw = CUBE(R0.zzxy, R0.yxzz) */
for (i = 0; i < 4; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE);
- r600_bc_src(&alu.src[0], &ctx->src[0], src0_swizzle[i]);
- r600_bc_src(&alu.src[1], &ctx->src[0], src1_swizzle[i]);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], src0_swizzle[i]);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], src1_swizzle[i]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
if (i == 3)
alu.last = 1;
alu.dst.write = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
/* tmp1.z = RCP_e(|tmp1.z|) */
if (ctx->bc->chip_class == CAYMAN) {
for (i = 0; i < 3; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 2;
alu.dst.write = 1;
if (i == 2)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
} else {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 2;
alu.dst.chan = 2;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
* MULADD R0.y, R0.y, PS1, (0x3FC00000, 1.5f).x
* muladd has no writemask, have to use another temp
*/
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD);
alu.is_op3 = 1;
alu.dst.chan = 0;
alu.dst.write = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD);
alu.is_op3 = 1;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
-
+ /* write initial W value into Z component */
+ if (inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE) {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 3);
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.chan = 2;
+ alu.dst.write = 1;
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
src_loaded = TRUE;
src_gpr = ctx->temp_reg;
}
if (src_requires_loading && !src_loaded) {
for (i = 0; i < 4; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
- r600_bc_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
if (i == 3)
alu.last = 1;
alu.dst.write = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
}
opcode = ctx->inst_info->r600_opcode;
- if (inst->Texture.Texture == TGSI_TEXTURE_SHADOW1D || inst->Texture.Texture == TGSI_TEXTURE_SHADOW2D) {
+ if (inst->Texture.Texture == TGSI_TEXTURE_SHADOW1D ||
+ inst->Texture.Texture == TGSI_TEXTURE_SHADOW2D ||
+ inst->Texture.Texture == TGSI_TEXTURE_SHADOWRECT ||
+ inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE ||
+ inst->Texture.Texture == TGSI_TEXTURE_SHADOW1D_ARRAY ||
+ inst->Texture.Texture == TGSI_TEXTURE_SHADOW2D_ARRAY) {
switch (opcode) {
case SQ_TEX_INST_SAMPLE:
opcode = SQ_TEX_INST_SAMPLE_C;
case SQ_TEX_INST_SAMPLE_L:
opcode = SQ_TEX_INST_SAMPLE_C_L;
break;
+ case SQ_TEX_INST_SAMPLE_LB:
+ opcode = SQ_TEX_INST_SAMPLE_C_LB;
+ break;
case SQ_TEX_INST_SAMPLE_G:
opcode = SQ_TEX_INST_SAMPLE_C_G;
break;
}
}
- memset(&tex, 0, sizeof(struct r600_bc_tex));
+ memset(&tex, 0, sizeof(struct r600_bytecode_tex));
tex.inst = opcode;
tex.sampler_id = tgsi_tex_get_src_gpr(ctx, sampler_src_reg);
tex.src_sel_z = 3;
tex.src_sel_w = 1;
}
+ if (inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE) {
+ tex.src_sel_x = 1;
+ tex.src_sel_y = 0;
+ tex.src_sel_z = 3;
+ tex.src_sel_w = 2; /* route Z compare value into W */
+ }
- if (inst->Texture.Texture != TGSI_TEXTURE_RECT) {
+ if (inst->Texture.Texture != TGSI_TEXTURE_RECT &&
+ inst->Texture.Texture != TGSI_TEXTURE_SHADOWRECT) {
tex.coord_type_x = 1;
tex.coord_type_y = 1;
- tex.coord_type_z = 1;
- tex.coord_type_w = 1;
+ }
+ tex.coord_type_z = 1;
+ tex.coord_type_w = 1;
+
+ tex.offset_x = offset_x;
+ tex.offset_y = offset_y;
+ tex.offset_z = offset_z;
+
+ /* Put the depth for comparison in W.
+ * TGSI_TEXTURE_SHADOW2D_ARRAY already has the depth in W.
+ * Some instructions expect the depth in Z. */
+ if ((inst->Texture.Texture == TGSI_TEXTURE_SHADOW1D ||
+ inst->Texture.Texture == TGSI_TEXTURE_SHADOW2D ||
+ inst->Texture.Texture == TGSI_TEXTURE_SHADOWRECT ||
+ inst->Texture.Texture == TGSI_TEXTURE_SHADOW1D_ARRAY) &&
+ opcode != SQ_TEX_INST_SAMPLE_C_L &&
+ opcode != SQ_TEX_INST_SAMPLE_C_LB) {
+ tex.src_sel_w = tex.src_sel_z;
}
- if (inst->Texture.Texture == TGSI_TEXTURE_1D_ARRAY) {
- tex.coord_type_z = 0;
- tex.src_sel_z = tex.src_sel_y;
- } else if (inst->Texture.Texture == TGSI_TEXTURE_2D_ARRAY)
+ if (inst->Texture.Texture == TGSI_TEXTURE_1D_ARRAY ||
+ inst->Texture.Texture == TGSI_TEXTURE_SHADOW1D_ARRAY) {
+ if (opcode == SQ_TEX_INST_SAMPLE_C_L ||
+ opcode == SQ_TEX_INST_SAMPLE_C_LB) {
+ /* the array index is read from Y */
+ tex.coord_type_y = 0;
+ } else {
+ /* the array index is read from Z */
+ tex.coord_type_z = 0;
+ tex.src_sel_z = tex.src_sel_y;
+ }
+ } else if (inst->Texture.Texture == TGSI_TEXTURE_2D_ARRAY ||
+ inst->Texture.Texture == TGSI_TEXTURE_SHADOW2D_ARRAY)
+ /* the array index is read from Z */
tex.coord_type_z = 0;
- if (inst->Texture.Texture == TGSI_TEXTURE_SHADOW1D || inst->Texture.Texture == TGSI_TEXTURE_SHADOW2D)
- tex.src_sel_w = tex.src_sel_z;
-
- r = r600_bc_add_tex(ctx->bc, &tex);
+ r = r600_bytecode_add_tex(ctx->bc, &tex);
if (r)
return r;
static int tgsi_lrp(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
unsigned i;
int r;
if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
continue;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD);
- r600_bc_src(&alu.src[0], &ctx->src[1], i);
- r600_bc_src(&alu.src[1], &ctx->src[2], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[1], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[2], i);
alu.omod = 3;
tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
alu.dst.chan = i;
if (i == lasti) {
alu.last = 1;
}
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
continue;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD);
alu.src[0].sel = V_SQ_ALU_SRC_1;
alu.src[0].chan = 0;
- r600_bc_src(&alu.src[1], &ctx->src[0], i);
- r600_bc_src_toggle_neg(&alu.src[1]);
+ r600_bytecode_src(&alu.src[1], &ctx->src[0], i);
+ r600_bytecode_src_toggle_neg(&alu.src[1]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
if (i == lasti) {
alu.last = 1;
}
alu.dst.write = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
continue;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = i;
- r600_bc_src(&alu.src[1], &ctx->src[2], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[2], i);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
if (i == lasti) {
alu.last = 1;
}
alu.dst.write = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
continue;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD);
alu.is_op3 = 1;
- r600_bc_src(&alu.src[0], &ctx->src[0], i);
- r600_bc_src(&alu.src[1], &ctx->src[1], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], i);
alu.src[2].sel = ctx->temp_reg;
alu.src[2].chan = i;
if (i == lasti) {
alu.last = 1;
}
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int tgsi_cmp(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, r;
int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
continue;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE);
- r600_bc_src(&alu.src[0], &ctx->src[0], i);
- r600_bc_src(&alu.src[1], &ctx->src[2], i);
- r600_bc_src(&alu.src[2], &ctx->src[1], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[2], i);
+ r600_bytecode_src(&alu.src[2], &ctx->src[1], i);
tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
alu.dst.chan = i;
alu.dst.write = 1;
alu.is_op3 = 1;
if (i == lasti)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
static const unsigned int src0_swizzle[] = {2, 0, 1};
static const unsigned int src1_swizzle[] = {1, 2, 0};
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
uint32_t use_temp = 0;
int i, r;
use_temp = 1;
for (i = 0; i < 4; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
if (i < 3) {
- r600_bc_src(&alu.src[0], &ctx->src[0], src0_swizzle[i]);
- r600_bc_src(&alu.src[1], &ctx->src[1], src1_swizzle[i]);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], src0_swizzle[i]);
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], src1_swizzle[i]);
} else {
alu.src[0].sel = V_SQ_ALU_SRC_0;
alu.src[0].chan = i;
if (i == 3)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
for (i = 0; i < 4; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD);
if (i < 3) {
- r600_bc_src(&alu.src[0], &ctx->src[0], src1_swizzle[i]);
- r600_bc_src(&alu.src[1], &ctx->src[1], src0_swizzle[i]);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], src1_swizzle[i]);
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], src0_swizzle[i]);
} else {
alu.src[0].sel = V_SQ_ALU_SRC_0;
alu.src[0].chan = i;
alu.is_op3 = 1;
if (i == 3)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int tgsi_exp(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int r;
int i;
/* result.x = 2^floor(src); */
if (inst->Dst[0].Register.WriteMask & 1) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = 0;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
alu.dst.write = 1;
if (i == 2)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
alu.dst.chan = 0;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
/* result.y = tmp - floor(tmp); */
if ((inst->Dst[0].Register.WriteMask >> 1) & 1) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
alu.dst.sel = ctx->temp_reg;
#if 0
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
if ((inst->Dst[0].Register.WriteMask >> 2) & 0x1) {
if (ctx->bc->chip_class == CAYMAN) {
for (i = 0; i < 3; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
alu.last = 1;
}
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
} else {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
alu.dst.sel = ctx->temp_reg;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
/* result.w = 1.0;*/
if ((inst->Dst[0].Register.WriteMask >> 3) & 0x1) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = V_SQ_ALU_SRC_1;
alu.dst.chan = 3;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int tgsi_log(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int r;
int i;
if (inst->Dst[0].Register.WriteMask & 1) {
if (ctx->bc->chip_class == CAYMAN) {
for (i = 0; i < 3; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
- r600_bc_src_set_abs(&alu.src[0]);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
alu.dst.write = 1;
if (i == 2)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
} else {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
- r600_bc_src_set_abs(&alu.src[0]);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = 0;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
if (ctx->bc->chip_class == CAYMAN) {
for (i = 0; i < 3; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
- r600_bc_src_set_abs(&alu.src[0]);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
if (i == 2)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
} else {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
- r600_bc_src_set_abs(&alu.src[0]);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = 1;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR);
alu.src[0].sel = ctx->temp_reg;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
if (ctx->bc->chip_class == CAYMAN) {
for (i = 0; i < 3; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 1;
if (i == 2)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
} else {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 1;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
if (ctx->bc->chip_class == CAYMAN) {
for (i = 0; i < 3; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 1;
if (i == 2)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
} else {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 1;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
- r600_bc_src_set_abs(&alu.src[0]);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src_set_abs(&alu.src[0]);
alu.src[1].sel = ctx->temp_reg;
alu.src[1].chan = 1;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
if ((inst->Dst[0].Register.WriteMask >> 2) & 1) {
if (ctx->bc->chip_class == CAYMAN) {
for (i = 0; i < 3; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
- r600_bc_src_set_abs(&alu.src[0]);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
if (i == 2)
if (i == 2)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
} else {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
- r600_bc_src_set_abs(&alu.src[0]);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.write = 1;
alu.dst.chan = 2;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
/* result.w = 1.0; */
if ((inst->Dst[0].Register.WriteMask >> 3) & 1) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = V_SQ_ALU_SRC_1;
alu.dst.write = 1;
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int tgsi_eg_arl(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int r;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_ARL:
case TGSI_OPCODE_ARR:
alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT;
break;
+ case TGSI_OPCODE_UARL:
+ alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ break;
default:
assert(0);
return -1;
}
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
alu.last = 1;
- alu.dst.sel = ctx->ar_reg;
+ alu.dst.sel = ctx->bc->ar_reg;
alu.dst.write = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
- /* TODO: Note that the MOVA can be avoided if we never use AR for
- * indexing non-CB registers in the current ALU clause. Similarly, we
- * need to load AR from ar_reg again if we started a new clause
- * between ARL and AR usage. The easy way to do that is to remove
- * the MOVA here, and load it for the first AR access after ar_reg
- * has been modified in each clause. */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT;
- alu.src[0].sel = ctx->ar_reg;
- alu.src[0].chan = 0;
- alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
- if (r)
- return r;
+ ctx->bc->ar_loaded = 0;
return 0;
}
static int tgsi_r600_arl(struct r600_shader_ctx *ctx)
{
- /* TODO from r600c, ar values don't persist between clauses */
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int r;
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_ARL:
memset(&alu, 0, sizeof(alu));
alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR;
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
- alu.dst.sel = ctx->ar_reg;
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
+ alu.dst.sel = ctx->bc->ar_reg;
alu.dst.write = 1;
alu.last = 1;
- if ((r = r600_bc_add_alu(ctx->bc, &alu)))
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
return r;
memset(&alu, 0, sizeof(alu));
alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT;
- alu.src[0].sel = ctx->ar_reg;
- alu.dst.sel = ctx->ar_reg;
+ alu.src[0].sel = ctx->bc->ar_reg;
+ alu.dst.sel = ctx->bc->ar_reg;
alu.dst.write = 1;
alu.last = 1;
- if ((r = r600_bc_add_alu(ctx->bc, &alu)))
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
return r;
break;
case TGSI_OPCODE_ARR:
memset(&alu, 0, sizeof(alu));
alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT;
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
- alu.dst.sel = ctx->ar_reg;
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
+ alu.dst.sel = ctx->bc->ar_reg;
+ alu.dst.write = 1;
+ alu.last = 1;
+
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+ return r;
+ break;
+ case TGSI_OPCODE_UARL:
+ memset(&alu, 0, sizeof(alu));
+ alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
+ alu.dst.sel = ctx->bc->ar_reg;
alu.dst.write = 1;
alu.last = 1;
- if ((r = r600_bc_add_alu(ctx->bc, &alu)))
+ if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
return r;
break;
default:
return -1;
}
- memset(&alu, 0, sizeof(alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT;
- alu.src[0].sel = ctx->ar_reg;
- alu.last = 1;
-
- r = r600_bc_add_alu(ctx->bc, &alu);
- if (r)
- return r;
- ctx->bc->cf_last->r6xx_uses_waterfall = 1;
+ ctx->bc->ar_loaded = 0;
return 0;
}
static int tgsi_opdst(struct r600_shader_ctx *ctx)
{
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int i, r = 0;
for (i = 0; i < 4; i++) {
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
if (i == 0 || i == 3) {
alu.src[0].sel = V_SQ_ALU_SRC_1;
} else {
- r600_bc_src(&alu.src[0], &ctx->src[0], i);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
}
if (i == 0 || i == 2) {
alu.src[1].sel = V_SQ_ALU_SRC_1;
} else {
- r600_bc_src(&alu.src[1], &ctx->src[1], i);
+ r600_bytecode_src(&alu.src[1], &ctx->src[1], i);
}
if (i == 3)
alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
}
static int emit_logic_pred(struct r600_shader_ctx *ctx, int opcode)
{
- struct r600_bc_alu alu;
+ struct r600_bytecode_alu alu;
int r;
- memset(&alu, 0, sizeof(struct r600_bc_alu));
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.inst = opcode;
alu.predicate = 1;
alu.dst.write = 1;
alu.dst.chan = 0;
- r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
alu.src[1].sel = V_SQ_ALU_SRC_0;
alu.src[1].chan = 0;
alu.last = 1;
- r = r600_bc_add_alu_type(ctx->bc, &alu, CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE));
+ r = r600_bytecode_add_alu_type(ctx->bc, &alu, CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE));
if (r)
return r;
return 0;
static int pops(struct r600_shader_ctx *ctx, int pops)
{
- int alu_pop = 3;
- if (ctx->bc->cf_last) {
- if (ctx->bc->cf_last->inst == CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU) << 3)
- alu_pop = 0;
- else if (ctx->bc->cf_last->inst == CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER) << 3)
- alu_pop = 1;
+ unsigned force_pop = ctx->bc->force_add_cf;
+
+ if (!force_pop) {
+ int alu_pop = 3;
+ if (ctx->bc->cf_last) {
+ if (ctx->bc->cf_last->inst == CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU))
+ alu_pop = 0;
+ else if (ctx->bc->cf_last->inst == CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER))
+ alu_pop = 1;
+ }
+ alu_pop += pops;
+ if (alu_pop == 1) {
+ ctx->bc->cf_last->inst = CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER);
+ ctx->bc->force_add_cf = 1;
+ } else if (alu_pop == 2) {
+ ctx->bc->cf_last->inst = CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER);
+ ctx->bc->force_add_cf = 1;
+ } else {
+ force_pop = 1;
+ }
}
- alu_pop += pops;
- if (alu_pop == 1) {
- ctx->bc->cf_last->inst = CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER) << 3;
- ctx->bc->force_add_cf = 1;
- } else if (alu_pop == 2) {
- ctx->bc->cf_last->inst = CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER) << 3;
- ctx->bc->force_add_cf = 1;
- } else {
- r600_bc_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_POP));
+
+ if (force_pop) {
+ r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_POP));
ctx->bc->cf_last->pop_count = pops;
ctx->bc->cf_last->cf_addr = ctx->bc->cf_last->id + 2;
}
+
return 0;
}
{
struct r600_cf_stack_entry *sp = &ctx->bc->fc_stack[fc_sp];
- sp->mid = (struct r600_bc_cf **)realloc((void *)sp->mid,
- sizeof(struct r600_bc_cf *) * (sp->num_mid + 1));
+ sp->mid = (struct r600_bytecode_cf **)realloc((void *)sp->mid,
+ sizeof(struct r600_bytecode_cf *) * (sp->num_mid + 1));
sp->mid[sp->num_mid] = ctx->bc->cf_last;
sp->num_mid++;
}
#if 0
static int emit_return(struct r600_shader_ctx *ctx)
{
- r600_bc_add_cfinst(ctx->bc, V_SQ_CF_WORD1_SQ_CF_INST_RETURN);
+ r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_RETURN));
return 0;
}
static int emit_jump_to_offset(struct r600_shader_ctx *ctx, int pops, int offset)
{
- r600_bc_add_cfinst(ctx->bc, V_SQ_CF_WORD1_SQ_CF_INST_JUMP);
+ r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_JUMP));
ctx->bc->cf_last->pop_count = pops;
- /* TODO work out offset */
+ /* XXX work out offset */
return 0;
}
{
emit_testflag(ctx);
- r600_bc_add_cfinst(ctx->bc, ctx->inst_info->r600_opcode);
+ r600_bytecode_add_cfinst(ctx->bc, ctx->inst_info->r600_opcode);
ctx->bc->cf_last->pop_count = 1;
fc_set_mid(ctx, fc_sp);
static int tgsi_if(struct r600_shader_ctx *ctx)
{
- emit_logic_pred(ctx, CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE));
+ emit_logic_pred(ctx, CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT));
- r600_bc_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_JUMP));
+ r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_JUMP));
fc_pushlevel(ctx, FC_IF);
static int tgsi_else(struct r600_shader_ctx *ctx)
{
- r600_bc_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_ELSE));
+ r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_ELSE));
ctx->bc->cf_last->pop_count = 1;
fc_set_mid(ctx, ctx->bc->fc_sp);
static int tgsi_bgnloop(struct r600_shader_ctx *ctx)
{
- r600_bc_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL));
+ r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL));
fc_pushlevel(ctx, FC_LOOP);
{
int i;
- r600_bc_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END));
+ r600_bytecode_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END));
if (ctx->bc->fc_stack[ctx->bc->fc_sp].type != FC_LOOP) {
R600_ERR("loop/endloop in shader code are not paired.\n");
for (i = 0; i < ctx->bc->fc_stack[ctx->bc->fc_sp].num_mid; i++) {
ctx->bc->fc_stack[ctx->bc->fc_sp].mid[i]->cf_addr = ctx->bc->cf_last->id;
}
- /* TODO add LOOPRET support */
+ /* XXX add LOOPRET support */
fc_poplevel(ctx);
callstack_decrease_current(ctx, FC_LOOP);
return 0;
return -EINVAL;
}
- r600_bc_add_cfinst(ctx->bc, ctx->inst_info->r600_opcode);
- ctx->bc->cf_last->pop_count = 1;
+ r600_bytecode_add_cfinst(ctx->bc, ctx->inst_info->r600_opcode);
fc_set_mid(ctx, fscp);
- pops(ctx, 1);
callstack_check_depth(ctx, FC_PUSH_VPM, 1);
return 0;
}
+static int tgsi_umad(struct r600_shader_ctx *ctx)
+{
+ struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
+ struct r600_bytecode_alu alu;
+ int i, j, r;
+ int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+
+ /* src0 * src1 */
+ for (i = 0; i < lasti + 1; i++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ continue;
+
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+
+ alu.dst.chan = i;
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.write = 1;
+
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT);
+ for (j = 0; j < 2; j++) {
+ r600_bytecode_src(&alu.src[j], &ctx->src[j], i);
+ }
+
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
+
+
+ for (i = 0; i < lasti + 1; i++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ continue;
+
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT);
+
+ alu.src[0].sel = ctx->temp_reg;
+ alu.src[0].chan = i;
+
+ r600_bytecode_src(&alu.src[1], &ctx->src[2], i);
+ if (i == lasti) {
+ alu.last = 1;
+ }
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
+ return 0;
+}
+
static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
{TGSI_OPCODE_ARL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_r600_arl},
{TGSI_OPCODE_MOV, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, tgsi_op2},
{TGSI_OPCODE_LIT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_lit},
- /* FIXME:
+ /* XXX:
* For state trackers other than OpenGL, we'll want to use
* _RECIP_IEEE instead.
*/
{TGSI_OPCODE_FRC, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT, tgsi_op2},
{TGSI_OPCODE_CLAMP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_FLR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR, tgsi_op2},
- {TGSI_OPCODE_ROUND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_ROUND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE, tgsi_op2},
{TGSI_OPCODE_EX2, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE, tgsi_trans_srcx_replicate},
{TGSI_OPCODE_LG2, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE, tgsi_trans_srcx_replicate},
{TGSI_OPCODE_POW, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_pow},
{TGSI_OPCODE_SSG, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_ssg},
{TGSI_OPCODE_CMP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_cmp},
{TGSI_OPCODE_SCS, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_scs},
- {TGSI_OPCODE_TXB, 0, SQ_TEX_INST_SAMPLE_L, tgsi_tex},
+ {TGSI_OPCODE_TXB, 0, SQ_TEX_INST_SAMPLE_LB, tgsi_tex},
{TGSI_OPCODE_NRM, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_DIV, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_DP2, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp},
{80, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_PUSHA, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_POPA, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_CEIL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_I2F, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_NOT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_CEIL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL, tgsi_op2},
+ {TGSI_OPCODE_I2F, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT, tgsi_op2_trans},
+ {TGSI_OPCODE_NOT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT, tgsi_op2},
{TGSI_OPCODE_TRUNC, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC, tgsi_op2},
- {TGSI_OPCODE_SHL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_SHL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT, tgsi_op2_trans},
/* gap */
{88, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_AND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_OR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_MOD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_XOR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_AND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT, tgsi_op2},
+ {TGSI_OPCODE_OR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT, tgsi_op2},
+ {TGSI_OPCODE_MOD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_imod},
+ {TGSI_OPCODE_XOR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT, tgsi_op2},
{TGSI_OPCODE_SAD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_TXF, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_TXQ, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_TXF, 0, SQ_TEX_INST_LD, tgsi_tex},
+ {TGSI_OPCODE_TXQ, 0, SQ_TEX_INST_GET_TEXTURE_RESINFO, tgsi_tex},
{TGSI_OPCODE_CONT, 0, V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE, tgsi_loop_brk_cont},
{TGSI_OPCODE_EMIT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_ENDPRIM, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_END, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_end}, /* aka HALT */
/* gap */
{118, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_F2I, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_IDIV, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_IMAX, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_IMIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_INEG, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_ISGE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_ISHR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_ISLT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_F2U, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_U2F, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UADD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UDIV, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMAD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMAX, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMOD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMUL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USEQ, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USGE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USHR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USLT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USNE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_F2I, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT, tgsi_op2_trans},
+ {TGSI_OPCODE_IDIV, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_idiv},
+ {TGSI_OPCODE_IMAX, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT, tgsi_op2},
+ {TGSI_OPCODE_IMIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT, tgsi_op2},
+ {TGSI_OPCODE_INEG, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT, tgsi_ineg},
+ {TGSI_OPCODE_ISGE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT, tgsi_op2},
+ {TGSI_OPCODE_ISHR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT, tgsi_op2_trans},
+ {TGSI_OPCODE_ISLT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT, tgsi_op2_swap},
+ {TGSI_OPCODE_F2U, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT, tgsi_op2},
+ {TGSI_OPCODE_U2F, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT, tgsi_op2_trans},
+ {TGSI_OPCODE_UADD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT, tgsi_op2},
+ {TGSI_OPCODE_UDIV, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_udiv},
+ {TGSI_OPCODE_UMAD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_umad},
+ {TGSI_OPCODE_UMAX, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT, tgsi_op2},
+ {TGSI_OPCODE_UMIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT, tgsi_op2},
+ {TGSI_OPCODE_UMOD, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_umod},
+ {TGSI_OPCODE_UMUL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT, tgsi_op2_trans},
+ {TGSI_OPCODE_USEQ, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT, tgsi_op2},
+ {TGSI_OPCODE_USGE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT, tgsi_op2},
+ {TGSI_OPCODE_USHR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT, tgsi_op2_trans},
+ {TGSI_OPCODE_USLT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT, tgsi_op2_swap},
+ {TGSI_OPCODE_USNE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT, tgsi_op2_swap},
{TGSI_OPCODE_SWITCH, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_CASE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_DEFAULT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_ENDSWITCH, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_I, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_I_MS, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_B, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_C, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_C_LZ, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_D, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_L, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_GATHER4, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SVIEWINFO, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_UARL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT, tgsi_r600_arl},
+ {TGSI_OPCODE_UCMP, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_IABS, 0, 0, tgsi_iabs},
+ {TGSI_OPCODE_ISSG, 0, 0, tgsi_issg},
{TGSI_OPCODE_LAST, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
};
{TGSI_OPCODE_FRC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT, tgsi_op2},
{TGSI_OPCODE_CLAMP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_FLR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR, tgsi_op2},
- {TGSI_OPCODE_ROUND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_ROUND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE, tgsi_op2},
{TGSI_OPCODE_EX2, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE, tgsi_trans_srcx_replicate},
{TGSI_OPCODE_LG2, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE, tgsi_trans_srcx_replicate},
{TGSI_OPCODE_POW, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_pow},
{TGSI_OPCODE_SSG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_ssg},
{TGSI_OPCODE_CMP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_cmp},
{TGSI_OPCODE_SCS, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_scs},
- {TGSI_OPCODE_TXB, 0, SQ_TEX_INST_SAMPLE_L, tgsi_tex},
+ {TGSI_OPCODE_TXB, 0, SQ_TEX_INST_SAMPLE_LB, tgsi_tex},
{TGSI_OPCODE_NRM, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_DIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_DP2, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp},
{80, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_PUSHA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_POPA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_CEIL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_I2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_NOT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_CEIL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL, tgsi_op2},
+ {TGSI_OPCODE_I2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT, tgsi_op2_trans},
+ {TGSI_OPCODE_NOT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT, tgsi_op2},
{TGSI_OPCODE_TRUNC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC, tgsi_op2},
- {TGSI_OPCODE_SHL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_SHL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT, tgsi_op2},
/* gap */
{88, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_AND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_OR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_MOD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_XOR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_AND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT, tgsi_op2},
+ {TGSI_OPCODE_OR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT, tgsi_op2},
+ {TGSI_OPCODE_MOD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_imod},
+ {TGSI_OPCODE_XOR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT, tgsi_op2},
{TGSI_OPCODE_SAD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_TXF, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_TXQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_TXF, 0, SQ_TEX_INST_LD, tgsi_tex},
+ {TGSI_OPCODE_TXQ, 0, SQ_TEX_INST_GET_TEXTURE_RESINFO, tgsi_tex},
{TGSI_OPCODE_CONT, 0, EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE, tgsi_loop_brk_cont},
{TGSI_OPCODE_EMIT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_ENDPRIM, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_END, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_end}, /* aka HALT */
/* gap */
{118, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_F2I, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_IDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_IMAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_IMIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_INEG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_ISGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_ISHR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_ISLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_F2U, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_U2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UADD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMAD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMOD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMUL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USEQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USHR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USNE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_F2I, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT, tgsi_f2i},
+ {TGSI_OPCODE_IDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_idiv},
+ {TGSI_OPCODE_IMAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT, tgsi_op2},
+ {TGSI_OPCODE_IMIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT, tgsi_op2},
+ {TGSI_OPCODE_INEG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT, tgsi_ineg},
+ {TGSI_OPCODE_ISGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT, tgsi_op2},
+ {TGSI_OPCODE_ISHR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT, tgsi_op2},
+ {TGSI_OPCODE_ISLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT, tgsi_op2_swap},
+ {TGSI_OPCODE_F2U, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT, tgsi_f2i},
+ {TGSI_OPCODE_U2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT, tgsi_op2_trans},
+ {TGSI_OPCODE_UADD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT, tgsi_op2},
+ {TGSI_OPCODE_UDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_udiv},
+ {TGSI_OPCODE_UMAD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_umad},
+ {TGSI_OPCODE_UMAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT, tgsi_op2},
+ {TGSI_OPCODE_UMIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT, tgsi_op2},
+ {TGSI_OPCODE_UMOD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_umod},
+ {TGSI_OPCODE_UMUL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT, tgsi_op2_trans},
+ {TGSI_OPCODE_USEQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT, tgsi_op2},
+ {TGSI_OPCODE_USGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT, tgsi_op2},
+ {TGSI_OPCODE_USHR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT, tgsi_op2},
+ {TGSI_OPCODE_USLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT, tgsi_op2_swap},
+ {TGSI_OPCODE_USNE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT, tgsi_op2},
{TGSI_OPCODE_SWITCH, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_CASE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_DEFAULT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_ENDSWITCH, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_I, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_I_MS, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_B, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_C, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_C_LZ, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_D, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_L, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_GATHER4, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SVIEWINFO, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_UARL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT, tgsi_eg_arl},
+ {TGSI_OPCODE_UCMP, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_IABS, 0, 0, tgsi_iabs},
+ {TGSI_OPCODE_ISSG, 0, 0, tgsi_issg},
{TGSI_OPCODE_LAST, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
};
{TGSI_OPCODE_FRC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT, tgsi_op2},
{TGSI_OPCODE_CLAMP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_FLR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR, tgsi_op2},
- {TGSI_OPCODE_ROUND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_ROUND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE, tgsi_op2},
{TGSI_OPCODE_EX2, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE, cayman_emit_float_instr},
{TGSI_OPCODE_LG2, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE, cayman_emit_float_instr},
{TGSI_OPCODE_POW, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, cayman_pow},
{TGSI_OPCODE_SSG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_ssg},
{TGSI_OPCODE_CMP, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_cmp},
{TGSI_OPCODE_SCS, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_scs},
- {TGSI_OPCODE_TXB, 0, SQ_TEX_INST_SAMPLE_L, tgsi_tex},
+ {TGSI_OPCODE_TXB, 0, SQ_TEX_INST_SAMPLE_LB, tgsi_tex},
{TGSI_OPCODE_NRM, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_DIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_DP2, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, tgsi_dp},
{80, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_PUSHA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_POPA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_CEIL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_I2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_NOT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_CEIL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL, tgsi_op2},
+ {TGSI_OPCODE_I2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT, tgsi_op2},
+ {TGSI_OPCODE_NOT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT, tgsi_op2},
{TGSI_OPCODE_TRUNC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC, tgsi_op2},
- {TGSI_OPCODE_SHL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_SHL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT, tgsi_op2},
/* gap */
{88, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_AND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_OR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_MOD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_XOR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_AND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT, tgsi_op2},
+ {TGSI_OPCODE_OR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT, tgsi_op2},
+ {TGSI_OPCODE_MOD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_imod},
+ {TGSI_OPCODE_XOR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT, tgsi_op2},
{TGSI_OPCODE_SAD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_TXF, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_TXQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_TXF, 0, SQ_TEX_INST_LD, tgsi_tex},
+ {TGSI_OPCODE_TXQ, 0, SQ_TEX_INST_GET_TEXTURE_RESINFO, tgsi_tex},
{TGSI_OPCODE_CONT, 0, EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE, tgsi_loop_brk_cont},
{TGSI_OPCODE_EMIT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_ENDPRIM, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_END, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_end}, /* aka HALT */
/* gap */
{118, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_F2I, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_IDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_IMAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_IMIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_INEG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_ISGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_ISHR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_ISLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_F2U, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_U2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UADD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMAD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMOD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_UMUL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USEQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USHR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
- {TGSI_OPCODE_USNE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_F2I, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT, tgsi_op2},
+ {TGSI_OPCODE_IDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_idiv},
+ {TGSI_OPCODE_IMAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT, tgsi_op2},
+ {TGSI_OPCODE_IMIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT, tgsi_op2},
+ {TGSI_OPCODE_INEG, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT, tgsi_ineg},
+ {TGSI_OPCODE_ISGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT, tgsi_op2},
+ {TGSI_OPCODE_ISHR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT, tgsi_op2},
+ {TGSI_OPCODE_ISLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT, tgsi_op2_swap},
+ {TGSI_OPCODE_F2U, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT, tgsi_op2},
+ {TGSI_OPCODE_U2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT, tgsi_op2},
+ {TGSI_OPCODE_UADD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT, tgsi_op2},
+ {TGSI_OPCODE_UDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_udiv},
+ {TGSI_OPCODE_UMAD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_umad},
+ {TGSI_OPCODE_UMAX, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT, tgsi_op2},
+ {TGSI_OPCODE_UMIN, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT, tgsi_op2},
+ {TGSI_OPCODE_UMOD, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_umod},
+ {TGSI_OPCODE_UMUL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT, cayman_mul_int_instr},
+ {TGSI_OPCODE_USEQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT, tgsi_op2},
+ {TGSI_OPCODE_USGE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT, tgsi_op2},
+ {TGSI_OPCODE_USHR, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT, tgsi_op2},
+ {TGSI_OPCODE_USLT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT, tgsi_op2_swap},
+ {TGSI_OPCODE_USNE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT, tgsi_op2},
{TGSI_OPCODE_SWITCH, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_CASE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_DEFAULT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_ENDSWITCH, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_I, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_I_MS, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_B, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_C, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_C_LZ, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_D, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_L, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_GATHER4, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SVIEWINFO, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_UARL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT, tgsi_eg_arl},
+ {TGSI_OPCODE_UCMP, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_IABS, 0, 0, tgsi_iabs},
+ {TGSI_OPCODE_ISSG, 0, 0, tgsi_issg},
{TGSI_OPCODE_LAST, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
};
projects / mesa.git / blobdiff