r600g: fix up vs export handling
[mesa.git] / src / gallium / drivers / r600 / r600_state.c
index d927e4a945e743710fb8e606d5ffab9d0f9ba14e..1350a1cf565855910c011ab3f6718d24984c39ba 100644 (file)
 #include "r600_resource.h"
 #include "r600_shader.h"
 #include "r600_pipe.h"
-#include "r600_state_inlines.h"
+#include "r600_formats.h"
+
+static uint32_t r600_translate_blend_function(int blend_func)
+{
+       switch (blend_func) {
+       case PIPE_BLEND_ADD:
+               return V_028804_COMB_DST_PLUS_SRC;
+       case PIPE_BLEND_SUBTRACT:
+               return V_028804_COMB_SRC_MINUS_DST;
+       case PIPE_BLEND_REVERSE_SUBTRACT:
+               return V_028804_COMB_DST_MINUS_SRC;
+       case PIPE_BLEND_MIN:
+               return V_028804_COMB_MIN_DST_SRC;
+       case PIPE_BLEND_MAX:
+               return V_028804_COMB_MAX_DST_SRC;
+       default:
+               R600_ERR("Unknown blend function %d\n", blend_func);
+               assert(0);
+               break;
+       }
+       return 0;
+}
+
+static uint32_t r600_translate_blend_factor(int blend_fact)
+{
+       switch (blend_fact) {
+       case PIPE_BLENDFACTOR_ONE:
+               return V_028804_BLEND_ONE;
+       case PIPE_BLENDFACTOR_SRC_COLOR:
+               return V_028804_BLEND_SRC_COLOR;
+       case PIPE_BLENDFACTOR_SRC_ALPHA:
+               return V_028804_BLEND_SRC_ALPHA;
+       case PIPE_BLENDFACTOR_DST_ALPHA:
+               return V_028804_BLEND_DST_ALPHA;
+       case PIPE_BLENDFACTOR_DST_COLOR:
+               return V_028804_BLEND_DST_COLOR;
+       case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
+               return V_028804_BLEND_SRC_ALPHA_SATURATE;
+       case PIPE_BLENDFACTOR_CONST_COLOR:
+               return V_028804_BLEND_CONST_COLOR;
+       case PIPE_BLENDFACTOR_CONST_ALPHA:
+               return V_028804_BLEND_CONST_ALPHA;
+       case PIPE_BLENDFACTOR_ZERO:
+               return V_028804_BLEND_ZERO;
+       case PIPE_BLENDFACTOR_INV_SRC_COLOR:
+               return V_028804_BLEND_ONE_MINUS_SRC_COLOR;
+       case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
+               return V_028804_BLEND_ONE_MINUS_SRC_ALPHA;
+       case PIPE_BLENDFACTOR_INV_DST_ALPHA:
+               return V_028804_BLEND_ONE_MINUS_DST_ALPHA;
+       case PIPE_BLENDFACTOR_INV_DST_COLOR:
+               return V_028804_BLEND_ONE_MINUS_DST_COLOR;
+       case PIPE_BLENDFACTOR_INV_CONST_COLOR:
+               return V_028804_BLEND_ONE_MINUS_CONST_COLOR;
+       case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
+               return V_028804_BLEND_ONE_MINUS_CONST_ALPHA;
+       case PIPE_BLENDFACTOR_SRC1_COLOR:
+               return V_028804_BLEND_SRC1_COLOR;
+       case PIPE_BLENDFACTOR_SRC1_ALPHA:
+               return V_028804_BLEND_SRC1_ALPHA;
+       case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
+               return V_028804_BLEND_INV_SRC1_COLOR;
+       case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
+               return V_028804_BLEND_INV_SRC1_ALPHA;
+       default:
+               R600_ERR("Bad blend factor %d not supported!\n", blend_fact);
+               assert(0);
+               break;
+       }
+       return 0;
+}
+
+static uint32_t r600_translate_stencil_op(int s_op)
+{
+       switch (s_op) {
+       case PIPE_STENCIL_OP_KEEP:
+               return V_028800_STENCIL_KEEP;
+       case PIPE_STENCIL_OP_ZERO:
+               return V_028800_STENCIL_ZERO;
+       case PIPE_STENCIL_OP_REPLACE:
+               return V_028800_STENCIL_REPLACE;
+       case PIPE_STENCIL_OP_INCR:
+               return V_028800_STENCIL_INCR;
+       case PIPE_STENCIL_OP_DECR:
+               return V_028800_STENCIL_DECR;
+       case PIPE_STENCIL_OP_INCR_WRAP:
+               return V_028800_STENCIL_INCR_WRAP;
+       case PIPE_STENCIL_OP_DECR_WRAP:
+               return V_028800_STENCIL_DECR_WRAP;
+       case PIPE_STENCIL_OP_INVERT:
+               return V_028800_STENCIL_INVERT;
+       default:
+               R600_ERR("Unknown stencil op %d", s_op);
+               assert(0);
+               break;
+       }
+       return 0;
+}
+
+static uint32_t r600_translate_fill(uint32_t func)
+{
+       switch(func) {
+       case PIPE_POLYGON_MODE_FILL:
+               return 2;
+       case PIPE_POLYGON_MODE_LINE:
+               return 1;
+       case PIPE_POLYGON_MODE_POINT:
+               return 0;
+       default:
+               assert(0);
+               return 0;
+       }
+}
+
+/* translates straight */
+static uint32_t r600_translate_ds_func(int func)
+{
+       return func;
+}
+
+static unsigned r600_tex_wrap(unsigned wrap)
+{
+       switch (wrap) {
+       default:
+       case PIPE_TEX_WRAP_REPEAT:
+               return V_03C000_SQ_TEX_WRAP;
+       case PIPE_TEX_WRAP_CLAMP:
+               return V_03C000_SQ_TEX_CLAMP_HALF_BORDER;
+       case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
+               return V_03C000_SQ_TEX_CLAMP_LAST_TEXEL;
+       case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
+               return V_03C000_SQ_TEX_CLAMP_BORDER;
+       case PIPE_TEX_WRAP_MIRROR_REPEAT:
+               return V_03C000_SQ_TEX_MIRROR;
+       case PIPE_TEX_WRAP_MIRROR_CLAMP:
+               return V_03C000_SQ_TEX_MIRROR_ONCE_HALF_BORDER;
+       case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
+               return V_03C000_SQ_TEX_MIRROR_ONCE_LAST_TEXEL;
+       case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
+               return V_03C000_SQ_TEX_MIRROR_ONCE_BORDER;
+       }
+}
+
+static unsigned r600_tex_filter(unsigned filter)
+{
+       switch (filter) {
+       default:
+       case PIPE_TEX_FILTER_NEAREST:
+               return V_03C000_SQ_TEX_XY_FILTER_POINT;
+       case PIPE_TEX_FILTER_LINEAR:
+               return V_03C000_SQ_TEX_XY_FILTER_BILINEAR;
+       }
+}
+
+static unsigned r600_tex_mipfilter(unsigned filter)
+{
+       switch (filter) {
+       case PIPE_TEX_MIPFILTER_NEAREST:
+               return V_03C000_SQ_TEX_Z_FILTER_POINT;
+       case PIPE_TEX_MIPFILTER_LINEAR:
+               return V_03C000_SQ_TEX_Z_FILTER_LINEAR;
+       default:
+       case PIPE_TEX_MIPFILTER_NONE:
+               return V_03C000_SQ_TEX_Z_FILTER_NONE;
+       }
+}
+
+static unsigned r600_tex_compare(unsigned compare)
+{
+       switch (compare) {
+       default:
+       case PIPE_FUNC_NEVER:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_NEVER;
+       case PIPE_FUNC_LESS:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_LESS;
+       case PIPE_FUNC_EQUAL:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_EQUAL;
+       case PIPE_FUNC_LEQUAL:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_LESSEQUAL;
+       case PIPE_FUNC_GREATER:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_GREATER;
+       case PIPE_FUNC_NOTEQUAL:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_NOTEQUAL;
+       case PIPE_FUNC_GEQUAL:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL;
+       case PIPE_FUNC_ALWAYS:
+               return V_03C000_SQ_TEX_DEPTH_COMPARE_ALWAYS;
+       }
+}
+
+static unsigned r600_tex_dim(unsigned dim)
+{
+       switch (dim) {
+       default:
+       case PIPE_TEXTURE_1D:
+               return V_038000_SQ_TEX_DIM_1D;
+       case PIPE_TEXTURE_1D_ARRAY:
+               return V_038000_SQ_TEX_DIM_1D_ARRAY;
+       case PIPE_TEXTURE_2D:
+       case PIPE_TEXTURE_RECT:
+               return V_038000_SQ_TEX_DIM_2D;
+       case PIPE_TEXTURE_2D_ARRAY:
+               return V_038000_SQ_TEX_DIM_2D_ARRAY;
+       case PIPE_TEXTURE_3D:
+               return V_038000_SQ_TEX_DIM_3D;
+       case PIPE_TEXTURE_CUBE:
+               return V_038000_SQ_TEX_DIM_CUBEMAP;
+       }
+}
+
+static uint32_t r600_translate_dbformat(enum pipe_format format)
+{
+       switch (format) {
+       case PIPE_FORMAT_Z16_UNORM:
+               return V_028010_DEPTH_16;
+       case PIPE_FORMAT_Z24X8_UNORM:
+               return V_028010_DEPTH_X8_24;
+       case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
+               return V_028010_DEPTH_8_24;
+       case PIPE_FORMAT_Z32_FLOAT:
+               return V_028010_DEPTH_32_FLOAT;
+       case PIPE_FORMAT_Z32_FLOAT_S8X24_USCALED:
+               return V_028010_DEPTH_X24_8_32_FLOAT;
+       default:
+               return ~0U;
+       }
+}
+
+static uint32_t r600_translate_colorswap(enum pipe_format format)
+{
+       switch (format) {
+       /* 8-bit buffers. */
+       case PIPE_FORMAT_A8_UNORM:
+               return V_0280A0_SWAP_ALT_REV;
+       case PIPE_FORMAT_I8_UNORM:
+       case PIPE_FORMAT_L8_UNORM:
+       case PIPE_FORMAT_L8_SRGB:
+       case PIPE_FORMAT_R8_UNORM:
+       case PIPE_FORMAT_R8_SNORM:
+               return V_0280A0_SWAP_STD;
+
+       case PIPE_FORMAT_L4A4_UNORM:
+               return V_0280A0_SWAP_ALT;
+
+       /* 16-bit buffers. */
+       case PIPE_FORMAT_B5G6R5_UNORM:
+               return V_0280A0_SWAP_STD_REV;
+
+       case PIPE_FORMAT_B5G5R5A1_UNORM:
+       case PIPE_FORMAT_B5G5R5X1_UNORM:
+               return V_0280A0_SWAP_ALT;
+
+       case PIPE_FORMAT_B4G4R4A4_UNORM:
+       case PIPE_FORMAT_B4G4R4X4_UNORM:
+               return V_0280A0_SWAP_ALT;
+
+       case PIPE_FORMAT_Z16_UNORM:
+               return V_0280A0_SWAP_STD;
+
+       case PIPE_FORMAT_L8A8_UNORM:
+       case PIPE_FORMAT_L8A8_SRGB:
+               return V_0280A0_SWAP_ALT;
+       case PIPE_FORMAT_R8G8_UNORM:
+               return V_0280A0_SWAP_STD;
+
+       case PIPE_FORMAT_R16_UNORM:
+       case PIPE_FORMAT_R16_FLOAT:
+               return V_0280A0_SWAP_STD;
+
+       /* 32-bit buffers. */
+
+       case PIPE_FORMAT_A8B8G8R8_SRGB:
+               return V_0280A0_SWAP_STD_REV;
+       case PIPE_FORMAT_B8G8R8A8_SRGB:
+               return V_0280A0_SWAP_ALT;
+
+       case PIPE_FORMAT_B8G8R8A8_UNORM:
+       case PIPE_FORMAT_B8G8R8X8_UNORM:
+               return V_0280A0_SWAP_ALT;
+
+       case PIPE_FORMAT_A8R8G8B8_UNORM:
+       case PIPE_FORMAT_X8R8G8B8_UNORM:
+               return V_0280A0_SWAP_ALT_REV;
+       case PIPE_FORMAT_R8G8B8A8_SNORM:
+       case PIPE_FORMAT_R8G8B8A8_UNORM:
+       case PIPE_FORMAT_R8G8B8X8_UNORM:
+               return V_0280A0_SWAP_STD;
+
+       case PIPE_FORMAT_A8B8G8R8_UNORM:
+       case PIPE_FORMAT_X8B8G8R8_UNORM:
+       /* case PIPE_FORMAT_R8SG8SB8UX8U_NORM: */
+               return V_0280A0_SWAP_STD_REV;
+
+       case PIPE_FORMAT_Z24X8_UNORM:
+       case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
+               return V_0280A0_SWAP_STD;
+
+       case PIPE_FORMAT_X8Z24_UNORM:
+       case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
+               return V_0280A0_SWAP_STD;
+
+       case PIPE_FORMAT_R10G10B10A2_UNORM:
+       case PIPE_FORMAT_R10G10B10X2_SNORM:
+       case PIPE_FORMAT_R10SG10SB10SA2U_NORM:
+               return V_0280A0_SWAP_STD;
+
+       case PIPE_FORMAT_B10G10R10A2_UNORM:
+               return V_0280A0_SWAP_ALT;
+
+       case PIPE_FORMAT_R11G11B10_FLOAT:
+       case PIPE_FORMAT_R16G16_UNORM:
+       case PIPE_FORMAT_R16G16_FLOAT:
+       case PIPE_FORMAT_R32_FLOAT:
+       case PIPE_FORMAT_Z32_FLOAT:
+               return V_0280A0_SWAP_STD;
+
+       /* 64-bit buffers. */
+       case PIPE_FORMAT_R32G32_FLOAT:
+       case PIPE_FORMAT_R16G16B16A16_UNORM:
+       case PIPE_FORMAT_R16G16B16A16_SNORM:
+       case PIPE_FORMAT_R16G16B16A16_FLOAT:
+       case PIPE_FORMAT_Z32_FLOAT_S8X24_USCALED:
+
+       /* 128-bit buffers. */
+       case PIPE_FORMAT_R32G32B32A32_FLOAT:
+       case PIPE_FORMAT_R32G32B32A32_SNORM:
+       case PIPE_FORMAT_R32G32B32A32_UNORM:
+               return V_0280A0_SWAP_STD;
+       default:
+               R600_ERR("unsupported colorswap format %d\n", format);
+               return ~0U;
+       }
+       return ~0U;
+}
+
+static uint32_t r600_translate_colorformat(enum pipe_format format)
+{
+       switch (format) {
+       case PIPE_FORMAT_L4A4_UNORM:
+               return V_0280A0_COLOR_4_4;
+
+       /* 8-bit buffers. */
+       case PIPE_FORMAT_A8_UNORM:
+       case PIPE_FORMAT_I8_UNORM:
+       case PIPE_FORMAT_L8_UNORM:
+       case PIPE_FORMAT_L8_SRGB:
+       case PIPE_FORMAT_R8_UNORM:
+       case PIPE_FORMAT_R8_SNORM:
+               return V_0280A0_COLOR_8;
+
+       /* 16-bit buffers. */
+       case PIPE_FORMAT_B5G6R5_UNORM:
+               return V_0280A0_COLOR_5_6_5;
+
+       case PIPE_FORMAT_B5G5R5A1_UNORM:
+       case PIPE_FORMAT_B5G5R5X1_UNORM:
+               return V_0280A0_COLOR_1_5_5_5;
+
+       case PIPE_FORMAT_B4G4R4A4_UNORM:
+       case PIPE_FORMAT_B4G4R4X4_UNORM:
+               return V_0280A0_COLOR_4_4_4_4;
+
+       case PIPE_FORMAT_Z16_UNORM:
+               return V_0280A0_COLOR_16;
+
+       case PIPE_FORMAT_L8A8_UNORM:
+       case PIPE_FORMAT_L8A8_SRGB:
+       case PIPE_FORMAT_R8G8_UNORM:
+               return V_0280A0_COLOR_8_8;
+
+       case PIPE_FORMAT_R16_UNORM:
+               return V_0280A0_COLOR_16;
+
+       case PIPE_FORMAT_R16_FLOAT:
+               return V_0280A0_COLOR_16_FLOAT;
+
+       /* 32-bit buffers. */
+       case PIPE_FORMAT_A8B8G8R8_SRGB:
+       case PIPE_FORMAT_A8B8G8R8_UNORM:
+       case PIPE_FORMAT_A8R8G8B8_UNORM:
+       case PIPE_FORMAT_B8G8R8A8_SRGB:
+       case PIPE_FORMAT_B8G8R8A8_UNORM:
+       case PIPE_FORMAT_B8G8R8X8_UNORM:
+       case PIPE_FORMAT_R8G8B8A8_SNORM:
+       case PIPE_FORMAT_R8G8B8A8_UNORM:
+       case PIPE_FORMAT_R8G8B8X8_UNORM:
+       case PIPE_FORMAT_R8SG8SB8UX8U_NORM:
+       case PIPE_FORMAT_X8B8G8R8_UNORM:
+       case PIPE_FORMAT_X8R8G8B8_UNORM:
+       case PIPE_FORMAT_R8G8B8_UNORM:
+               return V_0280A0_COLOR_8_8_8_8;
+
+       case PIPE_FORMAT_R10G10B10A2_UNORM:
+       case PIPE_FORMAT_R10G10B10X2_SNORM:
+       case PIPE_FORMAT_B10G10R10A2_UNORM:
+       case PIPE_FORMAT_R10SG10SB10SA2U_NORM:
+               return V_0280A0_COLOR_2_10_10_10;
+
+       case PIPE_FORMAT_Z24X8_UNORM:
+       case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
+               return V_0280A0_COLOR_8_24;
+
+       case PIPE_FORMAT_X8Z24_UNORM:
+       case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
+               return V_0280A0_COLOR_24_8;
+
+       case PIPE_FORMAT_Z32_FLOAT_S8X24_USCALED:
+               return V_0280A0_COLOR_X24_8_32_FLOAT;
+
+       case PIPE_FORMAT_R32_FLOAT:
+       case PIPE_FORMAT_Z32_FLOAT:
+               return V_0280A0_COLOR_32_FLOAT;
+
+       case PIPE_FORMAT_R16G16_FLOAT:
+               return V_0280A0_COLOR_16_16_FLOAT;
+
+       case PIPE_FORMAT_R16G16_SSCALED:
+       case PIPE_FORMAT_R16G16_UNORM:
+               return V_0280A0_COLOR_16_16;
+
+       case PIPE_FORMAT_R11G11B10_FLOAT:
+               return V_0280A0_COLOR_10_11_11_FLOAT;
+
+       /* 64-bit buffers. */
+       case PIPE_FORMAT_R16G16B16_USCALED:
+       case PIPE_FORMAT_R16G16B16A16_USCALED:
+       case PIPE_FORMAT_R16G16B16_SSCALED:
+       case PIPE_FORMAT_R16G16B16A16_SSCALED:
+       case PIPE_FORMAT_R16G16B16A16_UNORM:
+       case PIPE_FORMAT_R16G16B16A16_SNORM:
+               return V_0280A0_COLOR_16_16_16_16;
+
+       case PIPE_FORMAT_R16G16B16_FLOAT:
+       case PIPE_FORMAT_R16G16B16A16_FLOAT:
+               return V_0280A0_COLOR_16_16_16_16_FLOAT;
+
+       case PIPE_FORMAT_R32G32_FLOAT:
+               return V_0280A0_COLOR_32_32_FLOAT;
+
+       case PIPE_FORMAT_R32G32_USCALED:
+       case PIPE_FORMAT_R32G32_SSCALED:
+               return V_0280A0_COLOR_32_32;
+
+       /* 96-bit buffers. */
+       case PIPE_FORMAT_R32G32B32_FLOAT:
+               return V_0280A0_COLOR_32_32_32_FLOAT;
+
+       /* 128-bit buffers. */
+       case PIPE_FORMAT_R32G32B32A32_FLOAT:
+               return V_0280A0_COLOR_32_32_32_32_FLOAT;
+       case PIPE_FORMAT_R32G32B32A32_SNORM:
+       case PIPE_FORMAT_R32G32B32A32_UNORM:
+               return V_0280A0_COLOR_32_32_32_32;
+
+       /* YUV buffers. */
+       case PIPE_FORMAT_UYVY:
+       case PIPE_FORMAT_YUYV:
+       default:
+               return ~0U; /* Unsupported. */
+       }
+}
+
+static uint32_t r600_colorformat_endian_swap(uint32_t colorformat)
+{
+       if (R600_BIG_ENDIAN) {
+               switch(colorformat) {
+               case V_0280A0_COLOR_4_4:
+                       return ENDIAN_NONE;
+
+               /* 8-bit buffers. */
+               case V_0280A0_COLOR_8:
+                       return ENDIAN_NONE;
+
+               /* 16-bit buffers. */
+               case V_0280A0_COLOR_5_6_5:
+               case V_0280A0_COLOR_1_5_5_5:
+               case V_0280A0_COLOR_4_4_4_4:
+               case V_0280A0_COLOR_16:
+               case V_0280A0_COLOR_8_8:
+                       return ENDIAN_8IN16;
+
+               /* 32-bit buffers. */
+               case V_0280A0_COLOR_8_8_8_8:
+               case V_0280A0_COLOR_2_10_10_10:
+               case V_0280A0_COLOR_8_24:
+               case V_0280A0_COLOR_24_8:
+               case V_0280A0_COLOR_32_FLOAT:
+               case V_0280A0_COLOR_16_16_FLOAT:
+               case V_0280A0_COLOR_16_16:
+                       return ENDIAN_8IN32;
+
+               /* 64-bit buffers. */
+               case V_0280A0_COLOR_16_16_16_16:
+               case V_0280A0_COLOR_16_16_16_16_FLOAT:
+                       return ENDIAN_8IN16;
+
+               case V_0280A0_COLOR_32_32_FLOAT:
+               case V_0280A0_COLOR_32_32:
+               case V_0280A0_COLOR_X24_8_32_FLOAT:
+                       return ENDIAN_8IN32;
+
+               /* 128-bit buffers. */
+               case V_0280A0_COLOR_32_32_32_FLOAT:
+               case V_0280A0_COLOR_32_32_32_32_FLOAT:
+               case V_0280A0_COLOR_32_32_32_32:
+                       return ENDIAN_8IN32;
+               default:
+                       return ENDIAN_NONE; /* Unsupported. */
+               }
+       } else {
+               return ENDIAN_NONE;
+       }
+}
+
+static bool r600_is_sampler_format_supported(struct pipe_screen *screen, enum pipe_format format)
+{
+       return r600_translate_texformat(screen, format, NULL, NULL, NULL) != ~0U;
+}
+
+static bool r600_is_colorbuffer_format_supported(enum pipe_format format)
+{
+       return r600_translate_colorformat(format) != ~0U &&
+              r600_translate_colorswap(format) != ~0U;
+}
+
+static bool r600_is_zs_format_supported(enum pipe_format format)
+{
+       return r600_translate_dbformat(format) != ~0U;
+}
+
+boolean r600_is_format_supported(struct pipe_screen *screen,
+                                enum pipe_format format,
+                                enum pipe_texture_target target,
+                                unsigned sample_count,
+                                unsigned usage)
+{
+       unsigned retval = 0;
+
+       if (target >= PIPE_MAX_TEXTURE_TYPES) {
+               R600_ERR("r600: unsupported texture type %d\n", target);
+               return FALSE;
+       }
+
+       if (!util_format_is_supported(format, usage))
+               return FALSE;
+
+       /* Multisample */
+       if (sample_count > 1)
+               return FALSE;
+
+       if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
+           r600_is_sampler_format_supported(screen, format)) {
+               retval |= PIPE_BIND_SAMPLER_VIEW;
+       }
+
+       if ((usage & (PIPE_BIND_RENDER_TARGET |
+                     PIPE_BIND_DISPLAY_TARGET |
+                     PIPE_BIND_SCANOUT |
+                     PIPE_BIND_SHARED)) &&
+           r600_is_colorbuffer_format_supported(format)) {
+               retval |= usage &
+                         (PIPE_BIND_RENDER_TARGET |
+                          PIPE_BIND_DISPLAY_TARGET |
+                          PIPE_BIND_SCANOUT |
+                          PIPE_BIND_SHARED);
+       }
+
+       if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
+           r600_is_zs_format_supported(format)) {
+               retval |= PIPE_BIND_DEPTH_STENCIL;
+       }
+
+       if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
+           r600_is_vertex_format_supported(format)) {
+               retval |= PIPE_BIND_VERTEX_BUFFER;
+       }
+
+       if (usage & PIPE_BIND_TRANSFER_READ)
+               retval |= PIPE_BIND_TRANSFER_READ;
+       if (usage & PIPE_BIND_TRANSFER_WRITE)
+               retval |= PIPE_BIND_TRANSFER_WRITE;
+
+       return retval == usage;
+}
 
 void r600_polygon_offset_update(struct r600_pipe_context *rctx)
 {
@@ -63,6 +646,7 @@ void r600_polygon_offset_update(struct r600_pipe_context *rctx)
                        offset_units *= 2.0f;
                        break;
                case PIPE_FORMAT_Z32_FLOAT:
+               case PIPE_FORMAT_Z32_FLOAT_S8X24_USCALED:
                        depth = -23;
                        offset_units *= 1.0f;
                        offset_db_fmt_cntl |= S_028DF8_POLY_OFFSET_DB_IS_FLOAT_FMT(1);
@@ -299,6 +883,8 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
        }
 
        rstate = &rs->rstate;
+       rs->clamp_vertex_color = state->clamp_vertex_color;
+       rs->clamp_fragment_color = state->clamp_fragment_color;
        rs->flatshade = state->flatshade;
        rs->sprite_coord_enable = state->sprite_coord_enable;
 
@@ -369,14 +955,17 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
 static void *r600_create_sampler_state(struct pipe_context *ctx,
                                        const struct pipe_sampler_state *state)
 {
-       struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
+       struct r600_pipe_sampler_state *ss = CALLOC_STRUCT(r600_pipe_sampler_state);
+       struct r600_pipe_state *rstate;
        union util_color uc;
        unsigned aniso_flag_offset = state->max_anisotropy > 1 ? 4 : 0;
 
-       if (rstate == NULL) {
+       if (ss == NULL) {
                return NULL;
        }
 
+       ss->seamless_cube_map = state->seamless_cube_map;
+       rstate = &ss->rstate;
        rstate->id = R600_PIPE_STATE_SAMPLER;
        util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
        r600_pipe_state_add_reg_noblock(rstate, R_03C000_SQ_TEX_SAMPLER_WORD0_0,
@@ -559,27 +1148,57 @@ static void r600_set_ps_sampler_view(struct pipe_context *ctx, unsigned count,
        rctx->ps_samplers.n_views = count;
 }
 
+static void r600_set_seamless_cubemap(struct r600_pipe_context *rctx, boolean enable)
+{
+       struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
+       if (rstate == NULL)
+               return;
+
+       rstate->id = R600_PIPE_STATE_SEAMLESS_CUBEMAP;
+       r600_pipe_state_add_reg(rstate, R_009508_TA_CNTL_AUX,
+                               (enable ? 0 : S_009508_DISABLE_CUBE_WRAP(1)),
+                               1, NULL);
+
+       free(rctx->states[R600_PIPE_STATE_SEAMLESS_CUBEMAP]);
+       rctx->states[R600_PIPE_STATE_SEAMLESS_CUBEMAP] = rstate;
+       r600_context_pipe_state_set(&rctx->ctx, rstate);
+}
+
 static void r600_bind_ps_sampler(struct pipe_context *ctx, unsigned count, void **states)
 {
        struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
-       struct r600_pipe_state **rstates = (struct r600_pipe_state **)states;
+       struct r600_pipe_sampler_state **sstates = (struct r600_pipe_sampler_state **)states;
+       int seamless = -1;
 
        memcpy(rctx->ps_samplers.samplers, states, sizeof(void*) * count);
        rctx->ps_samplers.n_samplers = count;
 
        for (int i = 0; i < count; i++) {
-               r600_context_pipe_state_set_ps_sampler(&rctx->ctx, rstates[i], i);
+               r600_context_pipe_state_set_ps_sampler(&rctx->ctx, &sstates[i]->rstate, i);
+
+               if (sstates[i])
+                       seamless = sstates[i]->seamless_cube_map;
        }
+
+       if (seamless != -1)
+               r600_set_seamless_cubemap(rctx, seamless);
 }
 
 static void r600_bind_vs_sampler(struct pipe_context *ctx, unsigned count, void **states)
 {
        struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
-       struct r600_pipe_state **rstates = (struct r600_pipe_state **)states;
+       struct r600_pipe_sampler_state **sstates = (struct r600_pipe_sampler_state **)states;
+       int seamless = -1;
 
        for (int i = 0; i < count; i++) {
-               r600_context_pipe_state_set_vs_sampler(&rctx->ctx, rstates[i], i);
+               r600_context_pipe_state_set_vs_sampler(&rctx->ctx, &sstates[i]->rstate, i);
+
+               if (sstates[i])
+                       seamless = sstates[i]->seamless_cube_map;
        }
+
+       if (seamless != -1)
+               r600_set_seamless_cubemap(rctx, seamless);
 }
 
 static void r600_set_clip_state(struct pipe_context *ctx,
@@ -792,7 +1411,7 @@ static void r600_cb(struct r600_pipe_context *rctx, struct r600_pipe_state *rsta
        /* EXPORT_NORM is an optimzation that can be enabled for better
         * performance in certain cases
         */
-       if (rctx->family < CHIP_RV770) {
+       if (rctx->chip_class == R600) {
                /* EXPORT_NORM can be enabled if:
                 * - 11-bit or smaller UNORM/SNORM/SRGB
                 * - BLEND_CLAMP is enabled
@@ -952,7 +1571,7 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
        r600_pipe_state_add_reg(rstate,
                                R_028200_PA_SC_WINDOW_OFFSET, 0x00000000,
                                0xFFFFFFFF, NULL);
-       if (rctx->family >= CHIP_RV770) {
+       if (rctx->chip_class >= R700) {
                r600_pipe_state_add_reg(rstate,
                                        R_028230_PA_SC_EDGERULE, 0xAAAAAAAA,
                                        0xFFFFFFFF, NULL);
@@ -1046,16 +1665,13 @@ void r600_init_state_functions(struct r600_pipe_context *rctx)
 
 void r600_adjust_gprs(struct r600_pipe_context *rctx)
 {
-       enum radeon_family family;
        struct r600_pipe_state rstate;
        unsigned num_ps_gprs = rctx->default_ps_gprs;
        unsigned num_vs_gprs = rctx->default_vs_gprs;
        unsigned tmp;
        int diff;
 
-       family = r600_get_family(rctx->radeon);
-
-       if (family >= CHIP_CEDAR)
+       if (rctx->chip_class >= EVERGREEN)
                return;
 
        if (!rctx->ps_shader && !rctx->vs_shader)
@@ -1107,7 +1723,7 @@ void r600_init_config(struct r600_pipe_context *rctx)
        struct r600_pipe_state *rstate = &rctx->config;
        u32 tmp;
 
-       family = r600_get_family(rctx->radeon);
+       family = rctx->family;
        ps_prio = 0;
        vs_prio = 1;
        gs_prio = 2;
@@ -1288,16 +1904,24 @@ void r600_init_config(struct r600_pipe_context *rctx)
        r600_pipe_state_add_reg(rstate, R_009714_VC_ENHANCE, 0x00000000, 0xFFFFFFFF, NULL);
        r600_pipe_state_add_reg(rstate, R_028350_SX_MISC, 0x00000000, 0xFFFFFFFF, NULL);
 
-       if (family >= CHIP_RV770) {
+       if (rctx->chip_class >= R700) {
                r600_pipe_state_add_reg(rstate, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0x00004000, 0xFFFFFFFF, NULL);
-               r600_pipe_state_add_reg(rstate, R_009508_TA_CNTL_AUX, 0x07000002, 0xFFFFFFFF, NULL);
+               r600_pipe_state_add_reg(rstate, R_009508_TA_CNTL_AUX,
+                                       S_009508_DISABLE_CUBE_ANISO(1) |
+                                       S_009508_SYNC_GRADIENT(1) |
+                                       S_009508_SYNC_WALKER(1) |
+                                       S_009508_SYNC_ALIGNER(1), 0xFFFFFFFF, NULL);
                r600_pipe_state_add_reg(rstate, R_009830_DB_DEBUG, 0x00000000, 0xFFFFFFFF, NULL);
                r600_pipe_state_add_reg(rstate, R_009838_DB_WATERMARKS, 0x00420204, 0xFFFFFFFF, NULL);
                r600_pipe_state_add_reg(rstate, R_0286C8_SPI_THREAD_GROUPING, 0x00000000, 0xFFFFFFFF, NULL);
                r600_pipe_state_add_reg(rstate, R_028A4C_PA_SC_MODE_CNTL, 0x00514002, 0xFFFFFFFF, NULL);
        } else {
                r600_pipe_state_add_reg(rstate, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0x00000000, 0xFFFFFFFF, NULL);
-               r600_pipe_state_add_reg(rstate, R_009508_TA_CNTL_AUX, 0x07000003, 0xFFFFFFFF, NULL);
+               r600_pipe_state_add_reg(rstate, R_009508_TA_CNTL_AUX,
+                                       S_009508_DISABLE_CUBE_ANISO(1) |
+                                       S_009508_SYNC_GRADIENT(1) |
+                                       S_009508_SYNC_WALKER(1) |
+                                       S_009508_SYNC_ALIGNER(1), 0xFFFFFFFF, NULL);
                r600_pipe_state_add_reg(rstate, R_009830_DB_DEBUG, 0x82000000, 0xFFFFFFFF, NULL);
                r600_pipe_state_add_reg(rstate, R_009838_DB_WATERMARKS, 0x01020204, 0xFFFFFFFF, NULL);
                r600_pipe_state_add_reg(rstate, R_0286C8_SPI_THREAD_GROUPING, 0x00000001, 0xFFFFFFFF, NULL);
@@ -1438,7 +2062,7 @@ void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shad
        struct r600_pipe_state *rstate = &shader->rstate;
        struct r600_shader *rshader = &shader->shader;
        unsigned spi_vs_out_id[10];
-       unsigned i, tmp;
+       unsigned i, tmp, nparams;
 
        /* clear previous register */
        rstate->nregs = 0;
@@ -1460,9 +2084,17 @@ void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shad
                                        spi_vs_out_id[i], 0xFFFFFFFF, NULL);
        }
 
+       /* Certain attributes (position, psize, etc.) don't count as params.
+        * VS is required to export at least one param and r600_shader_from_tgsi()
+        * takes care of adding a dummy export.
+        */
+       nparams = rshader->noutput - rshader->npos;
+       if (nparams < 1)
+               nparams = 1;
+
        r600_pipe_state_add_reg(rstate,
                        R_0286C4_SPI_VS_OUT_CONFIG,
-                       S_0286C4_VS_EXPORT_COUNT(rshader->noutput - 2),
+                       S_0286C4_VS_EXPORT_COUNT(nparams - 1),
                        0xFFFFFFFF, NULL);
        r600_pipe_state_add_reg(rstate,
                        R_028868_SQ_PGM_RESOURCES_VS,