#include "util/u_inlines.h"
#include "util/u_format.h"
#include "util/u_memory.h"
+#include "util/u_pack_color.h"
#include "r600_screen.h"
#include "r600_context.h"
#include "r600_resource.h"
static void r600_viewport(struct r600_context *rctx, struct radeon_state *rstate, const struct pipe_viewport_state *state);
static void r600_ucp(struct r600_context *rctx, struct radeon_state *rstate, const struct pipe_clip_state *state);
static void r600_sampler(struct r600_context *rctx, struct radeon_state *rstate, const struct pipe_sampler_state *state, unsigned id);
+static void r600_sampler_border(struct r600_context *rctx, struct radeon_state *rstate,
+ const struct pipe_sampler_state *state, unsigned id);
static void r600_resource(struct pipe_context *ctx, struct radeon_state *rstate, const struct pipe_sampler_view *view, unsigned id);
static void r600_cb(struct r600_context *rctx, struct radeon_state *rstate,
const struct pipe_framebuffer_state *state, int cb);
rstate = r600_new_context_state(pipe_sampler_type);
rstate->state.sampler = *state;
r600_sampler(rctx, &rstate->rstate[0], &rstate->state.sampler, 0);
+ r600_sampler_border(rctx, &rstate->rstate[1], &rstate->state.sampler, 0);
return rstate;
}
return &rstate->state.sampler_view;
}
-static void r600_set_ps_sampler_view(struct pipe_context *ctx,
- unsigned count,
- struct pipe_sampler_view **views)
+static void r600_set_sampler_view(struct pipe_context *ctx,
+ unsigned count,
+ struct pipe_sampler_view **views,
+ struct r600_shader_sampler_states *sampler,
+ unsigned shader_id)
{
struct r600_context *rctx = r600_context(ctx);
struct r600_context_state *rstate;
unsigned i;
- for (i = 0; i < rctx->ps_nsampler_view; i++) {
- radeon_draw_unbind(&rctx->draw, rctx->ps_sampler_view[i]);
+ for (i = 0; i < sampler->nview; i++) {
+ radeon_draw_unbind(&rctx->draw, sampler->view[i]);
}
+
for (i = 0; i < count; i++) {
rstate = (struct r600_context_state *)views[i];
if (rstate) {
if (rstate->nrstate) {
memcpy(&rstate->rstate[rstate->nrstate], &rstate->rstate[0], sizeof(struct radeon_state));
}
- radeon_state_convert(&rstate->rstate[rstate->nrstate], R600_STATE_RESOURCE, i, R600_SHADER_PS);
- rctx->ps_sampler_view[i] = &rstate->rstate[rstate->nrstate];
+ radeon_state_convert(&rstate->rstate[rstate->nrstate], R600_STATE_RESOURCE, i, shader_id);
+ sampler->view[i] = &rstate->rstate[rstate->nrstate];
rstate->nrstate++;
}
}
- rctx->ps_nsampler_view = count;
+ sampler->nview = count;
}
-static void r600_set_vs_sampler_view(struct pipe_context *ctx,
+static void r600_set_ps_sampler_view(struct pipe_context *ctx,
unsigned count,
struct pipe_sampler_view **views)
{
struct r600_context *rctx = r600_context(ctx);
- struct r600_context_state *rstate;
- unsigned i;
+ r600_set_sampler_view(ctx, count, views, &rctx->ps_sampler, R600_SHADER_PS);
+}
- for (i = 0; i < rctx->vs_nsampler_view; i++) {
- radeon_draw_unbind(&rctx->draw, rctx->vs_sampler_view[i]);
- }
- for (i = 0; i < count; i++) {
- rstate = (struct r600_context_state *)views[i];
- if (rstate) {
- rstate->nrstate = 0;
- }
- }
- for (i = 0; i < count; i++) {
- rstate = (struct r600_context_state *)views[i];
- if (rstate) {
- if (rstate->nrstate >= R600_MAX_RSTATE)
- continue;
- if (rstate->nrstate) {
- memcpy(&rstate->rstate[rstate->nrstate], &rstate->rstate[0], sizeof(struct radeon_state));
- }
- radeon_state_convert(&rstate->rstate[rstate->nrstate], R600_STATE_RESOURCE, i, R600_SHADER_VS);
- rctx->vs_sampler_view[i] = &rstate->rstate[rstate->nrstate];
- rstate->nrstate++;
- }
- }
- rctx->vs_nsampler_view = count;
+static void r600_set_vs_sampler_view(struct pipe_context *ctx,
+ unsigned count,
+ struct pipe_sampler_view **views)
+{
+ struct r600_context *rctx = r600_context(ctx);
+ r600_set_sampler_view(ctx, count, views, &rctx->vs_sampler, R600_SHADER_VS);
}
static void *r600_create_shader_state(struct pipe_context *ctx,
rctx->vs_shader = r600_context_state_incref(rstate);
}
-static void r600_bind_ps_sampler(struct pipe_context *ctx,
- unsigned count, void **states)
+static void r600_bind_sampler_shader(struct pipe_context *ctx,
+ unsigned count, void **states,
+ struct r600_shader_sampler_states *sampler, unsigned shader_id)
{
struct r600_context *rctx = r600_context(ctx);
struct r600_context_state *rstate;
unsigned i;
- for (i = 0; i < rctx->ps_nsampler; i++) {
- radeon_draw_unbind(&rctx->draw, rctx->ps_sampler[i]);
+ for (i = 0; i < sampler->nsampler; i++) {
+ radeon_draw_unbind(&rctx->draw, sampler->sampler[i]);
+ }
+ for (i = 0; i < sampler->nborder; i++) {
+ radeon_draw_unbind(&rctx->draw, sampler->border[i]);
}
for (i = 0; i < count; i++) {
rstate = (struct r600_context_state *)states[i];
continue;
if (rstate->nrstate) {
memcpy(&rstate->rstate[rstate->nrstate], &rstate->rstate[0], sizeof(struct radeon_state));
+ memcpy(&rstate->rstate[rstate->nrstate+1], &rstate->rstate[1], sizeof(struct radeon_state));
}
- radeon_state_convert(&rstate->rstate[rstate->nrstate], R600_STATE_SAMPLER, i, R600_SHADER_PS);
- rctx->ps_sampler[i] = &rstate->rstate[rstate->nrstate];
- rstate->nrstate++;
+ radeon_state_convert(&rstate->rstate[rstate->nrstate], R600_STATE_SAMPLER, i, shader_id);
+ radeon_state_convert(&rstate->rstate[rstate->nrstate + 1], R600_STATE_SAMPLER_BORDER, i, shader_id);
+ sampler->sampler[i] = &rstate->rstate[rstate->nrstate];
+ sampler->border[i] = &rstate->rstate[rstate->nrstate + 1];
+ rstate->nrstate += 2;
}
}
- rctx->ps_nsampler = count;
+ sampler->nsampler = count;
+ sampler->nborder = count;
}
-static void r600_bind_vs_sampler(struct pipe_context *ctx,
+static void r600_bind_ps_sampler(struct pipe_context *ctx,
unsigned count, void **states)
{
struct r600_context *rctx = r600_context(ctx);
- struct r600_context_state *rstate;
- unsigned i;
+ r600_bind_sampler_shader(ctx, count, states, &rctx->ps_sampler, R600_SHADER_PS);
+}
- for (i = 0; i < rctx->vs_nsampler; i++) {
- radeon_draw_unbind(&rctx->draw, rctx->vs_sampler[i]);
- }
- for (i = 0; i < count; i++) {
- rstate = (struct r600_context_state *)states[i];
- if (rstate) {
- rstate->nrstate = 0;
- }
- }
- for (i = 0; i < count; i++) {
- rstate = (struct r600_context_state *)states[i];
- if (rstate) {
- if (rstate->nrstate >= R600_MAX_RSTATE)
- continue;
- if (rstate->nrstate) {
- memcpy(&rstate->rstate[rstate->nrstate], &rstate->rstate[0], sizeof(struct radeon_state));
- }
- radeon_state_convert(&rstate->rstate[rstate->nrstate], R600_STATE_SAMPLER, i, R600_SHADER_VS);
- rctx->vs_sampler[i] = &rstate->rstate[rstate->nrstate];
- rstate->nrstate++;
- }
- }
- rctx->vs_nsampler = count;
+static void r600_bind_vs_sampler(struct pipe_context *ctx,
+ unsigned count, void **states)
+{
+ struct r600_context *rctx = r600_context(ctx);
+ r600_bind_sampler_shader(ctx, count, states, &rctx->vs_sampler, R600_SHADER_VS);
}
static void r600_delete_state(struct pipe_context *ctx, void *state)
return value * (1 << frac_bits);
}
+static void r600_sampler_border(struct r600_context *rctx, struct radeon_state *rstate,
+ const struct pipe_sampler_state *state, unsigned id)
+{
+ struct r600_screen *rscreen = rctx->screen;
+ union util_color uc;
+
+ util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
+
+ if (uc.ui) {
+ radeon_state_init(rstate, rscreen->rw, R600_STATE_SAMPLER_BORDER, id, R600_SHADER_PS);
+ rstate->states[R600_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_RED] = fui(state->border_color[0]);
+ rstate->states[R600_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_GREEN] = fui(state->border_color[1]);
+ rstate->states[R600_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_BLUE] = fui(state->border_color[2]);
+ rstate->states[R600_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_ALPHA] = fui(state->border_color[3]);
+ radeon_state_pm4(rstate);
+ }
+}
+
static void r600_sampler(struct r600_context *rctx, struct radeon_state *rstate,
const struct pipe_sampler_state *state, unsigned id)
{
struct r600_screen *rscreen = rctx->screen;
+ union util_color uc;
+
+ util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
radeon_state_init(rstate, rscreen->rw, R600_STATE_SAMPLER, id, R600_SHADER_PS);
rstate->states[R600_PS_SAMPLER__SQ_TEX_SAMPLER_WORD0_0] =
S_03C000_XY_MAG_FILTER(r600_tex_filter(state->mag_img_filter)) |
S_03C000_XY_MIN_FILTER(r600_tex_filter(state->min_img_filter)) |
S_03C000_MIP_FILTER(r600_tex_mipfilter(state->min_mip_filter)) |
- S_03C000_DEPTH_COMPARE_FUNCTION(r600_tex_compare(state->compare_func));
+ S_03C000_DEPTH_COMPARE_FUNCTION(r600_tex_compare(state->compare_func)) |
+ S_03C000_BORDER_COLOR_TYPE(uc.ui ? V_03C000_SQ_TEX_BORDER_COLOR_REGISTER : 0);
/* FIXME LOD it depends on texture base level ... */
rstate->states[R600_PS_SAMPLER__SQ_TEX_SAMPLER_WORD1_0] =
S_03C004_MIN_LOD(S_FIXED(CLAMP(state->min_lod, 0, 15), 6)) |
radeon_state_pm4(rstate);
}
+static void r600_bind_shader_sampler(struct r600_context *rctx, struct r600_shader_sampler_states *sampler)
+{
+ int i;
+
+ for (i = 0; i < sampler->nsampler; i++) {
+ if (sampler->sampler[i])
+ radeon_draw_bind(&rctx->draw, sampler->sampler[i]);
+ }
+
+ for (i = 0; i < sampler->nborder; i++) {
+ if (sampler->border[i])
+ radeon_draw_bind(&rctx->draw, sampler->border[i]);
+ }
+
+ for (i = 0; i < sampler->nview; i++) {
+ if (sampler->view[i])
+ radeon_draw_bind(&rctx->draw, sampler->view[i]);
+ }
+}
+
int r600_context_hw_states(struct pipe_context *ctx)
{
struct r600_context *rctx = r600_context(ctx);
if (rctx->framebuffer->state.framebuffer.zsbuf) {
radeon_draw_bind(&rctx->draw, &rctx->framebuffer->rstate[0]);
}
- for (i = 0; i < rctx->ps_nsampler; i++) {
- if (rctx->ps_sampler[i]) {
- radeon_draw_bind(&rctx->draw, rctx->ps_sampler[i]);
- }
- }
- for (i = 0; i < rctx->ps_nsampler_view; i++) {
- if (rctx->ps_sampler_view[i]) {
- radeon_draw_bind(&rctx->draw, rctx->ps_sampler_view[i]);
- }
- }
+
+ r600_bind_shader_sampler(rctx, &rctx->vs_sampler);
+ r600_bind_shader_sampler(rctx, &rctx->ps_sampler);
+
return 0;
}
projects / mesa.git / blobdiff